K4S28323LE-F(H)E/N/S/C/L/R
May. 2003
Mobile-SDRAM
GENERAL DESCRIPTIONFEATURES
1M x 32Bit x 4 Banks SDRAM in 90FBGA
FUNCTIONAL BLOCK DIAGRAM
ORDERING INFORMATION
Part No. Max Freq. Interface Package
K4S28323LE-F(H)E/N/S/C/L/R60 166MHz(CL=3)
LVCMOS 90FBGA
Pb
(Pb Free)
K4S28323LE-F(H)E/N/S/C/L/R75 133MHz(CL=3)
105MHz(CL=2)
K4S28323LE-F(H)E/N/S/C/L/R1H 105MHz(CL=2)
K4S28323LE-F(H)E/N/S/C/L/R1L 105MHz(CL=3)*1
- F(H)E/N/S : Normal/Low/Super Low Power, Extended Temp.
- F(H)C/L/R : Normal/Low/Super Low Power, Commercial Temp.
1. In case of 40MHz Frequency, CL1 can be supported.
Note :
• 2.5V power supply
• LVCMOS compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
- CAS latency (1, 2 & 3)
- Burst length (1, 2, 4, 8 & Full page)
- Burst type (Sequential & Interleave)
• Special Function Support
- Internal TCSR(Temperature Compensated Self Refresh)
- PASR(Partial Array Self Refresh)
• All inputs are sampled at the positive going edge of the system
clock
• Burst read single-bit write operation
• DQM for masking.
• Auto & self refresh
• 64ms refresh period (4K cycle).
• Extended Temperature Operation (-25°C ~ 85°C).
• Commercial Temperature Operation (-25°C ~ 70°C).
• 90Balls Monolithic FBGA(9mm x 13mm)
• Pb for -FXXX, Pb Free for -HXXX.
Bank Select
Data Input Register
1M x 32
1M x 32
Sense AMP
Output BufferI/O Control
Column Decoder
Latency & Burst Length
Programming Register
Address Register
Row Buffer
Refresh Counter
Row DecoderCol. Buffer
LRAS
LCBR
LCKE
LRAS LCBR LWE LDQM
CLK CKE CS RAS CAS WE DQM
LWE
LDQM
DQi
CLK
ADD
LCAS LWCBR
1M x 32
1M x 32
Timing Register
* Samsung Electronics reserves the right to change products or specification without notice.
The K4S28323LE is 134,217,728 bits synchronous high data
rate Dynamic RAM organized as 4 x 1,048,576 words by 32
bits, fabricated with SAMSUNG′s high performance CMOS
technology. Synchronous design allows precise cycle control
with the use of system clock and I/O transactions are possible
on every clock cycle. Range of operating frequencies, program-
mable burst lengths and programmable latencies allow the
same device to be useful for a variety of high bandwidth and
high performance memory system applications.