LM828 www.ti.com SNOS035D - MARCH 2010 - REVISED MAY 2013 LM828 Switched Capacitor Voltage Converter Check for Samples: LM828 FEATURES DESCRIPTION * * * * The LM828 CMOS charge-pump voltage converter inverts a positive voltage in the range of +1.8V to +5.5V to the corresponding negative voltage of -1.8V to -5.5V. The LM828 uses two low cost capacitors to provide up to 25 mA of output current. 1 2 Inverts Input Supply Voltage SOT-23 Package 20 Typical Output Impedance 97% Typical Conversion Efficiency at 5 mA APPLICATIONS * * * * * * Cellular Phones Pagers PDAs Operational Amplifier Power Supplies Interface Power Supplies Handheld Instruments The LM828 operates at 12 kHz switching frequency to reduce output resistance and voltage ripple. With an operating current of only 40 A (operating efficiency greater than 96% with most loads), the LM828 provides ideal performance for battery powered systems. The device is in a tiny SOT-23 package. Basic Application Circuits Voltage Inverter +5V to -10V Converter 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2010-2013, Texas Instruments Incorporated LM828 SNOS035D - MARCH 2010 - REVISED MAY 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Supply Voltage (V+ to GND, or GND to OUT) 5.8V V+ and OUT Continuous Output Current 50 mA Output Short-Circuit Duration to GND (3) Continuous Power Dissipation (TA = 25C) 1 sec. (4) 240 mW TJMax (4) 150C JA (4) 300C/W -40C to 85C Operating Junction Temperature Range -65C to +150C Storage Temperature Range Lead Temp. (Soldering, 10 seconds) ESD Rating (1) 300C (5) 2kV Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device beyond its rated operating conditions. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. OUT may be shorted to GND for one second without damage. However, shorting OUT to V+ may damage the device and should be avoided. Also, for temperatures above 85C, OUT must not be shorted to GND or V+, or the device may be damaged. The maximum allowable power dissipation is calculated by using PDMax = (TJMax - TA)/JA, where TJMax is the maximum junction temperature, TA is the ambient temperature, and JA is the junction-to-ambient thermal resistance of the package. The human body model is a 100 pF capacitor discharged through a 1.5 k resistor into each pin. (2) (3) (4) (5) Electrical Characteristics Limits in standard typeface are for TJ = 25C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: V+ = 5V, C1 = C2 = 10 F. (1) Condition Min V+ Symbol Supply Voltage Parameter RL =10k 1.8 IQ Supply Current No Load Typ 40 Max Units 5.5 V 75 A 115 ROUT Output Resistance (2) IL = 5 mA (3) 20 65 fOSC Oscillator Frequency Internal 12 24 56 kHz fSW Switching Frequency (3) Measured at CAP+ 6 12 28 kHz PEFF Power Efficiency IL = 5 mA VOEFF Voltage Conversion Efficiency No Load (1) (2) (3) 2 95 97 % 99.96 % In the test circuit, capacitors C1 and C2 are 10 F, 0.3 maximum ESR capacitors. Capacitors with higher ESR will increase output resistance, reduce output voltage and efficiency. Specified output resistance includes internal switch resistance and capacitor ESR. See the details in the application information. The output switches operate at one half of the oscillator frequency, fOSC = 2fSW. Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LM828 LM828 www.ti.com SNOS035D - MARCH 2010 - REVISED MAY 2013 Test Circuit *C1 and C2 are 10 F capacitors. Figure 1. LM828 Test Circuit Typical Performance Characteristics (Circuit of Figure 1, V+ = 5V unless otherwise specified) Supply Current vs Supply Voltage Supply Current vs Temperature Figure 2. Figure 3. Output Source Resistance vs Supply Voltage Output Source Resistance vs Temperature Figure 4. Figure 5. Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LM828 3 LM828 SNOS035D - MARCH 2010 - REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) (Circuit of Figure 1, V+ = 5V unless otherwise specified) Output Voltage vs Load Current Efficiency vs Load Current Figure 6. Figure 7. Switching Frequency vs Supply Voltage Switching Frequency vs Temperature Figure 8. Figure 9. CONNECTION DIAGRAMS 5-Lead SOT-23 Package (DBV) Figure 10. SOT-23 Package - Top View See Package Number DBV0005A 4 Submit Documentation Feedback Figure 11. Actual Size Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LM828 LM828 www.ti.com SNOS035D - MARCH 2010 - REVISED MAY 2013 Pin Functions PIN DESCRIPTIONS Pin Name 1 OUT Function Negative voltage output. 2 V+ 3 CAP- Power supply positive input. Connect this pin to the negative terminal of the charge-pump capacitor. 4 GND Power supply ground input. 5 CAP+ Connect this pin to the positive terminal of the charge-pump capacitor. Circuit Description The LM828 contains four large CMOS switches which are switched in a sequence to invert the input supply voltage. Energy transfer and storage are provided by external capacitors. Figure 12 illustrates the voltage conversion scheme. When S1 and S3 are closed, C1 charges to the supply voltage V+. During this time interval, switches S2 and S4 are open. In the second time interval, S1 and S3 are open; at the same time, S2 and S4 are closed, C1 is charging C2. After a number of cycles, the voltage across C2 will be pumped to V+. Since the anode of C2 is connected to ground, the output at the cathode of C2 equals -(V+) when there is no load current. The output voltage drop when a load is added is determined by the parasitic resistance (Rds(on) of the MOSFET switches and the ESR of the capacitors) and the charge transfer loss between capacitors. Figure 12. Voltage Inverting Principle Application Information SIMPLE NEGATIVE VOLTAGE CONVERTER The main application of LM828 is to generate a negative supply voltage. The voltage inverter circuit uses only two external capacitors as shown in the Basic Application Circuits. The range of the input supply voltage is 1.8V to 5.5V. The output characteristics of this circuit can be approximated by an ideal voltage source in series with a resistance. The voltage source equals -(V+). The output resistance, Rout , is a function of the ON resistance of the internal MOSFET switches, the oscillator frequency, the capacitance and the ESR of both C1 and C2. Since the switching current charging and discharging C1 is approximately twice as the output current, the effect of the ESR of the pumping capacitor C1 will be multiplied by four in the output resistance. The output capacitor C2 is charging and discharging at a current approximately equal to the output current, therefore, this ESR term only counts once in the output resistance. A good approximation of Rout is: (1) where RSW is the sum of the ON resistance of the internal MOSFET switches shown in Figure 12. High capacitance, low ESR capacitors will reduce the output resistance. The peak-to-peak output voltage ripple is determined by the oscillator frequency, the capacitance and ESR of the output capacitor C2: Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LM828 5 LM828 SNOS035D - MARCH 2010 - REVISED MAY 2013 www.ti.com (2) Again, using a low ESR capacitor will result in lower ripple. CAPACITOR SELECTION The output resistance and ripple voltage are dependent on the capacitance and ESR values of the external capacitors. The output voltage drop is the load current times the output resistance, and the power efficiency is (3) IL2Rout Where IQ(V+) is the quiescent power loss of the IC device, and switch on-resistance, the two external capacitors and their ESRs. is the conversion loss associated with the The selection of capacitors is based on the specifications of the dropout voltage (which equals Iout Rout), the output voltage ripple, and the converter efficiency. Low ESR capacitors (following table) are recommended to maximize efficiency, reduce the output voltage drop and voltage ripple. Low ESR Capacitor Manufacturers Manufacturer Phone Capacitor Type Nichicon Corp. (708)-843-7500 PL & PF series, through-hole aluminum electrolytic AVX Corp. (803)-448-9411 TPS series, surface-mount tantalum Sprague (207)-324-4140 593D, 594D, 595D series, surface-mount tantalum Sanyo (619)-661-6835 OS-CON series, through-hole aluminum electrolytic Murata (800)-831-9172 Ceramic chip capacitors Taiyo Yuden (800)-348-2496 Ceramic chip capacitors Tokin (408)-432-8020 Ceramic chip capacitors Other Applications PARALLELING DEVICES Any number of LM828s can be paralleled to reduce the output resistance. Each device must have its own pumping capacitor C1, while only one output capacitor Cout is needed as shown in Figure 13. The composite output resistance is: (4) Figure 13. Lowering Output Resistance by Paralleling Devices 6 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LM828 LM828 www.ti.com SNOS035D - MARCH 2010 - REVISED MAY 2013 CASCADING DEVICES Cascading the LM828s is an easy way to produce a greater negative voltage (e.g. A two-stage cascade circuit is shown in Figure 14). If n is the integer representing the number of devices cascaded, the unloaded output voltage Vout is (-nVin). The effective output resistance is equal to the weighted sum of each individual device: Rout = nRout_1 + n/2 Rout_2 + ... + Rout_n (5) This can be seen by first assuming that each device is 100 percent efficient. Since the output voltage is different on each device the output current is as well. Each cascaded device sees less current at the output than the previous so the ROUT voltage drop is lower in each device added. Note that, the number of n is practically limited since the increasing of n significantly reduces the efficiency, and increases the output resistance and output voltage ripple. Figure 14. Increasing Output Voltage by Cascading Devices COMBINED DOUBLER AND INVERTER In Figure 15, the LM828 is used to provide a positive voltage doubler and a negative voltage converter. Note that the total current drawn from the two outputs should not exceed 40 mA. Figure 15. Combined Voltage Doubler and Inverter Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LM828 7 LM828 SNOS035D - MARCH 2010 - REVISED MAY 2013 www.ti.com REGULATING VOUT It is possible to regulate the negative output of the LM828 by use of a low dropout regulator (such as the LP2980). The whole converter is depicted in Figure 16. This converter can give a regulated output from -1.8V to -5.5V by choosing the proper resistor ratio: Vout = Vref (1 + R1/R2) where, Vref = 1.23V (6) (7) Note that the following conditions must be satisfied simultaneously for worst case design: Vin_min >Vout_min +Vdrop_max (LP2980) + Iout_max x Rout_max (LM828) Vin_max < Vout_max +Vdrop_min (LP2980) + Iout_min x Rout_min (LM828) (8) (9) (10) (11) Figure 16. Combining LM828 with LP2980 to Make a Negative Adjustable Regulator 8 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LM828 LM828 www.ti.com SNOS035D - MARCH 2010 - REVISED MAY 2013 REVISION HISTORY Changes from Revision C (May 2013) to Revision D * Page Changed layout of National Data Sheet to TI format ............................................................................................................ 8 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LM828 9 PACKAGE OPTION ADDENDUM www.ti.com 2-Nov-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) LM828M5 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI LM828M5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LM828M5X NRND SOT-23 DBV 5 3000 TBD Call TI Call TI LM828M5X/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM Op Temp (C) Device Marking (4/5) S08A -40 to 85 S08A S08A -40 to 85 S08A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 2-Nov-2017 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) LM828M5 SOT-23 DBV 5 1000 178.0 8.4 LM828M5/NOPB SOT-23 DBV 5 1000 178.0 LM828M5X SOT-23 DBV 5 3000 178.0 LM828M5X/NOPB SOT-23 DBV 5 3000 178.0 3.2 3.2 1.4 4.0 8.0 Q2 8.4 3.2 3.2 1.4 4.0 8.0 Q2 8.4 3.2 3.2 1.4 4.0 8.0 Q2 8.4 3.2 3.2 1.4 4.0 8.0 Q2 Pack Materials-Page 1 W Pin1 (mm) Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM828M5 SOT-23 DBV 5 1000 210.0 185.0 35.0 LM828M5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM828M5X SOT-23 DBV 5 3000 210.0 185.0 35.0 LM828M5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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