(INTERSIL FEATURES Switches Analog Signals up to 20 Volts Peak-to- Peak Each Channel Complete Interfaces with Most Integrated Logic Switching Speeds Less than 0.5.8 InoFF) Less than 500pA Typical at 70C Effective rason) 50 to 500 Commercial and Military Temperature Range Operation IH5009 IH5024 Virtual Ground Analog Switches GENERAL DESCRIPTION The 1H5009 series of analog switches were designed to fill the need for an easy-to-use, Inexpensive switch for both In- dustrial and military applications. Although low cost Is a primary design objective, performance and versatility have not been sacrificed. Each package contains up to four channels of analog gating and Is designed to eliminate the need for an exter- nal driver. The odd numbered devices are designed to be driven directly from T2L open collector logic (15 volts) while the even numbered devices are driven directly from low level T2L logic (5 volts). Each channel simulates a SPDT switch. SPST switch action is obtained by leaving the diode cathode unconnected; for SPDT action, the cathode should be grounded (OV). The parts are intended for high performance multiplexing and commutating usage. A logic 0 turns the channel ON and a logic 1 turns the channel OFF. PIN CONNECTIONS OUTLINE DwGs DD, PD, JD 1H5009 (roan) < 1009) 1H5010 (rosiony = 1509) 14 PIN DIP oe ewe + 7 1H5015 (tpsiony $1000) 1H5016 (pg;ony = 1509) 16 PIN DIP a 7 OUTLINE DE, PE, 8 PIN DIP 1H5021 (fpson) 1009) / ouriine 1H5022 (rpgion) = 1500) ( was ) 8 PIN DIP BD, PA, dB 20+ 1 ro 4 30-4 ] : | MH 4 t \ (Note: Numbers in brackets refer to CERDIP packages.) 3-91 1H5011 (roscon $ 1009) 1H6012 (losron) = 1500) 16 PIN DIP 015 1H5017 (rogion) < 1000) 1H5018 (rogion < 1500) 1H5013 (rpgon) = 1000) 1H5014 (rpsiony = 1500) 14 PIN DIP OUTLINE DWGS DD, PE, JE OUTLINE DwGs DE, PE, JE owen See i t I 1H5019 (tpgcon) = 1000) 1H5020 (rogiony = 1500) 8 PIN DIP OUTLINE OWGS DE, PA, JE OUTLINE DWGS DO, PA, JD, 5 6 ny (4) (93} 7 18) 1H5023 (rpson) = 1009) 1H5024 (Ipgion) = 1500) 8 PIN DIP OUTLINE DwGs DE, PA (GER ) - 1 10: s0-- sOF IH5009 IH5024 ABSOLUTE MAXIMUM RATINGS Positive Analog Signal Voltage Negative Analog Signal Voltage. . . Diode Current Power Dissipation (Note).......--......-..eeeaee 500mWw Storage Temperature ...... jee e teen ees 65C to + 150C Lead Temperature (Soldering, 10 sec) ............. 300C INWERSIL Operating Temperature 5009C Series............25-25. 2 0c eee 5009M Series Lead Temperature (Soldering, 10 sec) OC to + 70C -55C to + 125C 300C NOTE: Dissipation rating assumes device is mounted with all leads welded or soldered to printed circuit board in ambient temperature below 75C. For higher temperature, derat at rate of Smw/C. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (per channel) SPECIFICATION LIMIT Nee CHARACTERISTIC TYPE CONDRIONS eo 25C +1358 o UNITS (Note 4) (Note 2} MINIMAX Tye. MINIMAX MIN/MAX IN(ON) input Current-ON All Vin =OV, Ip = 2mA 0.1 Ot ot 100 al 4NIOFF) | Input Current-OFF SV Logic Ckts} Vin= +45, Va= + 10V 0.2 04 04 10 nA lin(OFF) [Input Current-OFF 18V Logic Ckts| Viy=+11V, Va= 2 10V 0.2 04 0.2 10 nA Vin(ony | Channel Contro! Voltage-ON 5V Logic Ckts| See Figure 5, Note 3 0.5 05 05 v Vin(ON) | Channel Control Voltage-ON | 15V Logic Ckts| See Figure 3, Note 3 V5 15 15 v VINOFF) | Channel Control Voltage-OFF | 5V Logic Ckts| See Figure 5, Note 3 45 46 45 v VIN(OFF) | Channel Control Voltage-OFF | 15V Logic Ckts| See Figure 3, Note 3 11.0 41.0 11.0 v 'DYOFF) Leakage Current-OFF 5V Logic Ckts} Vin = +45. Va = 2 10V 0.2 02 0.2 10 nA ID(OFF) Leakage Current OFF 15V Logic Ckts} ViIN= +11V, Va= + 10V 0.2 02 0.2 10 nA ID(ON) _) Leakage Current-ON 5V Logic Ckts} VIN =OV, Ig = ImA 10 | 0.30 10 oO oO nA ION) _{ Leakage Current-ON 18V Logic Ckts} Vin =OV, Ig = 1mA 05 0.10 05 300 o nA 'ovon) __ [ Leakage Current-ON SV Logic Ckts| Vin =0V, ig = ama 10 1.0 10 BA 'oKON) Leakage Current-ON 15V Logic Ckts] Vin =0V, is = 2mA 20 2.0 1000 nA roS(Ony) | Drain-Source ON-Resistance | SV Logic Ckts} Ip =2mA, Vin =0.5V 180 90 150 aoe a a tpS(On) | Drain-Source ON-Resistance | 15V Logic Ckts| 1p =2mA, Vin =1.5V 400 60 100 seg 'o a tony | Turn-ON Time Alt See Figures 3 & 4 150 500 ns Yotf Turn-OFF Time All See Figures 3 & 4 300 500 ns cT Cross Talk All t= 100Hz ~ 120 0B NOTE 1: (OFF) and (ON) subscript notation refers to the conduction state of the FET switch for the given test. NOTE 2: Refer to Figure 2 for definition of terms. NOTE 3: Vino and Viaworr) afe test conditions guaranteed by the tests of respectively fosion) ANd InorR)- NOTE 4: 5V Logic CKTS applies to even-numbered devices. 15V Logic CKTS applies to odd-numbered devices. ORDERING INFORMATION BASIC | scr | CHANNELS | LOGIC | packaaes tH5009 4 +15 J0,00,PD 1H5010 4 +5 Jp,0D,PO 15014 | 4 +15 | JE,DE,PE 1H5012 4 +5 JE,DE,PE PA 8-PIN PLASTIC DIP IH5013 3 +15 | JD,DD.PD = 1 Pe = ee PLASTIC De | i604 3] 8 | w.80. DD 14-PIN CERAMIC DIP (Special Order Only) tH5015. 3 +15 JE,DE,PE PACKAGE De = 16PIN CERAMIC DIP (Special Order Only) 1s016 3 TS JEDEPE JE 16-PIN CERDIP 1H5017 2 +15 JD,DD,PA TEMPERATURE RANGE 1H5018 2 45 JD,DD,PA M = MILITARY (-55C to + 128C) C = COMMERCIAL (0C to +70C) 1H5019 2 +15 JE,DE,PA BASIC PART NUMBER 1H5020 2 +5 JE,DE,PA 15021 4 +15 JD,DD,PA IH5022 1 + 5 | JD.DD,PA 145023 1 +15 JE,DE,PA 15024 1 +5 JE,DE,PA 3-92 NOTE: Mil-Temperature range (-55C to +125 C) available ceramic packages Only.IH5009 IH5024 DNINERSOL TYPICAL ELECTRICAL CHARACTERISTICS (per channel) ID(orF) VS. TEMPERATURE pony VS. Ig AT 25C (pcony VS. TEMPERATURE = z < 1000 $ . 2 z & 3 3 1 1 e 5 i 5 z z = & @ c = x Ss, 2 3 GB 100 oO oO 4 g g g < q od Pa 4 ra < < a a 3 Va a 5 1 Is ~ I ' = R > < g 1 & % O5 : 20 25 5 25 2 6 25 50 75 100 & 1, SOURCE CURRENT (mA) = TEMPERATURE { C) 2 TEMPERATURE (C) CROSSTALK MEASUREMENT CIRCUIT Rpsion) VS. TEMPERATURE CROSSTALK AS A FUNCTION . {NORMALIZED TO 25 C VALUE} OF FREQUENCY 10 ke o 14 Ry AAA g : WwW 2, 40 ka FET ON a"? a 4 z x x Vout Z 3 Zio = 6 3 g 8 , Roston < 08 oS z 3 = a 2 Zo6 30 0 25 50 75 100 1 100 1K 10K : 100K IM TEMPERATURE | C) FREQUENCY (Hz) +5V (5010 ETC) + 15V (5009 ETC) DEVICE SCHEMATICS AND PIN CONNECTIONS FOUR CHANNEL THREE CHANNEL 1H5009 (rog,on) = 1008) 1H5011 (rogion) < 1001) 1H5013 (rogiony < 1000) 1H5015 (rpsion < 10002) 1H5010 (rpgiony = 15082) IH5012 (rpgiony = 150%) 1H5014 (rosion) = 1500) JH5016 (ragion < 1500) 14 PIN DIP 16 PIN DIP 14 PIN DIP 16 PIN DIP ra} a ery yy " " 9 12 10 a a 2 10 4 16 13 15 TWO CHANNEL SINGLE CHANNEL 1H5017 (tpgon) < 1000) 1H5019 (tog,on) = 1002) 1H5021 (tog;on) 1008) 1H5023 (tps;on) = 100%) 1H5018 (rpg;on) = 1502) 1H5020 (rpsjony 1509) 1H5022 (rpg;ony 15012) 1H5024 (rog;on < 1502) 8 PIN DIP 8 PIN DIP 8 PIN DIP 8 PIN DIP Ey Try CE SEY TOT tT 4 z po ys p 3 ' 5 4 2 6 a 5 7 3-93IH5009 IH5024 THEORY OF OPERATION The signals seen at the drain of a junction FET type analog switch can be arbitrarily divided into two categories; those which are less than + 200mV, and those which are greater than+200mV. The former category includes ail those circuits where switching is performed at the virtual ground point of an op-amp, and it is primarily towards these applications that the IH5009 family of circuits is directed. By limiting the analog signal at the switching point to +200mV, no external driver is required and the need for additional power supplies is eliminated. Devices are available with both common drains and with uncommitted drains. Those devices which feature common drains have another FET in addition to the channel switches. This FET, which has gate and source connected such that Ves =0. is intended to compensate for the on- resistance of the switch. When placed in series with the feedback resistor (Figure 1) the gain is given by 10kK2 + rpsjon) (CoOMpensator} GAIN 10k2+ rps (switch) COMPENSATION T \ SERIES . ELEMENT \ ANALOG we KE \NPUT ANALOG OUTPUT Figure 1. Use of Compensation FET INTERSIL Clearly, the gain error caused by the switch is depen- dent on the match between the FETs rather than the absolute value of the FET on-resistance. For the standard product, all the FETs in a given package are guaranteed to match within 502. Selections down to 59 are available however. Contact factory for details. Since the absolute value of ros;on iS guaranteed only to be less than 1002 of 1500, a substantial improve- ment in gain accuracy can be obtained by using the compensating FET. DEFINITION OF TERMS Rosion) COMPENSATING ELEMENT . Ss | 2 Is Jo gm < SERIES ELEMENT Va o- 5 = 3 Sye |g tin SHUNT = Vin ELEMENT Figure 2. NOISE IMMUNITY The advantage of SPDT switching is high noise im- munity when the series elements is OFF. For example, if a + 10V analog input is being switched by T2L open collector logic. the series switch is OFF when the logic level is at + 15 volts. At this time. the diode con- ducts and holds the source at approximately +0.7 volts with an AC impedance to ground of 25 ohms. Thus random noise superimposed on the +10 volt analog input will not falsety trigger the FET since the noise voltage will be shunted to ground. When switching a negative voitage. the input further increases the OFF voltage beyond pinch-off. so there is no danger of the FET turning on. SWITCHING CHARACTERISTICS Va =: 10V Eout (Cr= 10 pFt 14.<0. us outeuT Vast0V OUTPUT Vas 10V Figure 3. High Level Logic 3-94 Va = 210V 5K +5V Eout (Cy < 10 pF} wit Les vin o Vin sv PW = Sus 2.5 25V t<O.1us torr K y<O.1~s OVO wre - so Ine ow 90% ton ~ OV =. 90% QUTPUT 90% Va=-t ~ A OY ore Tov Figure 4. Standard DTL, TTL, RTL1H5009 IH5024 LOGIC INTERFACE CIRCUITS ANALOG INPUT (Va) we~ ee ---4 Is ' 1 ' t \ Figure 5. Interfacing with +5V Logic INTERSIL ANALOG INPUT {Vin} ke ANALOG OUTPUT Figure 6. interfacing with +15V Open Collector Logic APPLICATIONS (Note) 1 ae Oke > Ph ae 2 10K2 \ ' t \ 1 1 1 3| ! i ; 1 =i6 400 KO i Lot | 1 I t 5! : 1 \ 1 1 Tle ime ' po AWA | ' 1 a v | Tet \ =f 13 10Mo 1 v i : ' : ~Vout ~~ -|--]--]--|--=[ ps cnanactenistics cain = [20 = nye 010706 * GAIN SELECT OF tHs008/IHHIOIO pO po anaco |g hen INPUTS 9 posse TTT 4 WKO 13} 1 \ TJ: ude -|-- J. J 2 4 120107 08 O14 CHARACTERISTICS TYPICAL OUTPUT VOLTAGE DRIFT = i CHANNEL <SmV/s0e NOTE: Additional applications information is given in Application Bulletins A003 Understanding and Applying the Analog Switch and A004 The 5009 Series of Low Cost Analog Switches. See also September '79 issue of Product Engineering Analog Switching by Paresh Maniar. 3-95