KINETIS KW41Z/31Z/21Z WIRELESS MCU FAMILY BLOCK DIAGRAM
Memories Transceiver
System
Core
Analog Clocks
Security
Communications Timers
AES-128
True Random
Number Generator
2 x SPI
2 x I2C
Internal and
External Watchdogs
DMA
DC-DC Converter
Internal Reference
Clocks
Low-/High-
Frequency Osc.
Low-Leakage
Wake-Up Unit
FlexTimers
Programmable
Delay Block
Independent Real-
Time Clock
Periodic Interrupt
Timers
Low-Power Timer
ARM® Cortex®-M0+
48 MHz
Debug
Interfaces
Interrupt
Controller
Up to 512 KB
Flash
Up to 128 KB
SRAM
16-bit ADC
12-bit DAC
Balun
LPUART
GPIO w/ IRQ
Capabilities
Frequency-Locked
Loop
BLE 4.2 and
802.15.4 radio
6-bit ACMP
TSI
CMT
KINETIS KW41Z/31Z/21Z WIRELESS MCU FAMILY BLOCK DIAGRAM
KW41Z/31Z/21Z MCUs offer multi-
protocol support which allow the
system to concurrently operate in an
802.15.4 based network, like Thread,
and a BLE network, eliminating the need
for multiple radios, reducing system
complexity and cost. With up to 512 KB
of flash and up to 128 KB of SRAM on
chip, KW41Z/31Z/21Z MCUs provide an
option for running all your connectivity
needs in a single device.
Take advantage of the robust enablement
package that includes the BLE host stack,
generic FSK, Thread® stack, 802.15.4
MAC and Simple MAC (SMAC) software
protocol stacks, RTOS, development
tools and IDEs. These tools are designed
for use with Kinetis KW41Z/31Z/21Z
MCUs and are fully integrated in the
Kinetis software development kit (KSDK).
ENABLEMENT
}Freedom development board
}USB dongle for sniffer applications
or connection to PC
}BLE v4.2 host
stack and application profiles
}Generic FSK at 250, 500 and
1000 kbit/s
}802.15.4 MAC/PHY support
}Thread® network stack
}Support for host MCU and MPU
(Linux®) processors
}Support for IAR Embedded
Workbench® and NXP’s
MCUXpresso IDEs
}Full integration with NXP’s
MCUXpresso SDK
}Multiple reference designs
}Support for multiple RTOSes
including FreeRTOS™
KINETIS KW41Z/31Z/21Z FAMILY
Features Benefits
Dual-mode concurrent BLE and 802.15.4 radio
capability with Kinetis® KW41Z MCUs
Supports concurrent operations in a single chip
between an 802.15.4 and BLE network lowering
system cost and complexity
6.8 mA typical Rx and 6.1 mA Tx current with DC-DC
activated Significantly reduces power consumption and
extends battery life
-95 dBm typical BLE sensitivity
-100 dBm typical generic FSK (at 250 kbit/s) sensitivity
-100 dBm typical 802.15.4 sensitivity
+3.5 dBm maximum output power
High link budget improves range and lowers cost
by reducing the need for external power amplifiers
Integrated balun enables smaller design and
reduces system costs
Excellent selectivity and blocking Significantly improves operation in harsh
2.4 GHz environments such as condominiums and
apartments
48 MHz ARM® Cortex®-M0+ core
Up to 512 KB flash memory
Up to 128 KB SRAM
High-performance, low-power core with adequate
memory to run BLE, generic FSK and Thread®
protocol stacks and application
AES-128 accelerator
True random number generator
Fast encryption/decryption utilizing hardware
security algorithms for network commissioning and
transmissions of supported protocols
Buck-boost DC-DC converter working from 0.9 V to
4.2 V Supports a wide range of batteries from single
alkaline or coin-cell to Lithium-ion
16-bit analog-to-digital converter (ADC)
12-bit digital-to-analog converter (DAC)
6-bit high-speed analog comparator (CMP)
Supports high-performance on-chip analog at
the MCU level for sensor aggregation and other
sophisticated applications
7 x 7 QFN
3.9 x 3.8 WLCSP Smaller size and low component count reduces cost
Fast antenna diversity for 802.15.4 Allows the hardware to automatically select
between two antennas, improving reliability in
high-interference environments
Compatible with NXP MCU family Software protocol stacks, tools and IDE are
compatible with Kinetis MCUs, and integrated
in the Kinetis software development kit (KSDK)