MC100ES6139DW - Motorola / Freescale Semiconductor

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA Order Number: MC100ES6139/D

Rev 0, 05/2003

©Motorola, Inc. 2003

Preliminary Information

2.5V/3.3V

ECL/PECL/HSTL/LVDS ÷2/4,

÷4/5/6 Clock Generation Chip

The MC100ES6139 is a low skew ÷2/4, ÷4/5/6 clock generation chip

designed explicitly for low skew clock generation applications. The

internal dividers are synchronous to each other, therefore, the common

output edges are all precisely aligned. The device can be driven by either

a differential or single--ended ECL or, if positive power supplies are used,

LVPECL input signals. In addition, by using the VBB output, a sinusoidal

source can be AC coupled into the device. If a single--ended input is to be

used, the VBB output should be connected to the CLK input and bypassed

to ground via a 0.01 mF capacitor.

The common enable (EN) is synchronous so that the internal dividers

will only be enabled/disabled when the internal clock is already in the

LOW state. This avoids any chance of generating a runt clock pulse on

the internal clock when the device is enabled/disabled as can happen

with an asynchronous control. The internal enable flip--flop is clocked on

the falling edge of the input clock, therefore, all associated specification

limits are referenced to the negative edge of the clock input.

Upon startup, the internal flip--flops will attain a random state; therefore,

for systems which utilize multiple ES6139s, the master reset (MR) input

must be asserted to ensure synchronization. For systems which only use

one ES6139, the MR pin need not be exercised as the internal divider

design ensures synchronization between the ÷2/4 and the ÷4/5/6 outputs

of a single device. All VCC and VEE pins must be externally connected to

power supply to guarantee proper operation.

The 100ES Series contains temperature compensation.

Features

•Maximum Frequency >1.0 GHz Typical

•50 ps Output--to--Output Skew

•PECL Mode Operating Range: VCC = 2.375 V to 3.8 V

with VEE =0V

•ECL Mode Operating Range: VCC =0V

with VEE = --2.375 V to --3.8 V

•Open Input Default State

•Synchronous Enable/Disable

•Master Reset for Synchronization of Multiple Chips

•VBB Output

•LVDS and HSTL Input Compatible

This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.

MC100ES6139

DT SUFFIX

20 LEAD TSSOP PACKAGE

CASE 948E

DW SUFFIX

20 LEAD SOIC PACKAGE

CASE 751D

Device Package

ORDERING INFORMATION

MC100ES6139DT

MC100ES6139DTR2

TSSOP--20

MC100ES6139DW

MC100ES6139DWR2

SO--20

MC100ES6139

MOTOROLA TIMING SOLUTIONS2

CLK

Figure 1. 20--Lead Pinout (Top View)

CLK MR VCC

1718 16 15 14 13 12

43 56789

Q1 Q1 Q2 Q2 Q3 Q3 VEE

1920

VCC Q0

VBB

VCC

Z = Low--to--High Transition

ZZ = High--to--Low Transition

CLK EN FUNCTION

Divide

Hold Q0:3

Reset Q0:3

FUNCTION TABLES

DIVSELa Q0:1 OUTPUTS

Divide by 2

Divide by 4

DIVSELb0 Q2:3 OUTPUTS

Divide by 4

Divide by 6

Divide by 5

DIVSELb1

Warning: All VCC and VEE pins must be externally connected to

Power Supply to guarantee proper operation.

PIN DESCRIPTION

CLK*, CLK*

EN* ECL Sync Enable

FUNCTION

ECL Diff Clock Inputs

MR*

VBB ECL Reference Output

ECL Master Reset

Q0, Q1, Q0,Q1

Q2, Q3, Q2,Q3 ECL Diff ÷4/5/6 Outputs

ECL Diff ÷2/4 Outputs

DIVSELa*

DIVSELb0* ECL Freq. Select Input ÷4/5/6

ECL Freq. Select Input ÷2/4

DIVSELb1* ECL Freq. Select Input ÷4/5/6

VCC

VEE ECL Negative Supply

ECL Positive Supply

CLK

DIVSELb1

÷2/4

÷4/5/6

Figure 2. Logic Diagram

DIVSELa

DIVSELb0

* Pins will default low when left open.

VEE

DIVSELb0

DIVSELb1

DIVSELa

MC100ES6139

TIMING SOLUTIONS 3 MOTOROLA

CLK

Q(÷2)

Q(÷4)

Q(÷5)

Figure 3. Timing Diagram

Q(÷6)

Figure 4. Timing Diagram

CLK

RESET

Q(÷n)

tRR

Table 1. ATTRIBUTES

Characteristics Value

Internal Input Pulldown Resistor 75 kΩ

Internal Input Pullup Resistor 75 kΩ

ESD Protection Human Body Model

Machine Model

Charged Device Model

>2kV

> 100 V

>2kV

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

MC100ES6139

MOTOROLA TIMING SOLUTIONS4

Table 2. MAXIMUM RATINGSa

Symbol Parameter Condition 1 Condition 2 Rating Units

VCC PECL Mode Power Supply VEE =0V 4.6 V

VEE ECL Mode Power Supply VCC =0V -- 4 . 6 V

VIPECL Mode Input Voltage VEE =0V VI±VCC 4.6 V

ECL Mode Input Voltage

VCC =0V

VI²VEE -- 4 . 6 V

Iout Output Current Continuous

Surge

100

IBB VBB Sink/Source ±0.5 mA

TA Operating Temperature Range -- 4 0 t o + 8 5 °C

Tstg Storage Temperature Range --65 to +150 °C

θJA Thermal Resistance (Junction--to--Ambient) 0LFPM

500 LFPM

20 TSSOP

TBD

°C/W

0LFPM

500 LFPM

20 SOIC

TBD

°C/W

a Maximum Ratings are those values beyond which device damage may occur.

Table 3. DC CHARACTERISTICS, PECL (VCC =2.5V±5%, VEE =0V)

-- 4 0 °C 0°Cto85°C

Symbol Characteristic Min Typ Max Min Typ Max Unit

IEE Power Supply Current 35 35 mA

VOH Output HIGH Voltagea1415 1495 1620 1475 1545 1620 mV

VOL Output LOW Voltagea670 805 945 690 795 880 mV

VIH Input HIGH Voltage (Single--Ended) 1335 1620 1335 1620 mV

VIL Input LOW Voltage (Single--Ended) 690 1025 690 1025 mV

VBB Output Reference Voltage 1120 1240 1120 1240 mV

VPP Differential Input Voltageb0.12 1.3 0.12 1.3 V

VCMR Differential Cross Point Voltagec1.0 VCC-- 0 . 8 1.0 VCC-- 0 . 8 V

IIH Input HIGH Current 150 150 µA

IIL Input LOW Current 0.5 0.5 µA

NOTE: ES6014 circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The

circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.

a Output termination voltage VTT =0VforV

CC = 2.5V operation is supported but the power consumption of the device will increase.

PP (DC) is the minimum differential input voltage swing required to maintain device functionality.

CMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC) range

and the input swing lies within the VPP (DC) specification.

MC100ES6139

TIMING SOLUTIONS 5 MOTOROLA

Table 4. DC CHARACTERISTICS, PECL (VCC =3.3V±5%, VEE =0V)

-- 4 0 °C 0°Cto85°C

Symbol Characteristic Min Typ Max Min Typ Max Unit

IEE Power Supply Current 33 33 mA

VOH Output HIGH Voltagea2215 2295 2420 2275 2345 2420 mV

VOL Output LOW Voltagea1470 1605 1745 1490 1595 1680 mV

VIH Input HIGH Voltage (Single--Ended) 2135 2420 2135 2420 mV

VIL Input LOW Voltage (Single--Ended) 1490 1825 1490 1825 mV

VBB Output Reference Voltage 1920 2040 1920 2040 mV

VPP Differential Input Voltageb0.12 1.3 0.12 1.3 V

VCMR Differential Cross Point Voltagec1.0 VCC-- 0 . 8 1.0 VCC-- 0 . 8 V

IIH Input HIGH Current 150 150 mA

IIL Input LOW Current 0.5 0.5 mA

NOTE: MC100ES6139 circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.

The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.

a All loading with 50 Ωto VCC--2.0 volts.

PP (DC) is the minimum differential input voltage swing required to maintain device functionality.

CMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC) range

and the input swing lies within the VPP (DC) specification.

Table 5. DC CHARACTERISTICS, ECL (VCC =0V,V

EE =--3.0V±5%)

-- 4 0 °C 0°Cto85°C

Symbol Characteristic Min Typ Max Min Typ Max Unit

IEE Power Supply Current 33 33 mA

VOH Output HIGH Voltagea--1085 --1005 --880 --1025 --955 --880 mV

VOL Output LOW Voltagea--1830 --1695 --1555 --1810 --1705 --1620 mV

VIH Input HIGH Voltage (Single--Ended) --1165 --880 --1165 --880 mV

VIL Input LOW Voltage (Single--Ended) --1810 --1475 --1810 --1475 mV

VBB Output Reference Voltage --1380 --1260 --1380 --1260 mV

VPP Differential Input Voltageb0.12 1.3 0.12 1.3 V

VCMR Differential Cross Point VoltagecVEE+0.5 -- 0 . 3 VEE+0.5 -- 0 . 3 V

IIH Input HIGH Current 150 150 mA

IIL Input LOW Current 0.5 0.5 mA

NOTE: MC100ES6139 circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.

The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.

a All loading with 50 Ωto VCC--2.0 volts.

PP (DC) is the minimum differential input voltage swing required to maintain device functionality.

CMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC) range

and the input swing lies within the VPP (DC) specification.

MC100ES6139

MOTOROLA TIMING SOLUTIONS6

Table 6. DC CHARACTERISTICS, HSTL (VCC = 2.375 V to 3.8 V, VEE =0V)

-- 4 0 °C 0°Cto85°C

Symbol Characteristic Min Typ Max Min Typ Max Unit

VIH Input HIGH Voltage (Single Ended) 1200 1200 mV

VIL Input LOW Voltage (Single Ended) 400 400 mV

Table 7. AC CHARACTERISTICS (VCC =0V;V

EE =--3.0Vor V

CC =3.0V;V

EE =0V)

-- 4 0 °C25°C85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

fmax Maximum Frequency >1 >1 >1 GH

tPLH,

tPHL

Propagation Delay CLK, Q (Diff)

MR, Q

550

700

800

900

600

700

750

850

900

1000

675

800

825

950

975

1100

tRR Reset Recovery 200 100 200 100 200 100 ps

tsSetup Time EN,CLK

DIVSEL, CLK

200

400

120

180

200

400

120

180

200

400

120

180

thHold Time CLK,EN

CLK, DIVSEL

100

200

140

100

200

140

100

200

140

tPW Minimum Pulse Width MR 550 450 550 450 550 450 ps

tSKEW Within Device Skew Q, Q

Device--to--Device Skewb

200

100

300

200

100

300

200

100

300

tJITTER Cycle--to--Cycle Jitter <2 <2 <2 ps

VPP Input Voltage Swing (Differential) 150 800 1200 150 800 1200 150 800 1200 mV

VCMR Differential Cross Point Voltage

PECL

ECL

0.2

VEE+0.2

VCC-- 1 . 1

-- 1 . 1

0.2

VEE+0.2

VCC-- 1 . 1

-- 1 . 1

0.2

VEE+0.2

VCC-- 1 . 1

-- 1 . 1

Output Rise/Fall Times Q, Q

(20% -- 80%)

110 180 250 125 190 275 150 215 300 ps

a Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 Ωto VCC-- 2 . 0 V .

b Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are

measured from the cross point of the inputs to the cross point of the outputs.

VTT =VCC -- 2 . 0 V

Figure 5. Typical Termination for Output Driver and Device Evaluation

Ω

Driver

Device

Receiver

Device

50 Ω

VTT

Q D

MC100ES6139

TIMING SOLUTIONS 7 MOTOROLA

Marking Notes:

Device Nomenclature 20--Lead TSSOP Marking 20--Lead SOIC W/B Marking

MC100ES6139DT 6139

MC100ES6139DW MC100ES6139

Trace Code Identification for 20 SOIC: AWLYYWW

“A” -- The First character indicates the Assembly location.

“WL” -- The Second & Third characters indicate the Source Wafer Lot Tracking Code.

“YY” -- The Fourth & Fifth characters indicate the Year device was assembled.

“WW” -- The Sixth & Seventh characters indicate the Work Week device was assembled.

Trace Code Identification for 20 TSSOP:ALYW

“A” -- The First character indicates the Assembly location.

“L” -- The Second character indicates the Source Wafer Lot Tracking Code.

“Y” -- The Third character indicates the “ALPHA CODE” of the year device was assembled.

“W” -- The Fourth character indicates the “ALPHA CODE” of the Work Week device was assembled.

The “Y” Year ALPHA CODES The “W” Work Week ALPHA CODES

Year Month Work Week Code 1st 6 Months (WW01 -- WW26) 2nd 6 Months (WW27 -- WW52)

A = 2003 FIRST 6 MONTHS WW01 -- WW26 A = WW01 A = WW27

B = 2003 SECOND 6 MONTHS WW27 -- WW52 B = WW02 B = WW28

C = 2004 FIRST 6 MONTHS WW01 -- WW26 C = WW03 C = WW29

D = 2004 SECOND 6 MONTHS WW27 -- WW52 D = WW04 D = WW30

E = 2005 FIRST 6 MONTHS WW01 -- WW26 E = WW05 E = WW31

F = 2005 SECOND 6 MONTHS WW27 -- WW52 F = WW06 F = WW32

G = 2006 FIRST 6 MONTHS WW01 -- WW26 G = WW07 G = WW33

H = 2006 SECOND 6 MONTHS WW27 -- WW52 H = WW08 H = WW34

I = 2007 FIRST 6 MONTHS WW01 -- WW26 I = WW09 I = WW35

J = 2007 SECOND 6 MONTHS WW27 -- WW52 J = WW10 J = WW36

K = 2008 FIRST 6 MONTHS WW01 -- WW26 K = WW11 K = WW37

L = 2008 SECOND 6 MONTHS WW27 -- WW52 L = WW12 L = WW38

M = 2009 FIRST 6 MONTHS WW01 -- WW26 M = WW13 M = WW39

N = 2009 SECOND 6 MONTHS WW27 -- WW52 N = WW14 N = WW40

O = 2010 FIRST 6 MONTHS WW01 -- WW26 O = WW15 O = WW41

P = 2010 SECOND 6 MONTHS WW27 -- WW52 P = WW16 P = WW42

Q = 2011 FIRST 6 MONTHS WW01 -- WW26 Q = WW17 Q = WW43

R = 2011 SECOND 6 MONTHS WW27 -- WW52 R = WW18 R = WW44

S = 2012 FIRST 6 MONTHS WW01 -- WW26 S = WW19 S = WW45

T = 2012 SECOND 6 MONTHS WW27 -- WW52 T = WW20 T = WW46

U = 2013 FIRST 6 MONTHS WW01 -- WW26 U = WW21 U = WW47

V = 2013 SECOND 6 MONTHS WW27 -- WW52 V = WW22 V = WW48

W = 2014 FIRST 6 MONTHS WW01 -- WW26 W = WW23 W = WW49

X = 2014 SECOND 6 MONTHS WW27 -- WW52 X = WW24 X = WW50

Y = 2015 FIRST 6 MONTHS WW01 -- WW26 Y = WW25 Y = WW51

Z = 2015 SECOND 6 MONTHS WW27 -- WW52 Z = WW26 Z = WW52

= Assembly Location

20 TSSOP Tracecode Marking Example:

5ABR

= First Lot Assembled of this device in the designated Work WeekA

= 2003 Second 6 Months, WW27 -- WW52B

= WW44 of 2003R

MC100ES6139

MOTOROLA TIMING SOLUTIONS8

OUTLINE DIMENSIONS

DT SUFFIX

20 LEAD TSSOP PACKAGE

CASE 948E-02

ISSUE A

DIM

MIN MAX MIN MAX

INCHES

6.60 0.260

MILLIMETERS

B4.30 4.50 0.169 0.177

C1.20 0.047

D0.05 0.15 0.002 0.006

F0.50 0.75 0.020 0.030

G0.65 BSC 0.026 BSC

H0.27 0.37 0.011 0.015

J0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L6.40 BSC 0.252 BSC

M0808

____

110

1120

PIN 1

IDENT

-- T --

0.100 (0.004)

DGH

SECTION N--N

JJ1

-- W --

SEATING

PLANE

-- V --

-- U --

0.10 (0.004) V S

20X REFK

L/2

U0.15 (0.006) T

DETAIL E

0.25 (0.010)

DETAIL E

6.40 0.252

-- -- -- -- -- --

U0.15 (0.006) T

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. ICONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS. MOLD

FLASH OR GATE BURRS SHALL NOT EXCEED

0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE INTERLEAD

FLASH OR PROTRUSION. INTERLEAD FLASH

OR PROTRUSION SHALL NOT EXCEED 0.25

(0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN

EXCESS OF THE K DIMENSION AT MAXIMUM

MATERIAL CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE DETERMINED

AT DATUM PLANE --W--.

MC100ES6139

TIMING SOLUTIONS 9 MOTOROLA

OUTLINE DIMENSIONS

DW SUFFIX

20 LEAD SOIC PACKAGE

CASE 751D--06

ISSUE H

NOTES:

1. DIMENSIONS ARE IN MILLIMETERS.

2. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

3. DATUMSAANDBTOBEDETERMINEDAT

THE PLANE WHERE THE BOTTOM OF THE

LEADS EXIT THE PLASTIC BODY.

4. THIS DIMENSION DOES NOT INCLUDE MOLD

FLASH, PROTRUSION OR GATE BURRS.

MOLD FLASH, PROTRUSION OR GATE BURRS

SHALL NOT EXCEED 0.15mm PER SIDE. THIS

DIMENSION IS DETERMINED AT THE PLANE

WHERE THE BOTTOM OF THE LEADS EXIT

THE PLASTIC BODY.

5. THIS DIMENSION DOES NOT INCLUDE

INTER--LEAD FLASH OR PROTRUSIONS.

INTER--LEAD FLASH AND PROTRUSIONS

SHALL NOT EXCEED 0.25mm PER SIDE. THIS

DIMENSION IS DETERMINED AT THE PLANE

WHERE THE BOTTOM OF THE LEADS EXIT

THE PLASTIC BODY.

6. THIS DIMENSION DOES NOT INCLUDE

DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL NOT CAUSE

THE LEAD WIDTH TO EXCEED 0.62mm.

10 11

120

SEATING

PLANE

0.75 X45

10X

0.25 B

0.49

20X

0.25 AT

10.55

10.05

12.95

12.65

7.6

7.4 B

PIN 1 INDEX

PIN’S

NUMBER

0.25

1.0

0.4 0

0.32

0.23

SECTION A--A

0.35

2.65

2.35 0.25

0.10 6

20X

0.1 T

1.27

18X

MC100ES6139

MOTOROLA TIMING SOLUTIONS10

NOTES

MC100ES6139

TIMING SOLUTIONS 11 MOTOROLA

NOTES

MC100ES6139

MOTOROLA TIMING SOLUTIONS12

Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright

licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document.

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and

specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Motorola

data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including

“Typicals”, must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the

rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other

applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury

or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and holdMotorola

and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees

arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that

Motorola was negligent regarding the design or manufacture of the part.

MOTOROLA and the Stylized M Logo are registered in the US Patent and Trademark Office. All other product or service names are the property of their respective

owners. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

EMotorola Inc. 2003

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852--26668334

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MC100ES6139/D