a ONE TECHNOLOGY WAY AN-392 APPLICATION NOTE * P.O. BOX 9106 * NORWOOD, MASSACHUSETTS 02062-9106 * 617/329-4700 Circuit Design and Applications of the ADM663A/ADM666A Micropower Linear Voltage Regulators by Khy Vijeh, Matt Smith GENERAL INFORMATION The ADM663A/ADM666A contains a micropower bandgap reference voltage source; an error amplifier, A1; three comparators, C1, C2, C3, and a series pass output transistor. A P-channel FET and an NPN transistor are used on the ADM663A while the ADM666A uses an NPN output transistor. CIRCUIT DESCRIPTION The internal bandgap reference is trimmed to 1.3 V 30 mV. This is used as a reference input to the error amplifier A1. The feedback signal from the regulator output is supplied to the other input by an on-chip voltage divider or by two external resistors. When V SET is at ground, the internal divider tap between R1 and R2, provides the error amplifier's feedback signal giving a +5 V output. When V SET is at V IN , the internal divider tap between R2 and R3 provides the error amplifier's feedback signal giving a +3.3 V output. When V SET is at more than 50 mV above ground and less than 50 mV below V IN, the error amplifier's input is switched directly to the V SET pin, and external resistors are used to set the output voltage. The external resistors are selected so that the desired output voltage gives 1.3 V at V SET. Comparator C1 monitors the output current via the SENSE input. This input, referenced to V OUT(2), monitors the voltage drop across a load sense resistor. If the voltage drop exceeds 0.5 V, then the error amplifier A1 is disabled and the output current is limited. may be set using a suitable voltage divider connected to LBI. When the voltage on LBI falls below 1.3 V, the open drain output LBO is pulled low. 22k VIN VOUT2 VOUT1 0.5V 1.3V A1 C1 SENSE SHDN D E C O D E R VIN -50mV VSET C3 50mV R1 R2 A2 VTC 0.9V R3 ADM663A GND Figure 1. ADM663A Functional Block Diagram VOUT VIN 0.5V 1.3V A1 C1 SENSE SHDN The ADM663A has an additional amplifier, A2, which provides a temperature proportional output, V TC . If this is summed into the inverting input of the error amplifier, a negative temperature coefficient results at the output. This is useful when powering liquid crystal displays over wide temperature ranges. D E C O D E R C2 VIN -50mV VSET C3 50mV R1 LBI R2 The ADM666A has an additional comparator, C4, that compares the voltage on the low battery input, LBI, pin to the internal +1.3 V reference. The output from the comparator drives an open drain FET connected to the low battery output pin, LBO. The low battery threshold C2 C4 LBO 1.3V R3 ADM666A GND Figure 2. ADM666A Functional Block Diagram Both the ADM663A and the ADM666A contain a shutdown (SHDN) input that can be used to disable the error amplifier and hence the voltage output. The power consumption in shutdown reduces to less than 9 A. VIN SHDN ADM663A ADM666A +5V OUTPUT 0.1F +3.3V OUTPUT 0.1F GND VIN R1/R2 +5 V +3 V ADJ 0.5 ICL where R CL is the current sense resistor, I mum current limit. VSET GND SHDN CL is the maxi- The value chosen for R CL should also ensure that the current is limited to less than the 100 mA absolute maximum rating and also that the power dissipation will also be within the package maximum ratings. Figure 4. A Fixed +3.3 V Output Output Voltage Setting If V SET is not connected to GND or to V IN, the output voltage is set according to the following equation: V OUT = V SET x VOUT RCL = VOUT2 ADM663A ADM666A VSET Current Limiting Current limiting may be achieved by using an external current sense resistor in series with V OUT(2) . When the voltage across the sense resistor exceeds the internal 0.5 V threshold, current limiting is activated. The sense resistor is therefore chosen such that the voltage across it will be 0.5 V when the desired current limit is reached. +4.5V TO +16V INPUT 0.1F VSET Table I. Output Voltage Selection Figure 3. A Fixed +5 V Output SENSE R2 Figure 5. Adjustable Output VSET GND SHDN VIN +1.3V TO +15V OUTPUT R1 VOUT2 0.1F RCL GND +6V TO +16V INPUT SENSE VOUT2 ADM663A ADM666A Circuit Configurations For a fixed +5 V output the V SET input is grounded and no external resistors are necessary. This basic configuration is shown in Figure 3. For a fixed +3.3 V output, the V SET input is connected to V IN as shown in Figure 4. Current limiting is not being utilized so the SENSE input is connected to V OUT(2). VIN SENSE +2V TO +16V INPUT If current limiting is employed, there will be an additional voltage drop across the external sense resistor that must be considered when determining the regulators dropout voltage. (R1+ R 2) R1 If current limiting is not used, the SENSE input should be connected to V OUT(2). In this case, input current should be limited so that in case of short circuited output, device power dissipation does not exceed the rated maximum. where V SET = 1.30 V. The resistor values may be selected by first choosing a value for R1 and then selecting R2 according to the following equation: Shutdown Input (SHDN) The SHDN input allows the regulator to be turned off with a logic level signal. This will disable the output and reduce the current drain to a low quiescent (9 A maximum) current. This is very useful for low power applications. The SHDN input should be driven with a CMOS logic level signal since the input threshold is 0.3 V. In TTL systems, an open collector driver with a pull-up resistor may be used. V R 2 = R1x OUT - 1 1.30 The input leakage current on V SET is 10 nA maximum. This allows large resistor values to be chosen for R1 and R2 with little degradation in accuracy. For example, a 1 M resistor may be selected for R1, and then R2 may be calculated accordingly. The tolerance on V SET is guaranteed at less than 30 mV so in most applications, fixed resistors will be suitable. If the shutdown function is not being used, then it should be connected to GND. -2- Low Supply or Low Battery Detection The ADM666A contains on-chip circuitry for low power supply or battery detection. If the voltage on the LBI pin falls below the internal 1.3 V reference, then the open drain output LBO will go low. The low threshold voltage may be set to any voltage above 1.3 V by appropriate resistor divider selection. High Current Operation The ADM663A contains an additional output, V OUT1 , suitable for directly driving the base of an external NPN transistor. Figure 8 shows a configuration which can be used to provide +5 V with boosted current drive. A 1 current sensing resistor limits the current at 0.5 A. VIN V R 3 = R 4 BATT - 1 1.3 V + VIN 10F VOUT1 VOUT2 where R3 and R4 are the resistive divider resistors and V BATT is the desired low voltage threshold. ADM663A SHUTDOWN SENSE R3 VOUT ADM666A LBI R4 R2 VSET LBO SHDN LOW GND BATTERY OUTPUT R1 Figure 6. ADM666A Adjustable Output with Low Battery Detection Low Output Detection The circuit in Figure 7 will generate a low LBO when output voltage drops below a preset value determined by the following equations: TCV OUT = V R 3 = (R1+ R 2) OL - 1 1.3 VSET R3 R1 VTC R3 2.82M Figure 9. ADM663A Temperature Proportional Output LBI R2 31k VSET R2 0.1F SENSE GND VOUT VOUT2 ADM663A VOUT = 5V SHDN -R 2 (TCV TC ) R3 SENSE VOUT LBO +5V, 0.5A OUTPUT where V SET = +1.3 V, V TC = +0.9 V, TCV TC = +2.5 mV/ C for V OUT = 5.0 V nominal, V OL = 3% of V OUT = 4.85 V and R1 = 1 M solving the equations simultaneously we will get R2 = 31 k and R3 = 2.82 M . 0.1F 10F R2 R2 V OUT = V SET 1+ (V - V TC ) + R1 R 3 SET V R 2 + R 3 = R1 OUT - 1 1.3 VIN + Temperature Proportional Output The ADM663A contains a V TC output with a positive temperature coefficient of +2.5 mV/ C typ. This may be connected to the summing junction of the error amplifier (V SET) through a resistor resulting in a negative temperature coefficient at the output of the regulator. This is especially useful in multiplexed LCD displays to compensate for the inherent negative temperature coefficient of the LCD threshold. At +25 C, the voltage at the VTC output is typically 0.9 V. The equations for setting both the output voltage and the tempco are given below. If this function is not being used, then V TC should be left unconnected. +1.3V TO +15V OUTPUT RCL SENSE GND Figure 8. ADM663A Boosted Output Current (0.5 A) +2V TO +16V INPUT VIN VSET 100 1.0 SHDN Since the LBI input leakage current is less than 10 nA, large values may be selected for R3 and R4 in order to minimize loading. For example, a 6 V low threshold may be set using 10 M for R3 and 2.7 M for R4. 2N4237 R1 1M Figure 7. Voltage Regulator Circuit with Low Output Detector -3- APPLICATION HINTS Input-Output (Dropout Voltage) A regulator's minimum input-output differential or dropout voltage determines the lowest input voltage for a particular output voltage. The ADM663A/ADM666A dropout voltage is 1 V at 100 mA output current. For example when used as a fixed +5 V regulator, the minimum input voltage is +6 V. At lower output currents (IOUT < 10 mA) on the ADM663A, V OUT1 may be used as the output driver in order to achieve lower dropout voltages. In this case the dropout voltage depends on the voltage drop across the internal FET transistor. This may be calculated by multiplying the FET's saturation resistance by the output current, for example with V IN = 9 V, R SAT = 20 . Therefore, the dropout voltage for 5 mA is 100 mV. As the current limit circuitry is referenced to V OUT2 , V OUT2 should be connected to V OUT1 . For high current operation V OUT2 should be used alone and V OUT1 left unconnected. +6V TO +16V INPUT VIN PD = Power Dissipation (W) JA = Junction to Ambient Thermal Resistance ( C/W) If the device is being operated at the maximum permitted ambient temperature of +85 C, the maximum power dissipation permitted is: PD (max ) = (TJ (max) - TA)/(JA ) PD (max) = (125 - 85)/( JA) = 40/ JA JA = 120 C/W for the 8-pin DIP (N-8) package JA = 170 C/W for the 8-pin SOIC (R-8) package Therefore, for a maximum ambient temperature of 85 C PD (max) = 333 mW for N-8 PD (max ) = 235 mW for R-8 At lower ambient temperatures the maximum permitted power dissipation increases accordingly up to the maximum limits specified in the absolute maximum specifications. SENSE ADM663A +5V OUTPUT VOUT2 VOUT1 The thermal impedance ( JA ) figures given are measured in still air conditions and are reduced considerably where fan assisted cooling is employed. Other techniques for reducing the thermal impedance include large contact pads on the printed circuit board and wide traces. The copper will act as a heat exchanger thereby reducing the effective thermal impedance. VSET GND SHDN Figure 10. Low Current, Low Dropout Configuration Thermal Considerations The ADM663A/ADM666A can supply up to 100 mA load current and can operate with input voltages up to 16.5 V, but the package power dissipation and hence the die temperature must be kept within the maximum limits. The package power dissipation is calculated from the product of the voltage differential across the regulator times the current being supplied to the load. The power dissipation must be kept within the maximum limits given in the Absolute Maximum Ratings section. High Power Dissipation Recommendations Where excessive power dissipation due to high input-output differential voltages and or high current conditions exists, the simplest method of reducing the power requirements on the regulator is to use a series dropping resistor. In this way the excess power can be dissipated in the external resistor. As an example, consider an input voltage of +12 V and an output voltage requirement of +5 V @ 100 mA with an ambient temperature of +85 C. The package power dissipation under these conditions is 700 mW which exceeds the maximum ratings. By using a dropper resistor to drop 4 V, the power dissipation requirement for the regulator is reduced to 300 mW which is within the maximum specifications for the N-8 package at +85 C. The resistor value is calculated as R = 4/0.1 = 40 . A resistor power rating of 400 mW or greater may be used. PD = ( VIN-VOUT) (I L) The die temperature is dependent on both the ambient temperature and on the power being dissipated by the device. The ADM663A/ADM666A contains an internal thermal limiting circuit which will shut down the regulator if the internal die temperature exceeds 125 C. Therefore, care must be taken to ensure that, under normal operating conditions, the die temperature is kept below the thermal limit. Bypass Capacitors The high frequency performance of the ADM663A/ ADM666A may be improved by decoupling the output using a filter capacitor. A capacitor of 0.1 F is suitable. TJ = TA + PD (JA ) This may be expressed in terms of power dissipation as follows: An input capacitor helps reduce noise, improves dynamic performance and reduces the input dV/dt at the regulator input. A suitable input capacitor is 0.1 F or greater. PD = (TJ - T A)/(JA ) where: TJ = Die Junction Temperature ( C) TA = Ambient Temperature ( C) -4- Typical Performance Characteristics 80 2.0 VINDC = +9V 1.8 VIN p-p = +2V VOUT DC = +5V TA = +25C 1.6 663A/666A TA = +25C 60 VI N - VOUT - Volts PSRR - dB 1.4 40 20 1.2 1.0 VIN = +9V VIN = +2V 0.8 0.6 VIN = +15V 0.4 0.2 0.0 0 0.01 0.1 1 10 100 1000 0 10000 20 40 60 80 100 120 IOUT - mA FREQUENCY - Hz Figure 14. ADM663 VOUT2, ADM666 Input-Output Differential vs. Output Current Figure 11. Power Supply Rejection Ratio vs. Frequency 2.0 1.8 VIN = +2V C2 = 10F TA = +25C (VIN - VOUT ) - Volts 1.6 1.4 1.2 1.0 VIN = 9V 0.8 10F SCOPE VIN C2 80 0-4V 0.6 VIN = +9V 0.4 VIN = +15V 0.2 0 0 2 4 6 8 10 12 14 16 18 C2 = 1F 20 IOUT1 - mA Figure 12. ADM663A VOUT1 Input-Output Differential vs. Output Current 50mV 12 Figure 15. Load Transient Response TA = +25C 2.0A LDO Voltage Regulator with Short Circuit Protection In battery powered systems, battery life is significantly affected by the voltage regulator's dropout voltage. These systems often require low dropout linear regulators capable of high output current and extremely low quiescent current. 10 8 IIN - A VOUT = +5V 6 VOUT = +3.3V 4 The circuit in Figure 16 can source current in excess of 2 A with less than 400 mV dropout voltage and consumes less than 10 A in shutdown mode. The c ircuit exhibits excellent line and load regulation and better than 5% initial output voltage accuracy. 2 0 2 4 6 8 10 12 14 200s 16 VIN - Volts Unlike other LDO voltage regulators which require large capacitors in excess of 10 F for stability, a very small 0.1 F bypass capacitor is sufficient for this circuit. Figure 13. Quiescent Current vs. Input Voltage -5- VIN = 5.5 + 1F Q1 - For high current applications where low dropout voltage is not required, a power Darlington transistor can be substituted to take advantage of its relatively high . The trade-off of this approach is higher power dissipation due to Darlington's high saturation voltage. 5V @ 2A 2N6111 R3 1k 0.1F R1 28k 1% 8 VIN VSET 6 R2 9.5k 1% ADM666A 5 VOUT SHDN GND 2 R4 5 SENSE 4 Output voltage is programmable between 1.3 V to 15.4 V by selecting appropriate resistor values for the voltage divider network using the following equation: 1 R1+ R 2 V OUT = 1.3 V R2 Figure 16. 2.0A LDO Regulator The circuit's performance is shown in Figures 18 and 19. The circuit's maximum current is determined by the selection of the pass transistor's current gain, , and its maximum power dissipation. For low dropout voltage, a viable choice is a PNP pass transistor with appropriate power dissipation and . The s implified functional diagram in Figure 17 helps clarify the circuit's operation. R3 1k 1F Q1 6 8 A1 5.0036 5.000 4.990 4.900 RL = 2.05 VOUT R1 28k 4.850 0.1F 4.800 R2 9.5k 4.750 5.0 Q2 1.3V ADM666 5.2 5.4 5.6 5.8 6.0 VIN 6.2 6.4 6.6 6.8 7.0 Figure 18. Output Voltage vs. Input Voltage 1 2 R4 5 0 VOUT - VARIATION - mV 4 0.0136 4.950 VOUT 2N6111 VIN 5.050 Figure 17. Simplified Functional Diagram The 2N6111 is in a servo loop with ADM666A's voltage reference, error amplifier and driver circuit. To maintain regulation, output voltage is continuously monitored by comparing the voltage on the set pin (Pin 6) to a 1.3 V internal voltage reference. The difference is amplified by the error amplifier, A1, and used to control the pass transistor's base current, thus controlling its collector current. As output voltage changes due to a change in input voltage or load current, the pass transistor's base current is adjusted to maintain a constant output voltage. 5 10 15 20 25 30 0 0.2 0.4 0.6 0.8 1.0 1.5 2.0 3.0 ILOAD - A Figure 19. Output Voltage Variation vs. Load Current The short circuit current is limited by limiting the pass transistor's base current, I b to a value determined by: Since maximum base current is limited to ADM666A's, short circuit current set by R4 to 100 mA, pass transistors with higher will source higher currents to the load. As a result, output short circuit current behavior of the circuit depends on the pass transistor's . Ib = 0.5 R4 The actual value of the short circuit current is determined by the of the pass transistor which in this case is in 30 to 150 range at a collector current of 3.0 A dc. Another significant advantage of using a pass transistor with high is to achieve higher efficiency since most of the input current is diverted to the load and only a small fraction of it is used to control the servo loop. For more accurate short circuit current control, the circuit in Figure 20 is a simple way to add short circuit protection. -6- RSC = 0.05 An N-channel power FET switch with very low R ON is used to achieve a very low dropout across the switch when it is ON. 2N6111 2k 1F 1N4728 3.3V, ZENER 2x 2N3906 VSET 6 50k ADM666 5 SHDN 850 20 Optional resistor R3 is used to compensate for constant losses by self-discharge or trickle charging of the battery. Consult the battery specification to determine trickle charge current and maximum permissible over charge current. 8 VIN 750k 0.1F R1 28k VOUT R2 9.5k 2 Resistor values used in this circuit are optimized for low power operation, when monitoring BAT-ON output; avoid excessive loads on this output. R4 5 GND SENSE 4 1 Shut-down pin should be tied to ground if it is not used. Figure 20. External Short Circuit Protection The short circuit current is determined by using the following equation: RSC D1 8 6 1F 0.1 = ISC 7 50k RL = 2.05 3 IB 4.6 I mA 70 8 4.4 ADM666 50 V 4.2 2 30 215 mW 5 4.0 5.6 VIN 5.8 6.0 5 Low Battery Disconnect Circuit To prevent damage to the battery and loss of data due to battery over-discharge, the circuit illustrated in Figure 23 monitors the battery voltage and disconnects the battery from the circuit when it drops below a preset value. 6V SEALED LEAD-ACID BATTERY SOURCE 6V 5.4 SHDN 4 Figure 22. LDO Regulator with Battery Crossover Switch Circuit 3.8 5.2 GND BAT ON 10 5.0 LBI SHUTDOWN VOLTAGE ACROSS PINS 8 AND 2 4.8 VIN 90 0.1F ADM666A R2 2.5M 5.0 V8-2 1 R1 7.31M 130 IB SENSE 3.3V 100mA 2 LBO 6V As the curve indicates, maximum power dissipation for controller occurs when input voltage is between 5.4 V to 5.6 V, worst case being 215 mW at V IN = 5.53 V, which is well within the product specification. 110 VSET 150k R3 VOUT 100k VP12A An appropriate heat sink must be utilized to avoid damage to the pass transistor as well as controller IC. Figure 21 is a plot of the current through the controller and voltage across it vs. input voltage at a constant load current. VIN R1 6.54M 7.0 R3 600k R2 2.5M Figure 21. Controller IC Power Dissipation + 8 1F R5 9.1M R4 2M 6 VIN VOUT 2N2222 3 LBI 5 SHDN 7 D2* MAIN V+ D3 MEMORY V+ VSET SENSE ADM666A However, the pass transistor requires adequate heat sink specially if it were to operate with large input output voltage differential. 2 1 D1* R6 10 0.1F LBO LBO * FOR BEST TEMPERATURE TRACKING PERFORMANCE, LDO Regulator with Battery Crossover Switch The circuit in Figure 22 automatically connects the standby battery to the circuit when primary voltage source is disconnected or drops below a preset voltage level. DIODES MUST BE IN THERMAL CONTACT. Figure 23. Low Battery Disconnect and Memory Backup Circuit Diode D2 is added for isolation; D1 is to compensate for voltage drop across D2. For better output voltage accuracy performance, diodes D1 and D2 must be in thermal contact. Surface mount Schottky diodes mounted in close proximity of each other offer the best temperature tracking performance. Battery ON voltage level is determined using the following equation: (V ) R1 = R 2 BAT - 1 V 1.3 -7- In battery disconnect mode, the circuit's quiescent current is less than 20 A. If LBO function is not needed or it is monitored via a high impedance input, the circuit's current consumption can be reduced significantly by replacing R4 with a short and R3 with a 9 M resistor. This circuit has less than 10 A quiescent current. Charge termination voltage, V T, and charge resume voltage, V CH , are set by R3, R4 and R5. Charging is terminated when battery voltage reaches V T. Charge termination voltage, which in this case is 7.2 V, is calculated using the following equation: 8 VIN VOUT + 1F SENSE R1 3 ADM666A ADM666A continues to monitor the battery voltage level; charging will resume when it drops below the V CH . The V CH level is set by adjusting R3. MAIN 5V MEMORY 5V 1 With resistor values selected in Figure 26, charging starts when the battery voltage is around V CH = 5 volts and will terminate when the battery voltage reaches slightly above 7.2 V. 0.1F 100k LBI R2 LBO 5 2 where R6 = 20 k , and R4 = 9.2 M . 51k 7 VP12A GND VSET 4 6 SHOULD BE CONNECTED TO GND IF NOT USED Charger status is indicated by the LED. A lighted LED indicates charger ON; a flashing LED indicates battery disconnect. 150k SHDN 5V NICD BACKUP + - To minimize calculation errors and maximize the circuit efficiency, LED current should be limited to about 2 mA. LOW BATTERY FLAG R3 E2032-12-5/95 V R 4 = (R 5 + R 6) T - 1 1.3 5 Volt Supply with Battery Backup and Battery ON Lag The circuit in Figure 24 switches to NiCd backup battery when the main input voltage drops below value set by R1, R2 and R3 and returns to the main input when its voltage reaches the preset value set by R3. HYST ADJ To minimize current drain by battery voltage monitoring circuit's, large resistor values are selected for R4 and R5 (see text for recommended values). Figure 24. 5 V Battery Powered Supply with Backup and Battery ON Flag Charge current is limited to 100 mA by a short circuit current limiting resistor. However higher charge current is possible using the circuit in Figure 26. The Battery ON flag goes low whenever the circuit is switched to NiCd battery. Low Cost Battery Charger Circuits A simple, low cost and yet flexible battery charger is presented in Figure 25. Maximum output voltage is programmed by selection of R1 and R2 ratio's using 22k VI N VOUT2 VOUT1 0.5V 1.3V ( V OUT ) R1= R 2 - 1 1. 3V A1 C1 SENSE SHDN D E C O D E R for V OUT = 7.8 V, R1 = 2.82 M , and R2 = 560 k . Maximum charge current is determined by the current limiting resistor which in this case is 100 mA set by R8. C2 VI N -50mV VSET C3 50mV 8 + 1F VOUT VIN SENSE 1 ADM666A R7 3k VSET R1 0.1F SHDN LBI LBO GND 4 R3 R4 9.2M 6 R2 5 R2 5 CELLS 2.82M GND 560k R3 270k VTC ADM663A Figure 26. High Charge Current Battery Charger 3 7 A2 0.9V Power PNP pass transistor with appropriate current rating is controlled by the ADM666A. R5 2M Available charge current is determined by the transistor's power rating, its current gain, , and controlled by the short circuit current limit resistor. R6 20k Figure 25. Low Cost Battery Charger -8- PRINTED IN U.S.A. VI N = 9V R1 2 R8 5