Features
•Fast Read Access Time – 90 ns
•Dual Voltage Range Operation
– Unregulated Battery Power Supply Range, 2.7V to 3.6V
or Standard 5V ± 10% Supply Range
•Compatible with JEDEC Standard AT27C010
•Low Power CMOS Operation
– 20 µA Max (Less than 1 µA Typical) Standby for VCC = 3.6V
– 29 mW Max Active at 5 MHz for VCC = 3.6V
•JEDEC Standard Packages
– 32-lead PLCC
– 32-lead TSOP
– 32-lead VSOP
•High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
•Rapid Programming Algorithm – 100 µs/Byte (Typical)
•CMOS and TTL Compatible Inputs and Outputs
– JEDEC Standard for LVTTL and LVBO
•Integrated Product Identification Code
•Industrial Temperature Range
•Green (Pb/Halide-free) Packaging Option
1. Description
The AT27BV010 is a high-performance, low-power, low-voltage 1,048,576-bit one-
time programmable read-only memory (OTP EPROM) organized as 128K by 8 bits. It
requires only one supply in the range of 2.7V to 3.6V in normal read mode operation,
making it ideal for fast, portable systems using either regulated or unregulated battery
power.
Atmel’s innovative design techniques provide fast speeds that rival 5V parts while
keeping the low power consumption of a 3V supply. At VCC = 2.7V, any byte can be
accessed in less than 90 ns. With a typical power draw of only 18 mW at 5 MHz and
VCC = 3V, the AT27BV010 consumes less than one fifth the power of a standard 5V
EPROM. Standby mode supply current is typically less than 1 µA at 3V. The
AT27BV010 simplifies system design and stretches battery lifetime even further by
eliminating the need for power supply regulation.
The AT27BV010 is available in industry-standard JEDEC-approved one-time
programmable (OTP) plastic PLCC, TSOP, and VSOP packages. All devices feature
two-line control (CE, OE) to give designers the flexibility to prevent bus contention.
The AT27BV010 operating with VCC at 3.0V produces TTL level outputs that are com-
patible with standard TTL logic devices operating at VCC = 5.0V. At VCC = 2.7V, the
part is compatible with JEDEC approved low voltage battery operation (LVBO) inter-
face specifications. The device is also capable of standard 5-volt operation making it
ideally suited for dual supply range systems or card products that are pluggable in
both 3-volt and 5-volt hosts.
1-Megabit
(128K x 8)
Unregulated
Battery-Voltage
OTP EPROM
AT27BV010
0344H–EPROM–12/07
2
0344H–EPROM–12/07
AT27BV010
Atmel’s AT27BV010 has additional features to ensure high quality and efficient production use.
The Rapid Programming Algorithm reduces the time required to program the part and guaran-
tees reliable programming. Programming time is typically only 100 µs/byte. The Integrated
Product Identification Code electronically identifies the device and manufacturer. This feature is
used by industry-standard programming equipment to select the proper programming algorithms
and voltages. The AT27BV010 programs exactly the same way as a standard 5V AT27C010
and uses the same programming equipment.
2. Pin Configurations
2.1 32-lead TSOP/VSOP (Type 1) Top View
2.2 32-lead PLCC Top View
Pin Name Function
A0 - A16 Addresses
O0 - O7 Outputs
CE Chip Enable
OE Output Enable
PGM Program Strobe
NC No Connect
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A11
A9
A8
A13
A14
NC
PGM
VCC
VPP
A16
A15
A12
A7
A6
A5
A4
OE
A10
CE
O7
O6
O5
O4
O3
GND
O2
O1
O0
A0
A1
A2
A3
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
A7
A6
A5
A4
A3
A2
A1
A0
O0
A14
A13
A8
A9
A11
OE
A10
CE
O7
4
3
2
1
32
31
30
14
15
16
17
18
19
20
O1
O2
GND
O3
O4
O5
O6
A12
A15
A16
VPP
VCC
PGM
NC
3
0344H–EPROM–12/07
AT27BV010
3. System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient
voltage excursions. Unless accommodated by the system design, these transients may exceed
datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency,
low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor
should be connected between the VCC and Ground terminals of the device, as close to the
device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards
with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again con-
nected between the VCC and Ground terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected to the array.
4. Block Diagram
Note: 1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
VCC + 0.75V DC which may be exceeded if certain precautions are observed (consult application notes) and which may
overshoot to +7.0V for pulses of less than 20 ns.
5. Absolute Maximum Ratings*
Temperature Under Bias.................................. -40°C to +85°C *NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
Storage Temperature ..................................... -65°C to +125°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V(1)
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V(1)
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V(1)
4
0344H–EPROM–12/07
AT27BV010
Notes: 1. X can be VIL or VIH.
2. Read, output disable, and standby modes require, 2.7V ≤ VCC ≤ 3.6V, or 4.5V ≤ VCC ≤ 5.5V.
3. Refer to Programming Characteristics. Programming modes require VCC = 6.5V.
4. VH = 12.0 ± 0.5V.
5. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled
low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.
6. Operating Modes
Mode/Pin CE OE PGM Ai VPP VCC Outputs
Read(2) VIL VIL X
(1) Ai X VCC DOUT
Output Disable(2) XV
IH XXXV
CC High Z
Standby(2) VIH XXXXV
CC High Z
Rapid Program(3) VIL VIH VIL Ai VPP VCC DIN
PGM Verify(3) VIL VIL VIH Ai VPP VCC DOUT
PGM Inhibit(3) VIH XX X V
PP VCC High Z
Product Identification(3)(5) VIL VIL X
A9 = VH(4)
A0 = VIH or VIL
A1 - A16 = VIL
XV
CC
Identification
Code
7. DC and AC Operating Conditions for Read Operation
AT27BV010-90
Industrial Operating Temperature (Case) -40°C - 85°C
VCC Power Supply 2.7V to 3.6V
5V ± 10%
5
0344H–EPROM–12/07
AT27BV010
Notes: 1. VCC must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP.
2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP
.
8. DC and Operating Characteristics for Read Operation
Symbol Parameter Condition Min Max Units
VCC = 2.7V to 3.6V
ILI Input Load Current VIN = 0V to VCC ±1µA
ILO Output Leakage Current VOUT = 0V to VCC ±5µA
IPP1(2) VPP(1) Read/Standby Current VPP = VCC 10 µA
ISB VCC(1) Standby Current ISB1 (CMOS), CE = VCC ±
0.3V 20 µA
ISB2 (TTL), CE = 2.0 to VCC + 0.5V 100 µA
ICC VCC Active Current f = 5 MHz, IOUT = 0 mA, CE = VIL,
VCC = 3.6V 8mA
VIL Input Low Voltage VCC = 3.0 to 3.6V -0.6 0.8 V
VCC = 2.7 to 3.6V -0.6 0.2 x VCC V
VIH Input High Voltage VCC = 3.0 to 3.6V 2.0 VCC + 0.5 V
VCC = 2.7 to 3.6V 0.7 x VCC VCC + 0.5 V
VOL Output Low Voltage
IOL = 2.0 mA 0.4 V
IOL = 100 µA 0.2 V
IOL = 20 µA 0.1 V
VOH Output High Voltage
IOH = -2.0 mA 2.4 V
IOH = -100 µA VCC - 0.2 V
IOH = -20 µA VCC - 0.1 V
VCC = 4.5V to 5.5V
ILI Input Load Current VIN = 0V to VCC ±1µA
ILO Output Leakage Current VOUT = 0V to VCC ±5µA
IPP1(2) VPP(1) Read/Standby Current VPP = VCC 10 µA
ISB VCC(1) Standby Current ISB1 (CMOS), CE = VCC ± 0.3V 100 µA
ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1 mA
ICC VCC Active Current f = 5 MHz, IOUT = 0 mA, CE = VIL 25 mA
VIL Input Low Voltage -0.6 0.8 V
VIH Input High Voltage 2.0 VCC + 0.5 V
VOL Output Low Voltage IOL = 2.1 mA 0.4 V
VOH Output High Voltage IOH = -400 µA 2.4 V
6
0344H–EPROM–12/07
AT27BV010
10. AC Waveforms for Read Operation(1)
Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to tCE-tOE after the falling edge of CE without impact on tCE.
3. OE may be delayed up to tACC-tOE after the address is valid without impact on tACC.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
9. AC Characteristics for Read Operation
VCC = 2.7V to 3.6V and 4.5V to 5.5V
Symbol Parameter Condition
-90
UnitsMin Max
tACC(3) Address to Output Delay CE = OE = VIL 90 ns
tCE(2) CE to Output Delay OE = VIL 90 ns
tOE(2)(3) OE to Output Delay CE = VIL 50 ns
tDF(4)(5) OE or CE High to Output Float, Whichever
Occurred First 40 ns
tOH
Output Hold from Address, CE or OE,
Whichever Occurred First 0ns
7
0344H–EPROM–12/07
AT27BV010
11. Input Test Waveform and Measurement Level
12. Output Test Load
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
tR, tF < 20 ns (10% to 90%)
Note: CL = 100 pF
including jig capacitance.
13. Pin Capacitance
f = 1 MHz, T = 25°C(1)
Symbol Typ Max Units Conditions
CIN 48pFV
IN = 0V
COUT 812pFV
OUT = 0V
8
0344H–EPROM–12/07
AT27BV010
14. Programming Waveforms(1)
Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer.
3. When programming the AT27BV010, a 0.1 µF capacitor is required across VPP and ground to suppress spurious voltage
transients.
9
0344H–EPROM–12/07
AT27BV010
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP
.
2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer
driven – see timing diagram.
3. Program Pulse width tolerance is 100 µsec ± 5%.
Note: 1. The AT27BV010 has the same Product Identification Code as the AT27C010. Both are programming compatible.
15. DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Symbol Parameter Test Conditions
Limits
UnitsMin Max
ILI Input Load Current VIN = VIL, VIH ±10 µA
VIL Input Low Level -0.6 0.8 V
VIH Input High Level 2.0 VCC + 1 V
VOL Output Low Voltage IOL = 2.1 mA 0.4 V
VOH Output High Voltage IOH = -400 µA 2.4 V
ICC2 VCC Supply Current (Program and Verify) 40 mA
IPP2 VPP Supply Current CE = PGM = VIL 20 mA
VID A9 Product Identification Voltage 11.5 12.5 V
16. AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.2V
Symbol Parameter Test Conditions(1)
Limits
UnitsMin Max
tAS Address Setup Time
Input Rise and Fall Times:
(10% to 90%) 20 ns
Input Pulse Levels:
0.45V to 2.4V
Input Timing Reference Level:
0.8V to 2.0V
Output Timing Reference Level:
0.8V to 2.0V
2µs
tCES CE Setup Time 2µs
tOES OE Setup Time 2µs
tDS Data Setup Time 2 µs
tAH Address Hold Time 0 µs
tDH Data Hold Time 2 µs
tDFP OE High to Output Float Delay(2) 0 130 ns
tVPS VPP Setup Time 2 µs
tVCS VCC Setup Time 2 µs
tPW PGM Program Pulse Width(3) 95 105 µs
tOE Data Valid from OE 150 ns
tPRT VPP Pulse Rise Time During Programming 50 ns
17. Atmel’s AT27BV010 Integrated Product Identification Code(1)
Codes
Pins Hex
DataA0 O7 O6 O5 O4 O3 O2 O1 O0
Manufacturer 0000111101E
Device Type 10000010105
10
0344H–EPROM–12/07
AT27BV010
18. Rapid Programming Algorithm
A 100 µs PGM pulse width is used to program. The address is set to the first location. VCC is
raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 µs
PGM pulse without verification. Then a verification/reprogramming loop is executed for each
address. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses are
applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been
applied, the part is considered failed. After the byte verifies properly, the next address is
selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes are
read again and compared with the original data to determine if the device passes or fails.
11
0344H–EPROM–12/07
AT27BV010
19. Ordering Information
Note: 1. The 32-lead VSOP package is not recommended for new designs.
19.1 Standard Package
tACC
(ns)
ICC (mA)
VCC = 3.6V
Ordering Code Package Operation RangeActive Standby
90 80.02
AT27BV010-90JI
AT27BV010-90TI
AT27BV010-90VI
32J
32T
32V(1)
Industrial
(-40°C to 85°C)
Note: Not recommended for new designs. Use Green package option.
19.2 Green Package (Pb/Halide-free)
tACC
(ns)
ICC (mA)
VCC = 3.6V
Ordering Code Package Operation RangeActive Standby
90 8 0.02 AT27BV010-90JU
AT27BV010-90TU
32J
32T
Industrial
(-40°C to 85°C)
Package Type
32J 32-lead, Plastic J-leaded Chip Carrier (PLCC)
32T 32-lead, Plastic Thin Small Outline Package (TSOP)
32V 33-lead, Plastic Thin Small Outline Package (VSOP)
12
0344H–EPROM–12/07
AT27BV010
20. Packaging Information
20.1 32J – PLCC
DRAWING NO. REV.
2325 Orchard Parkway
San Jose, CA 95131
R
TITLE
32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC) B
32J
10/04/01
1.14(0.045) X 45˚ PIN NO. 1
IDENTIFIER
1.14(0.045) X 45˚
0.51(0.020)MAX
0.318(0.0125)
0.191(0.0075)
A2
45˚ MAX (3X)
A
A1
B1 E2
B
e
E1 E
D1
D
D2
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL MIN NOM MAX NOTE
Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254 mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
3. Lead coplanarity is 0.004" (0.102 mm) maximum.
A 3.175 – 3.556
A1 1.524 – 2.413
A2 0.381 – –
D 12.319 – 12.573
D1 11.354 – 11.506 Note 2
D2 9.906 – 10.922
E 14.859 – 15.113
E1 13.894 – 14.046 Note 2
E2 12.471 – 13.487
B 0.660 – 0.813
B1 0.330 – 0.533
e 1.270 TYP
13
0344H–EPROM–12/07
AT27BV010
20.2 32T – TSOP
2325 Orchard Parkway
San Jose, CA 95131
TITLE DRAWING NO.
R
REV.
32T, 32-lead (8 x 20 mm Package) Plastic Thin Small Outline
Package, Type I (TSOP) B
32T
10/18/01
PIN 1
D1 D
Pin 1 Identifier
b
e
EA
A1
A2
0º ~ 8º c
L
GAGE PLANE
SEATING PLANE
L1
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL MIN NOM MAX NOTE
Notes: 1. This package conforms to JEDEC reference MO-142, Variation BD.
2. Dimensions D1 and E do not include mold protrusion. Allowable
protrusion on E is 0.15 mm per side and on D1 is 0.25 mm per side.
3. Lead coplanarity is 0.10 mm maximum.
A – – 1.20
A1 0.05 – 0.15
A2 0.95 1.00 1.05
D 19.80 20.00 20.20
D1 18.30 18.40 18.50 Note 2
E 7.90 8.00 8.10 Note 2
L 0.50 0.60 0.70
L1 0.25 BASIC
b 0.17 0.22 0.27
c 0.10 – 0.21
e 0.50 BASIC
14
0344H–EPROM–12/07
AT27BV010
20.3 32V – VSOP
2325 Orchard Parkway
San Jose, CA 95131
TITLE DRAWING NO.
R
REV.
32V, 32-lead (8 x 14 mm Package) Plastic Thin Small Outline
Package, Type I (VSOP) B
32V
10/18/01
PIN 1
D1 D
Pin 1 Identifier
b
e
EA
A1
A2
0º ~ 8º c
L
GAGE PLANE
SEATING PLANE
L1
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL MIN NOM MAX NOTE
Notes: 1. This package conforms to JEDEC reference MO-142, Variation BA.
2. Dimensions D1 and E do not include mold protrusion. Allowable
protrusion on E is 0.15 mm per side and on D1 is 0.25 mm per side.
3. Lead coplanarity is 0.10 mm maximum.
A – – 1.20
A1 0.05 – 0.15
A2 0.95 1.00 1.05
D 13.80 14.00 14.20
D1 12.30 12.40 12.50 Note 2
E 7.90 8.00 8.10 Note 2
L 0.50 0.60 0.70
L1 0.25 BASIC
b 0.17 0.22 0.27
c 0.10 – 0.21
e 0.50 BASIC
0344H–EPROM–12/07
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