DESCRIPTION
The Accutek AK53220482W high density memory module is a
CMOS dynamic RAM organized in 2048 x 32 bit words. The module
consists of sixteen standard 1 Meg x 4 DRAMs in plastic SOJ pack-
ages. The assembly has eight drams mounted on each side of a
printed circuit board in a 72 pad leadless SIM configuration.
This configuration allows socket-mounting of large quantities of
memory in applications where high density and ease of inserting ad-
ditional memory are important.
The operation of the AK5322048 is identical to sixteen 1Meg x 4
Drams. There are four CAS lines and four RAS lines. On each bank
of 1Meg x 32, independent byte control is accomplished by the four
CAS lines, where each seperate CAS line controls two 1Meg x 4
Drams. Two banks of 32 bits are controlled by the two pairs of RAS
lines. A sixteen bit data path can be produced by connecting DQ1to
DQ17,DQ
2to DQ18, and alternately strobing RAS0with RAS1and
RAS2with RAS3.
FEATURES
·2,097,152 x 32 bit organization
·72 pad Single In-Line Module
·Multiple CAS and RAS lines allow x16 or x32 bit widths
·CAS-before-RAS,RAS-only or hidden refresh
·Operating free air temperature 0oCto70
oC
·Single 5 Volt Power Supply
·2048 Refresh Cycles
·Available in Fast Page Mode EDO versions
·Power
5.32 Watt Max Active (60nS)
4.44 Watt Max Active (70 nS)
3.79 Watt Max Active (80 nS)
88 mW Max Standby
·Available in leadless SIM or leaded Zip versions
·Downward compatible with AK5321024, AK532512 and
AK532256
·Upward compatible with AK5324096 and AK5328192
ADDITIONAL OPTIONS AVAILABLE
·256K x 32 Version, AK532256
·512K x 32 version, AK532512
·1 Meg x 32 version, AK5321024
·4 Meg x 32 version, AK5324096
·8 Meg x 32 version, AK5328192
Accutek
Microcircuit
Corporation
AK5322048W
2,097,152 Word by 32 Bit CMOS
Dynamic Random Access Memory
PIN NOMENCLATURE
DQ0-DQ
31 Data In/Data Out
A0-A
9Address Inputs
CAS0- CAS3Column Address Strobe
RAS0- RAS3Row Address Strobe
WE Write Enable
PD1-PD
4Presence Detect
Vcc 5V Supply
Vss Ground
NC No Connect
MODULE OPTIONS
Leadless SIM: AK5322048W
Leaded ZIP: AK5322048Z
PIN ASSIGNMENT
Pin # Symbol Pin # Symbol Pin # Symbol Pin # Symbol
1 Vss 19 NC 37 NC 55 DQ11
2 DQ0 20 DQ4 38 NC 56 DQ27
3 DQ16 21 DQ20 39 Vss 57 DQ12
4 DQ1 22 DQ5 40 CAS0 58 DQ28
5 DQ17 23 DQ21 41 CAS2 59 Vcc
6 DQ2 24 DQ6 42 CAS3 60 DQ29
7 DQ18 25 DQ22 43 CAS1 61 DQ13
8 DQ3 26 DQ7 44 RAS0 62 DQ30
9 DQ19 27 DQ23 45 RAS1 63 DQ14
10 Vcc 28 A7 46 NC 64 DQ31
11 NC 29 NC 47 WE 65 DQ15
12 A0 30 Vcc 48 NC 66 NC
13 A1 31 A8 46 DQ8 67 PD1
14 A2 32 A9 50 DQ24 68 PD2
15 A3 33 RAS3 51 DQ9 69 PD3
16 A4 34 RAS2 52 DQ25 70 PD4
17 A5 35 NC 53 DQ10 71 NC
18 A6 36 NC 54 DQ26 72 Vss
Presence Detect -1 Meg x 32 Presence Detect-2Megx32
-60 -70 -80 -60 -70 -80
PD1 Vss Vss Vss PD1 NC NC NC
PD2 Vss Vss Vss PD2 NC NC NC
PD3 NC Vss NC PD3 NC Vss NC
PD4 NC NC Vss PD4 NC NC Vss
+
+
FUNCTIONAL DIAGRAM
MECHANICAL DIMENSIONS
A0-A9
RAS
CAS
WE
OE
A0-A9
RAS
CAS
WE
OE
A0 - A9
RAS
CAS
WE
OE
A0-A9
RAS
CAS
WE
OE
A0 - A9
RAS
CAS
WE
OE
DQ0 - DQ3
A0-A9
RAS
CAS
WE
OE
DQ0 - DQ3
A0-A9
RAS
CAS
WE
OE
DQ0 - DQ3
A0 - A9
RAS
CAS
WE
OE
DQ0 - DQ3
CAS0
CAS2
RAS0 DQ0 - DQ3
DQ16 - DQ19
DQ4 - DQ7
DQ20 - DQ23
RAS1
RAS3
RAS2
A0-A9
RAS
CAS
WE
OE
A0 - A9
RAS
CAS
WE
OE
DQ0 - DQ3
DQ0 - DQ3
DQ0 - DQ3
DQ0 - DQ3
DQ0 - DQ3
DQ0 - DQ3
DQ0 - DQ3
DQ0 - DQ3
A0 - A9
RAS
CAS
WE
OE
A0-A9
RAS
CAS
WE
OE
A0 - A9
RAS
CAS
WE
OE
DQ0 - DQ3
A0-A9
RAS
CAS
WE
OE
DQ0 - DQ3
A0-A9
RAS
CAS
WE
OE
DQ0 - DQ3
A0-A9
RAS
CAS
WE
OE
DQ0 - DQ3
CAS1
CAS3
DQ8 - DQ11
DQ24 - DQ27
DQ12 - DQ15
DQ28 - DQ31
A0-A9
WE
+
+
C
LC
L
C
L
+
1.000"
MAX
0.330"
MAX
0.425"
0.375" 0.250"
C
L
0.080" 0.125" 0.050"
TYP
4.250"
3.985"
ACCUTEK MICROCIRCUIT CORPORATION
BUSINESS CENTER at NEWBURYPORT
2 NEW PASTURE ROAD, SUITE 1
NEWBURYPORT, MA 01950-4054
PHONE: 978-465-6200 FAX: 978-462-3396
Email: sales@accutekmicro.com
Internet: www.accutekmicro.com
Accutek reserves the right to make changes in specifications at any time
and without notice. Accutek does not assume any responsibility for the
use of any circuitry described; no circuit patent licenses are implied. Pre-
liminary data sheets contain minimum and maximum limits based upon
design objectives, which are subject to change upon full characterization
over the specific operating conditions.