REVISIONS
LTR DESCRIPTION DATE (YR-MO-DA) APPROVED
A
Added vendor CAGE number 6Y440 and 65786 to the drawing as
approved sources of supply. Removed vendor CAGE number 0BK02
from the drawing. Also deleted ESDS from the drawing. Editorial
changes throughout.
89-09-28 M. A. Frye
B
Changes in accordance with NOR 5962-R349-92. 92-10-29 M. A. Frye
C
Added device types 05 and 06. Updated drawing to include new
verbage from standard boilerplate. Figure 1 Terminal connections, for
case outline Y, changed DQ to I/O, W to WE , and C to CE.
Removed CAGE numbers 61772, 6Y440, and 66301. Added CAGE
numbers 0EU86. ksr
97-08-19 Ray Monnin
D
Boilerplate update, part of 5 year review. ksr 07-11-02 Robert M. Heber
REV
SHEET
REV
SHEET
REV STATUS REV D D D D D D D D D D D D D D
OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14
PMIC N/A PREPARED BY
Kenneth S. Rice
DEFENSE SUPPLY CENTER COLUMBUS
STANDARD
MICROCIRCUIT
DRAWING
CHECKED BY
Charles Reusing
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
APPROVED BY
DA DiCenzio
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
DRAWING APPROVAL DATE
88-07-27
MICROCIRCUIT, MEMORY, DIGITAL,
CMOS, 64K X 4 STATIC RANDOM
ACCESS MEMORY (SRAM),
MONOLITHIC SILICON
AMSC N/A
REVISION LEVEL
D SIZE
A CAGE CODE
67268
5962-88681
SHEET
1 OF
14
DSCC FORM 2233
APR 97 5962-E601-07
.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88681
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
D SHEET 2
DSCC FORM 2234
APR 97
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
5962-88681 01 X_ A
Drawing number Device type
(see 1.2.1) Case outline
(see 1.2.2) Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows:
Device type Generic number Circuit function Access time
01 (See 6.6) 64K X 4 CMOS SRAM 35 ns
02 (See 6.6) 64K X 4 CMOS SRAM 45 ns
03 (See 6.6) 64K X 4 CMOS SRAM 55 ns
04 (See 6.6) 64K X 4 CMOS SRAM 70 ns
05 (See 6.6) 64K X 4 CMOS SRAM 25 ns
06 (See 6.6) 64K X 4 CMOS SRAM 20 ns
1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style
L GDIP3-T24 or CDIP4-T24 24 dual-in-line package
X CQCC3-N28 28 rectangular chip carrier package
Y CDFP4-28 28 flat package
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings.
Voltage on any input relative to VSS range------------------ -0.5 V dc to +7.0 V dc
Voltage applied to outputs range------------------------------ -0.5 V dc to +6.0 V dc
Storage temperature range ------------------------------------- -65°C to +150°C
Maximum power dissipation (PD)------------------------------ 1.0 W
Lead temperature (soldering, 10 seconds)------------------ +260°C
Thermal resistance, junction-to-case (ΘJC):
Cases L, X, and Y ----------------------------------------------- See MIL-STD-1835
Junction temperature (TJ) --------------------------------------- +150°C 1/
1.4 Recommended operating conditions.
Supply voltage range (VCC) ------------------------------------- 4.5 V dc to 5.5 V dc
Supply voltage range (VSS)-------------------------------------- 0 V dc
Input high voltage range (VIH) ---------------------------------- 2.2 V dc to VCC +0.5 V dc
Input low voltage range (VIL) ----------------------------------- -0.5 V dc to + 0.8 V dc 2/
Case operating temperature range (TC) --------------------- -55°C to +125°C
1/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in
accordance with method 5004 of MIL-STD-883.
2/ VIL minimum = -3.0 V dc for pulse width less than 20 ns.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88681
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
D SHEET 3
DSCC FORM 2234
APR 97
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 - Test Method Standard Microcircuits.
MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or from
the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of
this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific
exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-
JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer
Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-
38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity
approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make
modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These
modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-PRF-38535
is required to identify when the QML flow option is used.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535, appendix A and herein.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 2.
3.2.4 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection only.
Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass the
internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor testing
shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements as
provided by MIL-PRF-38535 for classes Q and V. Samples may be pulled any time after seal.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88681
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
D SHEET 4
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics.
Limits
Test
Symbol
Conditions
-55°C ≤ TC ≤+125°C
unless otherwise specified
Group A
subgroups
Device
Type
Min
Max
Unit
01 - 04 120
05 140
Operating supply current
1/
ICC1
tAVAV = tAVAV (minimum),
VCC = 5.5 V, CE = VIL 06 150
01 - 04 25
05 40
Standby power supply current
TTL 1/
ICC2
CE ≥ VIH, all other inputs
≤ VIL or ≥ VIH,
VCC = 5.5 V, f = 0 MHz 06 45
Standby power supply current
CMOS 1/
ICC3
CE ≥ (VCC -0.2 V), f = 0 MHz,
VCC = 5.5 V,
all other inputs ≤ 0.2 V or
≥ (VCC -0.2 V)
20
mA
Input leakage current any
input
IILK
VCC = 5.5 V,
VIN = 0 V to 5.5 V
±10
Off state output leakage
current
IOLK
VCC = 5.5 V,
VIN = 0 V to 5.5 V
±10
µA
Output high voltage
VOH
IOUT = -4.0 mA, VCC = 4.5 V,
VIL = 0.8 V, VIH = 2.2 V
2.4
Output low voltage
VOL
IOUT = 8.0 mA, VCC = 4.5 V,
VIL = 0.8 V, VIH = 2.2 V
1, 2, 3
0.4
V
Input capacitance
CIN
VIN = 0V 10.0
Output capacitance
COUT
f = 1.0 MHz, TA = +25°C,
See 4.3.1c
4 12.0
pF
Functional Testing
See 4.3.1d 7, 8A, 8B
All
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88681
DEFENSE SUPPLY CENTER COLUMBUS
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D SHEET 5
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
Limits
Test
Symbol
Conditions
-55°C ≤ TC ≤+125°C
unless otherwise specified 2/
Group A
subgroups
Device
Type
Min
Max
Unit
01
35
02
45
03
55
04
70
05
25
Chip enable access time
tELQV
See figure 4
06
20
01
35
02
45
03
55
04
70
05
25
Read cycle time
tAVAV
See figure 4 3/
06
20
01
35
02
45
03
55
04
70
05
25
Address access time
tAVQV
See figure 4 4/
06
20
Output hold after address
change
tAVQX
See figure 4
All
3.0
Chip enable to output active
tELQX
All
3.0
01, 02
0
20
03
0
25
04
0
30
Chip disable to output
inactive
tEHQZ
See figure 4 5/ 6/
05, 06
0
10
Chip enable to power up
tELPU
See figure 4 5/
9, 10, 11
All
0
ns
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88681
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
D SHEET 6
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
Limits
Test
Symbol
Conditions
-55°C ≤ TC ≤+125°C
unless otherwise specified 2/
Group A
subgroups
Device
Type
Min
Max
Unit
01
35
02
45
03
55
04
70
05
25
Chip enable to power down
tEHPD
See figure 4 5/
06
20
Input rise and fall times
tT
5/ 7/
All
50
01
35
02
45
03
55
04
70
05
25
Write cycle time
tAVAV
06
20
01
30
02
40
03
50
04
55
05
17
Write pulse width
tWLWH
06
15
01
30
02
40
03
50
04
55
05
18
Chip enable to end of write
tELEH
See figure 5
9, 10, 11
06
15
ns
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88681
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
D SHEET 7
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
Limits
Test
Symbol
Conditions
-55°C ≤ TC ≤+125°C
unless otherwise specified 2/
Group A
subgroups
Device
Type
Min
Max
Unit
01, 02
20
03, 04
25
05
12
Data setup to end of write
tDVWH
06
10
Data hold after end of write
tWHDX
All
0
01
30
02
40
03
50
04
55
05
18
Address setup to end of write
tAVWH
See figure 5
06
15
tAVWL
See figure 5
(write cycle number 1)
0
Address setup to beginning of
write
tAVEL
See figure 5
(write cycle number 2)
All
0
01 - 04
5.0
Address hold after end of write
tWHAV
See figure 5
05, 06
2.0
01, 02
0
20
03
0
25
04
0
30
05
0
11
Write enable to output disable
tWLQZ
See figure 5 5/ 6/
06
0
10
Output active after end of write
tWHQX
See figure 5 5/ 6/ 8/
9, 10, 11
All
0
ns
1/ ICC is dependent upon output loading and cycle rate. The specified values apply with output(s) unloaded.
2/ AC measurements assume signal transition times of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 V
to 3.0 V and output loading of 30 pF load capacitance. Output timing reference is 1.5 V. See figure 3.
3/ For read cycles 1 and 2, WE is high for entire cycle.
4/ Device is continuously selected, CE low.
5/ Parameter if not tested, shall be guaranteed to the limits specified in table I.
6/ Measured ±500 mV from steady-state output voltage. Load capacitance is 5.0 pF.
7/ Measured between VIL maximum and VIH minimum.
8/ If WE is low when CE goes low, the output remains in the high impedance state.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88681
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
D SHEET 8
DSCC FORM 2234
APR 97
Device types 01, 02, 03, 04, 05, 06
Case outlines L X Y
Terminal number Terminal symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
CE
VSS
WE
I/O4
I/O3
I/O2
I/O1
A0
A1
A2
A3
A4
A5
VCC
- - -
- - -
- - -
- - -
NC
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
CE
NC
VSS
NC
WE
I/O4
I/O3
I/O2
I/O1
A0
A1
A2
A3
A4
A5
NC
VCC
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CE
NC
VSS
WE
I/O0
I/O1
I/O2
I/O3
NC
NC
A10
A11
A12
A13
A14
A15
VCC
FIGURE 1. Terminal connections.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88681
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
D SHEET 9
DSCC FORM 2234
APR 97
CE WE Mode I/O Power
X
L
L
X
L
H
Not selected
Write
Read
High Z
DIN
DOUT
Standby
Active
Active
H = Logic "1" state
L = Logic "0" state
X = Don't care
FIGURE 2. Truth table.
NOTE: Including scope and jig (minimum values). AC test conditions
Input pulse levels
Input rise fall times
Input timing reference levels
Output reference levels
GND to 3.0 V
5 ns
1.5 V
1.5 V
FIGURE 3. Output load circuits.
STANDARD
MICROCIRCUIT DRAWING
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A
5962-88681
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D SHEET 10
DSCC FORM 2234
APR 97
Notes:
1. WE is high for entire cycle.
2. CE and WE must meet transition between VIH (min) to VIL (max) or VIL (max) to VIH (min) in a monotonic
fashion.
3. Device is continuosly selected, CE low.
FIGURE 4. Read cycle timing diagrams.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88681
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
D SHEET 11
DSCC FORM 2234
APR 97
FIGURE 5. Write cycle timing diagrams.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88681
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
D SHEET 12
DSCC FORM 2234
APR 97
Notes:
1. CE and WE must meet transition between VIH (min) to VIL (max) or VIL (max) to VIH (min) in a monotonic fashion.
2. CE and WE must be ≥ VIH during address transitions.
FIGURE 5. Write cycle timing diagrams - Continued.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-88681
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
D SHEET 13
DSCC FORM 2234
APR 97
TABLE II. Electrical test requirements.
MIL-STD-883 test requirements Subgroups
(in accordance with
MIL-STD-883, method 5005,
table I)
Interim electrical parameters
(method 5004)
- - -
Final electrical test parameters
(method 5004)
1*, 2, 3, 7*, 8,
9, 10, 11
Group A test requirements
(method 5005)
1, 2, 3, 4**, 7,
8, 9, 10, 11
Groups C and D end-point
electrical parameters
(method 5005)
2, 3, 7, 8A, 8B
* PDA applies to subgroup 1 and 7.
** See 4.3.1c
3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed
in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN
number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device.
3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance
to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in
accordance with MIL-PRF-38535 to identify when the QML flow option is used.
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to
listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-38535,
appendix A and the requirements herein.
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided
with each lot of microcircuits delivered to this drawing.
3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing.
3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's
facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the
reviewer.
4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,
appendix A.
4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices
prior to quality conformance inspection. The following additional criteria shall apply:
a. Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level control
and shall be made available to the preparing activity upon request. The test circuit shall specify the inputs, outputs,
biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
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DEFENSE SUPPLY CENTER COLUMBUS
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D SHEET 14
DSCC FORM 2234
APR 97
(2) TA = +125°C, minimum.
b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter
tests prior to burn-in are optional at the discretion of the manufacturer.
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-
883 including groups A, B, C, and D inspections. The following additional criteria shall apply.
4.3.1 Group A inspection.
a. Tests shall be as specified in table II herein.
b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.
c. Subgroup 4 (CIN and COUT measurement) shall be measured only for the initial test and after process or design changes
which may affect capacitance. Sample size is fifteen devices with no failures and all input and output terminals tested.
d. Subgroups 7 and 8 shall include verification of the truth table.
4.3.2 Groups C and D inspections.
a. End-point electrical parameters shall be as specified in table II herein.
b. Steady-state life test conditions, method 1005 of MIL-STD-883.
(1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing activity upon request. The test circuit shall specify the inputs,
outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-
STD-883.
(2) TA = +125°C, minimum.
(3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-
prepared specification or drawing.
6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system
application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be
used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC
5962) should contact DSCC-VA, telephone (614) 692-0544.
6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone
(614) 692-0547.
6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-
103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-
VA.
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 07-11-10
Approved sources of supply for SMD 5962-88681 are listed below for immediate acquisition information only and shall be
added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to
include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of
compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated
revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of supply at
http://www.dscc.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-8868101LA 0C7V7
0EU86
3DTT2
3/
3/
3/
3/
CY7C194-35DMB
MT5C2564C-35883C
P4C1258-35CMB
HM1-65798K/883
L7C194CMB35
IDT71258S35CB
EDI8465C35QB
5962-8868101XA 0C7V7
0EU86
3DTT2
3/
3/
CY7C194-35LMB
MT5C2564EC-35883C
P4C1258-35LMB
L7C194KMB35
EDI8465C35LB
5962-8868101YA 0C7V7
0EU86
3DTT2
3/
CY7C194-35KMB
MT5C2564F-35883C
P4C1258-35FSMB
EDI8465C35B
5962-8868102LA 0C7V7
0EU86
3DTT2
3/
3/
3/
3/
CY7C194-45DMB
MT5C2564C-45883C
P4C1258-45CMB
HM1-65798M/883
L7C194CMB35
IDT71258S45CB
EDI8465C45QB
5962-8868102XA 0C7V7
0EU86
3DTT2
3/
3/
CY7C194-45LMB
MT5C2564EC-45883C
P4C1258-45LMB
L7C194KMB35
EDI8465C35LB
5962-8868102YA 0C7V7
0EU86
3DTT2
3/
CY7C194-45KMB
MT5C2564F-45883C
P4C1258-45FSMB
EDI8465C45B
5962-8868103LA 0C7V7
0EU86
3DTT2
3/
3/
3/
3/
CY7C194-55DMB
MT5C2564C-55883C
P4C1258-55CMB
HM1-65798N/883
L7C194CMB55
IDT71258S55CB
EDI8465C55QB
See footnotes at end of table.
Page 1 of 3
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-8868103XA 0C7V7
0EU86
3DTT2
3/
3/
CY7C194-55LMB
MT5C2564EC-55883C
P4C1258-55LMB
L7C194KMB55
EDI8465C55LB
5962-8868103YA 0C7V7
0EU86
3DTT2
3/
CY7C194-55KMB
MT5C2564F-55883C
P4C1258-55FSMB
EDI8465C55B
5962-8868104LA 0C7V7
0EU86
3DTT2
3/
3/
3/
3/
CY7C194-70DMB
MT5C2564C-70883C
P4C1258-70CMB
HM1-65798N/883
L7C194CMB55
IDT71258S70CB
EDI8465C70QB
5962-8868104XA 0C7V7
0EU86
3DTT2
3/
3/
CY7C194-70LMB
MT5C2564EC-70883C
P4C1258-70LMB
L7C194KMB55
EDI8465C70LB
5962-8868104YA 0C7V7
0EU86
3DTT2
3/
CY7C194-70KMB
MT5C2564F-70883C
P4C1258-70FSMB
EDI8465C70B
5962-8868105LA 0EU86
0C7V7
3DTT2
MT5C2564C-25883C
CY7C194-25DMB
P4C1258-25CMB
5962-8868105XA 0EU86
0C7V7
3DTT2
MT5C2564EC-25883C
CY7C194-25LMB
P4C1258-25LMB
5962-8868105YA 0C7V7
0EU86
3DTT2
CY7C194-25KMB
MT5C2564F-25883C
P4C1258-25FSMB
5962-8868106LA 0EU86
0C7V7
3DTT2
MT5C2564C-20883C
CY7C194-20DMB
P4C1258-20CMB
5962-8868106XA 0EU86
0C7V7
3DTT2
MT5C2564EC-20883C
CY7C194-20LMB
P4C1258-20LMB
See footnotes at end of table.
Page 2 of 3
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-8868106YA 0C7V7
0EU86
3DTT2
CY7C194-20KMB
MT5C2564F-20883C
P4C1258-20FSMB
1/ The lead finish shown for each PIN representing a hermetic
package is the most readily available from the manufacturer listed
for that part. If the desired lead finish is not listed contact the
Vendor to determine its availability.
2/ Caution. Do not use this number for item acquisition. Items
acquired to this number may not satisfy the performance
requirements of this drawing.
3/ No longer available from an approved source of supply.
Vendor CAGE Vendor name
number and address
0EU86 Austin Semiconductor Inc.
8701 Cross Park Dr.
Austin, TX 78754
0C7V7 QP Semiconductor
2945 Oakmead Village Court
Santa Clara, CA 95051
3DTT2 Pyramid Semiconductor Corporation
1340 Bordeaux Drive
Sunnyvale, CA 94089
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.
Page 3 of 3
