1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
AEC Q101 compliant
Low conduction losses due to low
on-state resistance
Suitable for logic level gate drive
sources
Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
12 V and 24 V loads
Automotive and general purpose
power switching
Motors, lamps and soleno ids
1.4 Quick reference data
BUK9624-55A
N-channel TrenchMOS logic level FET
Rev. 02 — 31 January 2011 Product data sheet
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VDS drain-source
voltage Tj25 °C; Tj175°C --55V
IDdrain current VGS =5V; T
mb =2C;
see Figure 1; see Figure 3 --46A
Ptot total power
dissipation Tmb = 25 °C; see Figure 2 --105W
© Nexperia B.V. 2017. All rights reserved
BUK9624-55A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 02 — 31 January 2011 2 of 13
Nexperia BUK9624-55A
N-channel TrenchMOS logic level FET
2. Pinning information
3. Ordering information
Static characteristics
RDSon drain-source
on-state
resistance
VGS =4.5V; I
D=25A;
Tj=2C --26m
VGS =10V; I
D=25A;
Tj=2C -1921.7m
VGS =5V; I
D=25A;
Tj=2C; see Figure 12;
see Figure 13
- 2024m
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy
ID=46A; V
sup 25 V;
RGS =50; VGS =5V;
Tj(init) = 25 °C; unclamped
--76mJ
Table 1. Quick reference data …continued
Symbol Parameter Conditions Min Typ Max Unit
Tabl e 2. Pinning information
Pin Symbol Description Simplified outline Graphi c sy mbol
1 G gate
SOT404 (D2PAK)
2 D drain
3Ssource
mb D mounting base; connected to
drain
mb
13
2
S
D
G
mbb076
Table 3. Ordering informatio n
Type number Package
Name Description Version
BUK9624-55A D2PAK plastic single-ended surface-mounted package (D2P AK); 3 leads
(one lead croppe d) SOT404
© Nexperia B.V. 2017. All rights reserved
BUK9624-55A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 02 — 31 January 2011 3 of 13
Nexperia BUK9624-55A
N-channel TrenchMOS logic level FET
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage Tj25 °C; Tj175 °C - 55 V
VDGR drain-gate voltage RGS =20k-55V
VGS gate-source voltage -10 10 V
IDdrain current Tmb =2C; V
GS =5V; see Figure 1;
see Figure 3 -46A
Tmb =10C; V
GS =5V; see Figure 1 -33A
IDM peak drain current Tmb = 25 °C; pulse d; tp10 µs;
see Figure 3 - 188 A
Ptot total power dissipation Tmb =2C; see Figure 2 - 105 W
Tstg storage temperature -55 175 °C
Tjjunction temperature -55 175 °C
VGSM peak gate-source voltage pulsed; tp50 µs -15 15 V
Source-drain diode
ISsource current Tmb =2C - 46 A
ISM peak source current pulsed; tp10 µs; Tmb = 25 °C - 188 A
Avalanche ruggednes s
EDS(AL)S non-repetitive drain -source
avalanche energy ID=46A; V
sup 25 V; RGS =50;
VGS =5V; T
j(init) = 25 °C; unclamped -76mJ
Fig 1. Normalized continuous drain curre nt as a
function of mounting base temperature Fig 2. Normal ize d tota l po we r dissi pa tion as a
function of mounting ba s e temperature
Tmb (°C)
0 20015050 100
03aa24
40
80
120
Ider
(%)
0
Tmb (°C)
0 20015050 100
03na19
40
80
120
Pder
(%)
0
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BUK9624-55A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 02 — 31 January 2011 4 of 13
Nexperia BUK9624-55A
N-channel TrenchMOS logic level FET
5. Thermal characteristics
Fig 3. Safe operating area; continuou s and peak drain curren ts as a function of drain-source voltage
03na08
VDS (V)
1 102
10
102
10
103
ID
(A)
1
D.C.
100 ms
10 ms
1 ms
tp = 10 μs
100 μs
Limit RDSon = VDS /ID
tp
tp
T
P
t
T
δ =
Table 5. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-mb) thermal resistance from junction
to mounting base --1.4K/W
Rth(j-a) thermal resistance from junction
to ambient vertical in still air; lea d leng th
5 mm; see Figure 4 -50-K/W
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
03na07
tp (s)
1061011102
103
105104
1
101
10
Zth(j-mb)
(K/W)
102
δ = 0.5
0.2
0.1
0.05
0.02 single pulse tp
tp
T
P
t
T
δ =
© Nexperia B.V. 2017. All rights reserved
BUK9624-55A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 02 — 31 January 2011 5 of 13
Nexperia BUK9624-55A
N-channel TrenchMOS logic level FET
6. Characteristics
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V(BR)DSS drain-source
breakdown voltage ID=0.25mA; V
GS =0V; T
j= -55 °C 50 - - V
ID=0.25mA; V
GS =0V; T
j=25°C 55--V
VGS(th) gate-source threshold
voltage ID=1mA; V
DS =V
GS; Tj=2C;
see Figure 11 11.52V
ID=1mA; V
DS =V
GS; Tj= 175 °C;
see Figure 11 0.5--V
ID=1mA; V
DS =V
GS; Tj=-5C;
see Figure 11 --2.3V
IDSS drain leakage current VDS =55V; V
GS =0V; T
j= 25 °C - 0.05 10 µA
VDS =55V; V
GS =0V; T
j= 175 °C - - 500 µA
IGSS gate leakage current VGS =10V; V
DS =0V; T
j= 25 °C - 2 100 nA
VGS =-10V; V
DS =0V; T
j= 25 °C - 2 100 nA
RDSon drain-source on-state
resistance VGS =5V; I
D=25A; T
j= 175 °C;
see Figure 12 ; see Figure 13 --50m
VGS =4.5V; I
D=25A; T
j=25°C --26m
VGS =10V; I
D=25A; T
j= 25 °C - 19 21.7 m
VGS =5V; I
D=25A; T
j=2C;
see Figure 12 ; see Figure 13 - 2024m
Dynamic characteristi cs
Ciss input capacitance VGS =0V; V
DS =25V; f=1MHz;
Tj=2C; see Figure 8 - 1361 1815 pF
Coss output capacitance - 239 287 pF
Crss reverse transfer
capacitance - 162 222 pF
td(on) turn-on delay time VDS =30V; R
L=1.2; VGS =5V;
RG(ext) =10; Tj=2C - 17.5 - ns
trrise time - 104 - ns
td(off) turn-off delay time - 82.5 - ns
tffall time - 80 - ns
LDinternal drain
inductance from upper edge of drain mounting base
to centre of die ; Tj=2C -2.5-nH
from drain lead 6 mm from package to
centre of die ; Tj=2C -4.5-nH
LSinternal source
inductance from source lead to source bond pad ;
Tj=2C -7.5-nH
Source-drain diode
VSD source-drain voltage IS=25A; V
GS =0V; T
j=2C;
see Figure 14 - 0.85 1.2 V
trr reverse recovery time IS=46A; dI
S/dt = -100 A/µs;
VGS =-10V; V
DS =30V; T
j=2C -50-ns
Qrrecovered charge - 85 - nC
© Nexperia B.V. 2017. All rights reserved
BUK9624-55A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 02 — 31 January 2011 6 of 13
Nexperia BUK9624-55A
N-channel TrenchMOS logic level FET
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values Fig 6. Drain-source on-state resistance as a function
of gate-source voltage; typical values
Fig 7. Sub-threshold drain cu rrent as a function of
gate-source voltage Fig 8. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
03na05
0
20
40
60
80
100
120
140
160
180
0246810
VDS (V)
ID
(A)
2.2
3
4
5
6
7
10
8
VGS (V) = 9
03na03
10
15
20
25
30
35
40
45
246810
V
GS
(V)
R
DSon
(mΩ)
03na18
0 0.5 1 1.5 2 2.5 3
maxtypmin
ID
VGS (V)
106
105
104
103
102
101
(A)
03na09
0
500
1000
1500
2000
2500
3000
3500
4000
102101 1 10 102
VDS (V)
C
(pF)
Ciss
Coss
Crss
© Nexperia B.V. 2017. All rights reserved
BUK9624-55A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 02 — 31 January 2011 7 of 13
Nexperia BUK9624-55A
N-channel TrenchMOS logic level FET
Fig 9. Transfer characteristics: drain current as a
function of gate-source voltage; typical values Fig 10. Gate-source voltage as a function of gate
charge; typical values
Fig 11. Gate-source threshold voltage as a function of
junction temperature Fig 12. Drain-source on-state resistance as a function
of drain current; typical values
03na00
0
20
40
60
80
100
0246
V
GS (V)
I
D
(A)
Tj = 25 °C
Tj = 175 °C
03na02
0
1
2
3
4
5
6
010203040
QG (nC)
VGS
(V)
VDD = 44 VVDD = 14 V
03na17
0
0.5
1
1.5
2
2.5
60 20 20 60 100 140 180
max
typ
min
VGS(th)
Tj (°C)
(V)
03na06
10
15
20
25
30
35
40
45
50
10 30 50 70 90
ID (A)
RDSon
(mΩ)
5
4
3.8
3.6
3.4
3.2
3VGS (V)=
© Nexperia B.V. 2017. All rights reserved
BUK9624-55A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 02 — 31 January 2011 8 of 13
Nexperia BUK9624-55A
N-channel TrenchMOS logic level FET
Fig 13. Normalized drain-source on-state resistance
factor as a function of junction temperature Fig 14. Reverse diode current as a function of reverse
diode voltage; typical values
Tj (°C)
60 180120060
03aa28
1.2
0.6
1.8
2.4
a
0
03na01
0
20
40
60
80
100
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
V
SD
(V)
I
S
(A)
T
j
= 175 °CT
j
= 25 °C
© Nexperia B.V. 2017. All rights reserved
BUK9624-55A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 02 — 31 January 2011 9 of 13
Nexperia BUK9624-55A
N-channel TrenchMOS logic level FET
7. Package outline
Fig 15. Package outline SOT404 (D2PAK)
UNIT A
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
A1D1
D
max. EeL
pHDQc
2.54 2.60
2.20
15.80
14.80
2.90
2.10
11 1.60
1.20 10.30
9.70
4.50
4.10 1.40
1.27 0.85
0.60 0.64
0.46
b
DIMENSIONS (mm are the original dimensions)
SOT404
0 2.5 5 mm
scale
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped) SOT404
e e
E
b
D1
HD
D
Q
Lp
c
A1
A
13
2
mounting
base
05-02-11
06-03-16
© Nexperia B.V. 2017. All rights reserved
BUK9624-55A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 02 — 31 January 2011 10 of 13
Nexperia BUK9624-55A
N-channel TrenchMOS logic level FET
8. Revision history
Table 7. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BUK9624-55A v.2 20110131 Product data sheet - BUK9524_9624_55A v.1
Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Type number BUK9624-55A separated from data sheet BUK9524_9624_55A v.1.
Various changes to content.
BUK9524_9624_55A v.1 20000929 Product specification - -
© Nexperia B.V. 2017. All rights reserved
BUK9624-55A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 02 — 31 January 2011 11 of 13
Nexperia BUK9624-55A
N-channel TrenchMOS logic level FET
9. Legal information
9.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The p r oduct status of device(s) described in this document may have chang ed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nexperia.com.
9.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full dat a sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre vail.
Product specifica t io nThe information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
9.3 Disclaimers
Limited warranty and liability — Information in this d ocument is be lieved to
be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use in automotive applications — This Nexperia
product has been qualified for use in automotive
applications. The pro duct is not designed, authorized or warrante d to be
suitable for use in medical, military, aircraft, space or life support equipment,
nor in applications where failure or malfunction of a Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia accepts no
liability for inclusion and/or use of Nexperia products in such
equipment or applications and therefore such inclusion and/or use is at the
customer’s own risk.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
© Nexperia B.V. 2017. All rights reserved
BUK9624-55A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 02 — 31 January 2011 12 of 13
Nexperia BUK9624-55A
N-channel TrenchMOS logic level FET
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
No offer to sell or license — Nothing in this document ma y be interpret ed or
construed as an of fer to sell product s that is op en for accept ance or the grant ,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) d escribed herein may
be subject to export control regulat i ons. Export might require a prior
authorization fro m national authorities.
9.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
10. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Nexperia BUK9624-55A
N-channel TrenchMOS logic level FET
11. Contents
1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1 General description . . . . . . . . . . . . . . . . . . . . . .1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . .1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
5 Thermal characteristics . . . . . . . . . . . . . . . . . . .4
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .5
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9
8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . .10
9 Legal information. . . . . . . . . . . . . . . . . . . . . . . .11
9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .11
9.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
9.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .11
9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12
10 Contact information. . . . . . . . . . . . . . . . . . . . . .12
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release:
31 January 2011