
MCP73841/2/3/4
DS21823D-page 16 2003-2013 Microchip Technology Inc.
6.1 Application Circuit Design
Due to the low efficiency of linear charging, the most
important fa ctors are thermal design and cos t, which are
a direct function of the input voltage, output current and
thermal impedance between the external P-channel
pass transistor and the ambient cooling air. The worst-
case situation occurs when the device has transitioned
from the preconditioning phase to the constant-current
phase. In this situation, the P-channel pass transistor
has to dissipate the maximum power. A trade-off must
be made between the charge current, cost and thermal
requirements of the ch arger.
6.1.1 COMPONEN T SELECTION
Selection of the external components in Figure 6-1 are
crucial to the integrity and reliability of the charging
system. The following discussion is intended to be a
guide for the component selection process.
6.1.1.1 Sense Resistor
The preferred fast charge current for Lithium-Ion cells
is at the 1C rate, with an absolute maximum current at
the 2C rate. For example, a 500 mAh battery pack has
a preferred fast charge current of 500 mA. Chargi ng at
this rate provides the shortest charge cycle times
withou t degradatio n to the battery p ack perfo rmance or
life.
The curren t sense resistor ( RSENSE) is calculate d by:
For the 500 mAh battery pack example, a standard
value 220 m, 1% resistor provides a typical fast
charge current of 500 mA and a maximum fast charge
current of 551 mA. W orst-case powe r dissip ation in the
sense res ist or is:
A Panasonic® ERJ-6RQFR22V, 220 mW, 1%, 1/8W
resistor in a standard 0805 package is more than
sufficient for this application.
A larger value sense resistor will decrease the fast
charge cu rrent and powe r dissip ation in both the sense
resistor and external pass transistor, but will increase
charge cycle times. Design trade-offs must be
considered to minimize space while maintaining the
des ired performanc e.
6.1.1.2 External Pass Transistor
The externa l P-ch ann el MOSF ET is determ in ed by the
gate-to-source threshold voltage, input voltage, output
voltage and fast charge current. Therefore, the
selec ted P-ch annel MOS FET must satisf y the th ermal
and electrical design requirements.
Thermal Considerations
The worst-case power dissipation in the external pass
transistor occurs when the input voltage is at the
maximum and the device has transitioned from the
preconditioni ng phase to the constant-current ph ase. In
this case, the power dissipation is:
Power dissipation with a 5V, ±10% input voltage
source, 220 m, 1% sense resistor is:
Utilizing a Fairchild™ NDS8434 or an International
Rectifier IRF7404 mounted on a 1in2 pad of 2 oz.
copper, the junction temperature rise is 75°C,
approximately. This would allow for a maximum
operating ambient temperature of 75°C.
By increasing the size of the copper pad, a higher ambi-
ent temperature can be realized, or a lower value
sense resistor could be utilized.
Alternatively, different package options can be utilized
for more or less power dissi pation. Agai n, design trade-
offs should be considered to minimize size while
maintaining the desired performance.
Electrical Considerations
The gate-to -source thresho ld voltag e and RDSON of the
external P-channel MOSFET must be considered in the
design phase.
The wors t-case VGS pro vided by the contr oller occu rs
when the input voltage is at the minimum and the fast
charge cu rrent regu lation thresho ld is at the maximum .
The worst-ca se VGS is:
RSENSE VFCS
IREG
------------
=
Where:
IREG is the desired fast charge current.
PowerDissipation 220m551mA2
66.8mW==
PowerDissipation VDDMAX VPTHMIN
–IREGMAX
=
Where:
VDDMAX is the maximum input voltage.
IREGMAX is the maximum fast charge current.
VPTHMIN is the minimum transition threshold voltage.
PowerDissipation 5.5V2.75V–551mA1.52W==
VGS VDRVMAX VDDMIN VFCSMAX––=
Where:
VDRVMAX is the maximum sink voltage at the
VDRV output
VDDMIN is the minimum input voltage source
VFCSMAX is the maximum fast charge current
regulation threshold