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41977 AMD RS690 Databook 3.04 © 2007 Advanced Micro Devices, Inc.
List of Tables-1 Proprietary
List of Tables
Table 1-1: RS690-Family ASIC Part Numbers ............................................................................................................................ 1-10
Table 1-2: Pin Type Codes ........................................................................................................................................................... 1-10
Table 1-3: Acronyms and Abbreviations ...................................................................................................................................... 1-11
Table 2-1: Single-Link Signal Mapping for DVI/HDMI ............................................................................................................... 2-5
Table 2-2: Dual-Link Signal Mapping for DVI .............................................................................................................................. 2-6
Table 2-3: Support for HDMI Packet Type .................................................................................................................................... 2-7
Table 2-4: VGA DAC Characteristics ............................................................................................................................................ 2-8
Table 3-1: CPU HyperTransport Interface ..................................................................................................................................... 3-5
Table 3-2: 1 x 16 Lane PCI Express Interface for External Graphics ............................................................................................ 3-5
Table 3-3: 1 x 4 Lane A-Link Express II Interface for Southbridge .............................................................................................. 3-5
Table 3-4: 4 x 1 Lane PCI Express® Interface for General Purpose External Devices ................................................................. 3-6
Table 3-5: PCI Express® Interface for Miscellaneous PCI Express® Signals .............................................................................. 3-6
Table 3-6: Clock Interface .............................................................................................................................................................. 3-6
Table 3-7: CRT and TV Interface ................................................................................................................................................... 3-6
Table 3-8: Integrated DVI/HDMI Interface .................................................................................................................................... 3-7
Table 3-9: TMDS Interface Multiplexed on the PCI Express® Graphics Interface ....................................................................... 3-8
Table 3-10: Power Management Pins ............................................................................................................................................. 3-9
Table 3-11: Miscellaneous Pins ...................................................................................................................................................... 3-9
Table 3-12: Power Pins ................................................................................................................................................................. 3-10
Table 3-13: Ground Pins ............................................................................................................................................................... 3-11
Table 3-14: RS690 Debug Port Signals ........................................................................................................................................ 3-11
Table 3-15: Strap Definitions for the RS690 ................................................................................................................................3-12
Table 3-16: Strap Definition for GPPSB_LINK_CONFIG .......................................................................................................... 3-13
Table 4-1: HTREFCLK Pad (66.66MHz) Timing Parameters ....................................................................................................... 4-1
Table 4-2: PCI Express® Differential Clock (GFX_CLK, SB_CLK) AC Characteristics ............................................................ 4-1
Table 4-3: Timing Requirements for the OSCIN Pad .................................................................................................................... 4-1
Table 4-4: RS690 Power Rail Power Up Sequence Requirements ................................................................................................. 4-3
Table 5-1: Maximum and Minimum Ratings ................................................................................................................................. 5-1
Table 5-2: DC Characteristics for 3.3V TTL Signals ..................................................................................................................... 5-2
Table 5-3: DC Characteristics for 1.8V TTL Signals ..................................................................................................................... 5-2
Table 5-4: DC Characteristics for the HTREFCLK Pad (66.66MHz) ............................................................................................ 5-2
Table 5-5: DC Characteristics for the OSCIN Pad (14.3181818MHz) .......................................................................................... 5-2
Table 5-6: DC Characteristics for the Integrated DVI/HDMI (Not Applicable to the RS690C) ................................................... 5-3
Table 5-7: DC Characteristics for the TMDS Interface Multiplexed on the PCI Express® Gfx Lanes ......................................... 5-3
Table 5-8: RS690 Thermal Limits .................................................................................................................................................. 5-4
Table 5-9: RS690 465-Pin FCBGA Package Physical Dimensions ............................................................................................... 5-6
Table 5-10: Recommended Board Solder Reflow Profile - RoHS/Lead-Free Solder .................................................................... 5-9
Table 6-1: ACPI States Supported by the RS690 ........................................................................................................................... 6-1
Table 6-2: ACPI Signal Definitions ................................................................................................................................................ 6-1
Table 6-3: Standard PCI Configuration Space Header Type 0 ....................................................................................................... 6-2
Table 6-4: PCI Status Register ........................................................................................................................................................ 6-3
Table 6-5: Capabilities Pointer (CAP_PTR) ................................................................................................................................... 6-3
Table 6-6: Power Management Register Block .............................................................................................................................. 6-3
Table 6-7: Power Management Control/Status Register (PMCSR) ............................................................................................... 6-4
Table 6-8: Capability Identifier (Cap_ID) ...................................................................................................................................... 6-4
Table 6-9: Next Item Pointer (NEXT_ITEM_PTR) ....................................................................................................................... 6-5
Table 6-10: Power Management Capabilities – PMC .................................................................................................................... 6-5
Table 7-1: Pins on the Test Interface .............................................................................................................................................. 7-1
Table 7-2: Example of an XOR Tree .............................................................................................................................................. 7-2