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State Machine Encoding Application Brief 131
A one-hot encoding scheme uses one register for each state—e.g., four
registers for a 4-state state machine—with only one state bit at a high logic
level at one time. You can implement a 4-state state machine with a one-hot
encoding scheme as follows:
state1 = "0001"
state2 = "0010"
state3 = "0100"
state4 = "1000"
You should choose an encoding method based on the complexity of your
state machine, the target device family, and requirements for recovering
from illegal states.
Complex State Machines
Binary encoding uses fewer registers than one-hot encoding. Thus, binary
encoding requires only seven registers to implement a 100-state state
machine, whereas one-hot encoding needs 100 registers. On the other
hand, although one-hot encoding requires more registers, the logic is
generally less complex. In a binary-encoded state machine, the logic that
controls the transitions from state to state depends on all seven state bits as
well as the inputs to the state machine. This type of logic typically requires
high-fan-in functions to the inputs of the state bits. In a one-hot-encoded
state machine, however, the inputs to the state bits are often simply the
functions of other state bits.
Device Architecture
Different architectures favor certain types of encoding. The MAX+PLUS II
Compiler automatically selects the most appropriate encoding method for
the targeted device family, unless you specify a particular scheme in one of
your design files. For example, since the Altera FLEX 8000 device family is
register-intensive, state machines targeted for these devices are best
implemented with a one-hot encoding scheme. Since a one-hot-encoded
state machine reduces the complexity of the logic feeding the state bits,
one-hot encoding can increase the performance of your state machine
design for FLEX 8000 devices.
The MAX 5000 and MAX 7000 device families are best suited to a binary
state machine encoding scheme. Both of these device families can efficiently
implement complex combinatorial logic with shared and parallel expander
product terms. Thus, devices in these device families can accommodate
complex combinatorial logic functions without wasting resources or
sacrificing performance.
One-Hot
Encoding
Selecting an
Encoding
Method