Detailed Description
The MAX5487/MAX5488/MAX5489 contain two resistor
arrays, with 255 resistive elements each. The MAX5487
has an end-to-end resistance of 10kΩ, while the MAX5488
and MAX5489 have resistances of 50kΩ and 100kΩ,
respectively. These devices allow access to the high, low,
and wiper terminals on both potentiometers for a standard
voltage-divider configuration. Connect the wiper to the
high terminal, and connect the low terminal to ground, to
make the device a variable resistor (see Figure 1).
A simple 3-wire serial interface programs either wiper
directly to any of the 256 tap points. The nonvolatile memory
stores the wiper position prior to power-down and recalls
the wiper to the same point upon power-up or by using an
interface command (see Table 1). The nonvolatile memory
is guaranteed for 200,000 wiper store cycles and 50 years
for wiper data retention.
SPI Digital Interface
These devices use a 3-wire SPI-compatible serial
data interface (Figure 2 and Figure 3). This write-only
interface contains three inputs: chip-select (CS), data
clock (SCLK), and data in (DIN). Drive CS low to enable
the serial interface and clock data synchronously into the
shift register on each SCLK rising edge.
The WRITE commands (C1, C0 = 00 or 01) require 16
clock cycles to clock in the command, address, and data
(Figure 3a). The COPY commands (C1, C0 = 10, 11) can
use either eight clock cycles to transfer only command
and address bits (Figure 3b) or 16 clock cycles, with the
device disregarding 8 data bits (Figure 3a).
After loading data into the shift register, drive CS high
to latch the data into the appropriate potentiometer
control register and disable the serial interface. Keep
CS low during the entire serial data stream to avoid
corruption of the data.
Digital-Interface Format
The data format consists of three elements: command
bits, address bits, and data bits (see Table 1 and
Figure 3). The command bits (C1 and C0) indicate
the action to be taken such as changing or storing the
wiper position. The address bits (A1 and A0) specify
which potentiometer the command affects and the 8
data bits (D7 to D0) specify the wiper position.
Table 1. Register Map
CLOCK EDGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
— — C1 C0 — — A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
Write Wiper Register A 0 0 0 0 0 0 0 1 D7 D6 D5 D4 D3 D2 D1 D0
Write Wiper Register B 0 0 0 0 0 0 1 0 D7 D6 D5 D4 D3 D2 D1 D0
Write NV Register A 0 0 0 1 0 0 0 1 D7 D6 D5 D4 D3 D2 D1 D0
Write NV Register B 0 0 0 1 0 0 1 0 D7 D6 D5 D4 D3 D2 D1 D0
Copy Wiper Register A to NV
Register A 0 0 1 0 0 0 0 1 — — — — — — — —
Copy Wiper Register B to NV
Register B 0 0 1 0 0 0 1 0 — — — — — — — —
Copy Both Wiper Registers to
NV Registers 0 0 1 0 0 0 1 1 — — — — — — — —
Copy NV Register A to Wiper
Register A 0 0 1 1 0 0 0 1 — — — — — — — —
Copy NV Register B to Wiper
Register B 0 0 1 1 0 0 1 0 — — — — — — — —
Copy Both NV Registers to
Wiper Registers 0 0 1 1 0 0 1 1 — — — — — — — —
Figure 1. Voltage-Divider/Variable-Resistor Configurations
H
L
W
VOLTAGE-DIVIDER
CONFIGURATION
VARIABLE-RESISTOR
CONFIGURATION
H
L
www.maximintegrated.com Maxim Integrated
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9
MAX5487/MAX5488/
MAX5489
Dual, 256-Tap, Nonvolatile, SPI-Interface,
Linear-Taper Digital Potentiometers