HRF-AT4521
Preliminary
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Web Site: www.mysoiservices.com Honeywell
Email: mysoiservices@honeywell.com Solid State Electronics Center
31.0 dB, DC-2.5GHz, 5 Bit
Serial Digital Attenuator
Features
x Very Low DC Power Consumption
x Attenuation In Steps From 1 dB To 31 dB
x Single Or Dual Power Supply Voltages
x Serial Data Interface
x 50 Ohm Compatible Impedance
x Space Saving VQFN Surface Mount Packaging
Product Description
The Honeywell HRF-AT4521 is a 5-bit digital
attenuator that is ideal for use in broadband
communication system applications that require
accuracy, speed and low power consumption. The
HRF-AT4521 is manufactured with Honeywell's
patented Silicon On Insulator (SOI) CMOS
manufacturing technology, which provides the
performance of GaAs with the economy and
integration capabilities of conventional CMOS.
HRF-AT4521 in VQFN Package
RF Electrical Specifications @ + 25oC
Results @ Vdd = 5.0 +/- 10%, Vss = 0 unless otherwise stated, Z0 = 50 Ohms
Contact Honeywell for relative performance at other supply configurations
Parameter Test Condition Frequency Minimum Typical Maximum Units
Insertion Loss* DC – 1.0 GHz
2.0 GHz
2.5 GHz
2.0
2.2
2.8
2.6
2.8
3.4
dB
dB
dB
1dB Compression* VSS = 0V, Input Power DC – 2.5 GHz 24 dBm
1dB Compression* VSS = - VDD, Input Power DC – 2.5 GHz 29 dBm
Input IP3* VSS = 0V Two-tone inputs
Up To +5 dBm @ 0 dBm
Attenuation
DC – 2.5 GHz 38 dBm
Input IP3* Vss = - VDD
Two-tone inputs Up To + 5
dBm @ 0 dBm Attenuation
DC – 2.5 GHz >38 dBm
Return Loss* Any Combination of Bits DC – 2.5 GHz 11 13 dB
Attenuation Accuracy
(States < 8 dB are
GBD*)
All attenuation states
All attenuation states
All attenuation states
DC – 1.0 GHz
2.0 GHz
2.5 GHz
+/-(0.45 + 3.0% of programmed IL)
+/-(0.55 + 4.5% of programmed IL)
+/-(0.6 + 8% of programmed IL)**
dB
dB
dB
Trise, Tfall*
Ton, Toff (Tpd)
Transients
10% To 90%
50% Cntl To 90%/10%RF
In-Band
10
15
30
nS
nS
mV
T clock Period (Tprd)* T high / T low = ½ minimum clock period 50 nS
T data set up (Tsup)* Set up to rising edge of clock 5 nS
T data hold (Thld)* Data hold after rising edge of clock 2 nS
T latch set up (Tlsup)* Data set up to rising edge of OE 5 nS
0.01uF Decoupling Capacitors Required On Power Supply Rails.
*Guaranteed by design
**For higher accuracy designs, please consider HRFAT4610/HRF-AT4611
12001 State Highway 55
2004 4521W Published August 2004 Page 1 Plymouth, Minnesota 55441-4799
1-800-323-8295