16-Bit Latc h
f
ax id: 7017
CY74FCT16373T
CY74FCT162373T
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Au
g
ust 1994 – Revised October 30
,
1997
2
373T
Features
• Low pow er, pin- com pati ble rep lacement for ABT
functions
• FCT-E speed at 3.4 ns
• Power-off disable outputs permits live insertion
• Edge-rate control cir cuitry for signif icantly improved
noise characteristics
• Typical output sk ew < 250 ps
• ESD > 2000V
• TSSOP (19.6 -mil pit ch) and SSOP (25-mil pitc h)
packages
• Industrial temperature range of −40°C to +85°C
•V
CC = 5V ± 10%
CY74FCT16373T Features:
• 64 mA sink current, 32 mA source current
• Typical VOLP (ground bounce) <1.0V at VCC = 5V,
TA = 25°C
CY74FCT162373T Features:
• B alanced 24 mA output drivers
• R educed system switching noise
• Typical VOLP (ground bounce) <0.6V at VCC = 5V,
TA= 25°C
Functional Descripti on
CY74FCT16373T and CY74FCT162373T are 16-bit D-type
latches designed for use in bus applications requiring high
speed and low power. These devices can be used as two
independent 8-bit latches or as a single 16-bit latch by con-
necting the Output Enable (OE) and Latch (LE) inputs.
Flow-through pinout and small shrink packaging aid in
simpli fying board layout. The output buffers are designed with
power-off disable feature that allows live inser tion of boards.
The CY74FCT16373T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162373T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for mini-
mal undershoot and reduced ground bounce. The
CY74FCT162373T is ideal for driving transm ission lines.
Logic Block Diagrams Pin Configuration
D
C
1OE
FCT162373-1
1LE
1D11O1
TO 7 OTHERCHANNELS
D
C
2OE
FCT162373-2
2LE
2D12O1
GND
1
2
3
4
5
6
7
8
9
10
11
12
33
32
31
30
29
25
26
27
28
36
35
1OE
34
SSOP/TSSOP
Top View
13
14
15
16
17
18
19
20
21
22
23
24
45
44
43
42
41
37
38
39
40
48
47
46
1O1
1O2
1O3
1O4
1D1
1D2
1D3
1D4
1LE
GND
GND
VCC
1O7
1O8
1O5
1O6
1D5
1D6
1D7
1D8
VCC
GND
GND
2O3
2O4
2O1
2O2
2D1
2D2
2D3
2D4
GND
GND
VCC
2O7
2O8
2O5
2O6
2D5
2D6
2D7
2D8
VCC
GND
2OE 2LE
FCT162373-3
TO 7 OTHERCHANNELS
CY74FCT16373T
CY74FCT162373T
2
Maximum Ratings[2, 3]
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Storage Temperature.......................Com’l −55°C to +125°C
Ambient Temperature with
Power Applied..................................Com’l −55°C to +125°C
DC Input Voltage.................................................−0.5V to +7.0V
DC Output Voltage..............................................−0.5V to +7.0V
DC Output Current
(Maximum Sink Current /Pi n)...........................−60 to +120 mA
Power Dissipation.......................................................... 1.0W
Static Discharge Voltage ...........................................>2001V
(per MIL- STD-883, Method 3015)
Pin Description
Name Description
DData Input s
LE Latch Enable Input s (Active HIGH)
OE Output Enable Inputs (Active LOW)
OThree-State Outputs
Function Table[1]
Inputs Outputs
DLE OE O
H H L H
L H L L
X L L Q0
X X H Z
Operating Range
Range Ambient
Temperature VCC
Industrial −40°C to +85°C 5V ± 10%
Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions Min. Typ.[4] Max. Unit
VIH Input HIGH Voltage 2.0 V
VIL Input LOW Vol tage 0.8 V
VHInput Hysteresis[5] 100 mV
VIK Input Clamp Diode Voltage VCC=Min., IIN=−18 mA −0.7 −1.2 V
IIH Input HIGH Current VCC=Max., VI=VCC ±1µA
IIL Input LOW Current VCC=Max., VI=GND ±1µA
IOZH High Impedance Output Cur rent
(Three-State Output pins) VCC=Max., VOUT=2.7V ±1µA
IOZL High Impedance Output Cur rent
(Three-State Output pins) VCC=Max., VOUT=0.5V ±1µA
IOS Shor t Circuit Current[6] VCC=Max., VOUT=GND −80 −140 −200 mA
IOOutput Drive Current[6] VCC=Max., VOUT=2.5V −50 −180 mA
IOFF Power-Off Disable VCC=0V, VOUT≤4.5V[7] ±1µA
Output D rive Characteristics for CY74FCT16373T
Parameter Description Te st Conditions Min. Typ.[4] Max. Unit
VOH Output HIGH Voltage VCC=Mi n ., IOH=−3 mA 2.5 3.5 V
VCC=Mi n ., IOH=−15 m A 2.4 3.5 V
VCC=Mi n ., IOH=−32 m A 2.0 3.0 V
VOL Output LOW Voltage VCC=Mi n ., IOL=64 mA 0.2 0.55 V
Notes:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance. Q0=Previous state of flip-flop.
2. Operation beyond the limits set forth may impair the useful lif e of the device. Unless otherwise noted, these limits are over the operating free-air temperature
range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
4. Typical values are at VCC=5.0V, TA= +25°C ambient.
5. This parameter is guaranteed but not tested.
6. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause inv alid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
7. Tested at +25°C.
CY74FCT16373T
CY74FCT162373T
3
Output D rive Characteristics for CY74FCT162373T
Parameter Description Test Conditions Min. Typ.[4] Max. Unit
IODL Output LOW Current[6] VCC=5V, VIN=VIH or VIL, VOUT=1.5V 60 115 150 mA
IODH Output HIGH Current [6] VCC=5V, VIN=VIH or VIL, VOUT=1.5V −60 −115 −150 mA
VOH Output HIGH Voltage VCC=Mi n ., IOH=−24 mA 2.4 3.3 V
VOL Output LOW Voltage VCC=Mi n ., IOL=24 mA 0.3 0.55 V
Capacitance[5] (TA = +25°C, f = 1.0 MHz)
Parameter Description Test Condi tions Typ.[4] Max. Unit
CIN Input Capacit ance VIN = 0V 4.5 6.0 pF
COUT Output Capacit ance VOUT = 0V 5.5 8.0 pF
Pow er Supply Characteristics
Parameter Description Test Conditions Typ.[4] Max. Unit
ICC Quiesc ent P ower S upply Curr ent VCC=Max. VIN≤0.2V,
VIN≥VCC−0.2V 5500 µA
∆ICC Quiescent Power Supply Current
(TTL in puts HIGH) VCC=Max. VIN=3.4V[8] 0.5 1.5 mA
ICCD Dynamic Power Supply
Current[9] VCC=Max., One Input
Toggling, 50% Duty Cycl e,
Outputs Open, OE=GND
VIN=VCC or
VIN=GND 60 100 µA/MHz
ICTotal Power Supply Current[10] VCC=Max., f1=10 MHz,
50% Duty Cycle, Outputs
Ope n, One Bit Toggling,
OE=GND, LE=VCC
VIN=VCC or
VIN=GND 0.6 1.5 mA
VIN=3.4V or
VIN=GND 0.9 2.3 mA
VCC=Max., f1=2 .5 MH z,
50% Duty Cycle, Outputs
Ope n, Si xteen Bits Togglin g,
OE=GND, LE=VCC
VIN=VCC or
VIN=GND 2.4 4.5[11] mA
VIN=3.4V or
VIN=GND 6.4 16.5[11] mA
Notes:
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. IC=I
QUIESCENT + IINPUTS + IDYNAMIC
IC=I
CC+∆ICCDHNT+ICCD(f0/2 + f1N1)
ICC = Quiescent Current with CMOS input levels
∆ICC = Power Supply Current for a TTL HIGH input(VIN=3.4V)
DH = Duty Cycle for TTL inputs HIGH
NT = Number of TTL inputs at DH
ICCD = Dynamic Current caused by an input transition pair (HLH or LHL)
f0= Clock frequency for registered devices, otherwise zero
f1= Input signal frequency
N1= Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
CY74FCT16373T
CY74FCT162373T
4
Swi tch i ng C h ara cter i sti cs Over the Operating Range[12]
CY74FCT16373T
CY74FCT162373T CY74FCT16373AT
CY74FCT162373AT
Parameter Description Min. Max. Min. Max. Unit Fi g . N o . [13]
tPLH
tPHL Propagation Delay D to O 1.5 8.0 1.5 5.2 ns 1, 3
tPLH
tPHL Propagation Delay
LE to O 2.0 13.0 2.0 6.7 ns 1, 5
tPZH
tPZL Outp ut Enable Ti me 1.5 12.0 1.5 6.1 ns 1, 7, 8
tPHZ
tPLZ Output Disable Time 1.5 7.5 1.5 5.5 ns 1, 7, 8
tSU Set-Up Time HIGH or LOW, D to LE 2.0 2.0 ns 9
tHHold Time HIGH or LOW,
D to LE 1.5 1.5 ns 9
tWLE Pulse Widt h HIGH 6.0 3.3 ns 5
tSK(O) Output Skew[14] 0.5 0.5 ns —
CY74FCT16373CT
CY74FCT162373CT CY74FCT16373ET
CY74FCT162373ET
Parameter Description Min. Max. Min. Max. Unit Fig. No.[13]
tPLH
tPHL Propagation Delay
D to O 1.5 4.2 1.5 3.4 ns 1, 3
tPLH
tPHL Propagation Delay
LE to O 2.0 5.5 2.0 3.7 ns 1, 5
tPZH
tPZL Outp ut Enable Ti me 1.5 5.5 1.5 4.4 ns 1, 7, 8
tPHZ
tPLZ Output Disable Time 1.5 5.0 1.5 3.6 ns 1, 7, 8
tSU Set-Up Time HIGH or LOW, D to LE 2.0 1.0 ns 9
tHHold Time HIGH or LOW,
D to LE 1.5 1.0 ns 9
tWLE Pulse Widt h HIGH 3.3 3.0 ns 5
tSK(O) Output Skew[14] 0.5 0.5 ns —
Notes:
12. Minimum limits are guaranteed but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
14. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
CY74FCT16373T
CY74FCT162373T
5
Document #: 38-00386-C
Ordering Information CY74FCT16373
Speed
(ns) Ordering Code Package
Name Package Type Operating
Range
3.4 CY74FCT16373ETPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16373ETPVC O48 48-Lead (300-Mil) SSOP
4.2 CY74FCT16373CTPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16373CTPVC O48 48-Lead (300-Mil) SSOP
5.2 CY74FCT16373ATPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16373ATPVC O48 48-Lead (30 0-Mil) SSOP
8.0 CY74FCT16373TPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16373TPVC O48 48-Lead (300-Mi l) SSOP
Ordering Information CY74FCT162373
Speed
(ns) Ordering Code Package
Name Package Type Operating
Range
3.4 CY74FCT162373ETPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162373ETPVC O48 48-Lead (300-Mi l) SSOP
4.2 CY74FCT162373CTPAC Z48 48-Lead (240-Mi l) TSSOP Industrial
CY74FCT162373CTPVC O48 48-Lead (300-Mi l) SSOP
5.2 CY74FCT162373ATPA C Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162373ATPVC O48 48-Lead (30 0-Mil) SSOP
8.0 CY74FCT162373TPAC Z48 48-Lead (240-Mil ) TSSOP Industrial
CY74FCT162373TPVC O48 48-Lead (300-Mi l) SSOP
CY74FCT16373T
CY74FCT162373T
© Cypress Semiconductor Corporation, 1997. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circui try other than circuitry embodied in a Cypress Semiconduc tor produc t. Nor does it conv ey or imply any license under patent or other rights. C ypress Semicond uctor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
Package Di ag ra ms
48-Lead Shrunk Small Outline Package O48
48-Lead Thin Shrunk Small Outline Package Z48
