Industrial Environment Switching Regulators 19" PSL-Family
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The Power Partners.
5.2
PSR: Positive Switching Regulators PSL-Family
No input to output isolation
Single output of 5.1, 12, 15, 24 or 36 V DC/51...288 W
Input voltage up to 80 V DC
High efficiency up to 94%
Wide input voltage range
Low input-to-output differential voltage
Very good dynamic properties
Input undervoltage cut-out
External output voltage adjustment and inhibit
Continuous no-load and short-circuit proof
No derating
Safety according to IEC 950
C
Table of Contents Page
Type Survey ..............................................................5 - 37
Description ................................................................5 - 37
Safety and Installation Instructions ...........................5 - 38
Immunity to Environmental Conditions......................5 - 39
Electromagnetic Compatibility EMC..........................5 - 40
Characteristics and Definitions..................................5 - 41
Electrical Input and Output Data ...............................5 - 42
Standard Features ....................................................5 - 44
Description of Options...............................................5 - 44
Mechanical Data .......................................................5 - 46
Type Key and Product Mar king .................................5 - 47
Description
The PSL family of positive swiching regulators is designed
as power supply modules for electronic systems. Their ma-
jor advantages include a high level of efficiency that re-
mains virtually constant over the entire input range, high
reliability, low ripple and excellent dynamic response.
Modules with input up to 80 V are specially designed for
secondary switched and battery driven applications.
Case L04: Aluminium, black finish and self cooling.
External input circuitry
An external capacitor (see "Application Notes") is required
in rectifier mode and in DC operation mode only, if the sum
of the lengths of the two input lines between source and in-
put (without option L) is greater than approx. 5 m. For long
connection lines the use of option L is recommended in or-
der to reduce superimposed interference voltages or cur-
rents and to prevent oscillation.
Type Survey
Table 1: Type survey
Nominal Nominal Input Nominal Efficiency Type Options Superseded
output output voltage input designation old type
voltage current range voltage (phase-out)
U
o nom
I
o nom
U
i 1
U
i nom
η
5.1 V 12 A 7...40 V 20 V 83% PSL 5A12-7R -9, L, i, P, C, D, A PSR 512E-7
5.1 V 10 A 8...80 V 40 V 76% PSL 5A10-7R PSR 510E-7
12 V 8 A 15...80 V 89% PSL 128-7R PSR 128E-7
15 V 19...80 V 90% PSL 158-7R PSR 158E-7
24 V 29...80 V 50 V 92% PSL 248-7R PSR 248E-7
36 V 42...80 V 60 V 94% PSL 368-7R PSR 368E-7
1See data
U
io min (min. differential voltage
U
i
U
o)
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5.2
Control circuit
P (option)
Go–
Vo+
Gi–
Vi+ Input
Filter
L (option)
R/i
I
o
U
o
I
i
U
i
C
e
C (option)
D (option)
+
A (option)
Fig. 1
Block diagram
Table 2: Insulation concept for SELV circuits
Nominal Minimum required grade Maximum Minimum required Measures to achieve the Resulting safety
mains of isolation, to be output safety status of the specified safety status status of the
supply provided by the AC-DC voltage front end output circuit of the output circuit switching
voltage front end, including mains from the regulator output
(AC) supplied battery charger front end circuit
None Battery supply completely 60 V SELV battery circuit None SELV circuit
separated from mains 80 V Hazardous voltage battery Input fuse 1 and unearthed, SELV circuit
circuit 2 non operator-accessible case 2
Hazardous voltage battery Input fuse 1 and earthed output Earthed SELV
circuit circuit 3 and earthed 3 or non circuit
operator-accessible case
250 V Basic 60 V Earthed SELV circuit Earthed input circuit 3 SELV circuit
ELV circuit Input fuse 1 and Earthed SELV
earthed output circuit 3 circuit
80 V Hazardous voltage Input fuse 1 and earthed output Earthed SELV
secondary circuit circuit 3 and earthed 3 or non circuit
operator-accessible case
Double or reinforced 60 V SELV circuit None SELV circuit
80 V Double or reinforced insu- Input fuse 1 and unearthed and SELV circuit
lated unearthed hazardous non operator-accessible case 2
voltage secondary circuit 2
1The installer shall provide an approved fuse (slow blow type with lowest rating suitable for the application, max. 12.5 A) in the positive
or negative input conductor directly at the input of the switching regulator. For UL's purpose, the fuse needs to be UL-listed. If option
C is fitted, a suitable fuse is built-in.
2Has to be insulated from earth by double or reinforced insulation according to the relevant safety standard, based on the maximum in-
put voltage of the switching regulator (contrary to the case marking: "This apparatus must be earthed.").
3The earth connection has to be provided by the installer according to the relevant safety standards, e.g. IEC 950.
Safety and Installation Instructions
Safety
If the output circuit of a switching regulator is operator-ac-
cessible according to the IEC 950 related safety standards,
it shall be an SELV circuit (Safety Extr a Low Voltage circuit,
i.e. a circuit, separated from mains by at least basic insula-
tion, that is so designed and protected that under normal
and single fault conditions, the voltage between any two
conductors and between any conductor and earth does not
exceed 60 V DC).
In the following section an interpretation is provided of the
IEC 950 safety standard with respect to the safety status of
the output circuit. Ho we ver , it is the sole responsibility of the
installer or user to assure the compliance with the relevant
and applicable safety standards.
If the following table is observed, the output of any switch-
ing regulator is considered to be an SELV circuit up to a
nominal output voltage of 36 V.
Note: Check for hazardous voltages before altering
any connections. Do not open the module. The input
and the output circuitry are not separated, i.e. the nega-
tive path is internally interconnected!
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5.2
Standards and Approvals
All Melcher power supplies are subject to manufacturing
surveillance in accordance with ISO 9001 standards.
All units are UL recognized as per UL 1950, UL1012 and
CAN/CSA C22.2 No. 234-M90.
Installation Instructions
The connector pin allocation table defines the electrical
potentials and the physical pin position on the connector.
Pin no. 32 is the protective ground pin and is protruding, i.e.
attaching the female connector, this pin provides electrical
contact first. The modules should only be wired via the fe-
male connector H11 (according to DIN 41612) to ensure
requested safety!
Protection Degree
The protection degree is defined by IP 30 (equipped with
any potentiometer adjustable option: IP 20). The protection
degree applies only if the module is plugged-in or the fe-
male connector is properly attached to the module.
Table 5: Temperature specifications
Temperature Standard -7 Option -9
Characteristics Conditions min max min max Unit
T
AAmbient temperature
U
i min...
U
i max –25 71 –40 71 °C
T
CCase temperature
I
o = 0...
I
o nom –25 95 –40 95
T
SStorage temperature Not operational 40 100 55 100
Immunity to Environmental Conditions
Table 4: Mechanical stress
Test Method Standard Test Conditions Status
Ca Damp heat DIN 40046 part Temperature: 40 ±2 °C Unit not
steady state IEC 68-2-3 Relative humidity: 93 +2/-3 % operating
MIL-STD-810D section 507.2 Duration: 56 days
Ea Shock DIN 40046 part 7 Acceleration amplitude: 100 gn = 981 m/s2Unit
(half-sinusoidal) IEC 68-2-27 Bump duration: 6 ms operating
MIL-STD-810D section 516.3 Number of bumps: 18 (3 each direction)
Eb Continuous shock DIN 40046 part 26 Acceleration amplitude: 40 gn = 392 m/s2Unit
(half-sinusoidal) IEC 68-2-29 Bump duration: 6 ms operating
MIL-STD-810D section 516.3 Number of bumps: 6000 (1000 each direction)
Fc Vibration DIN 40046 part 8 Frequency (1 Oct/min): 10...2000 Hz Unit
(sinusoidal) IEC 68-2-6 Max. vibration amplitude: 0.35 mm (10...60 Hz) operating
MIL-STD-810D section 514.3 Acceleration amplitude: 5 gn = 49 m/s2 (60...2000 Hz)
Test duration: 7.5 h (2.5 h each axis)
Fda Random vibration DIN 40046 part 23 Acceleration spectral density: 0.05 g2/Hz Unit not
wide band IEC 68-2-35 Frequency band: 20...500 Hz operating
reproducibility high Acceleration magnitude: 4.9 grms
Test duration: 3 h (1 h each axis)
Kb Salt mist DIN 40046 part 105 Concentration: 5% (30°C) Unit not
cyclic IEC 68-2-52 Duration: 2 h per cycle operating
(sodium chloride Storage: 40°C, 93% rel. humidity
NaCl solution) Storage duration: 22 h per cycle
Number of cycles: 3
Table 3: H11 connector pin allocation and designation
Electrical Determination Type H11
Pin No. Design.
R-input (or inhibit input) 1 2 R (i)
Undervoltage monitor (Option D) 5 D
Output voltage (negative) 8 Go–
Output voltage (negative) 11 Go–
Output voltage(positive) 14 Vo+
Output voltage (positive) 17 Vo+
Input voltage (negative) 20 Gi–
Input voltage (negative) 23 Gi–
Input voltage (positive) 26 Vi+
Input voltage (positive) 29 Vi+
Protective ground (protruding pin) 32
1R-input (output voltage programming) not available with
option P (potentiometer) or option i (inhibit)
2
5
8
11
14
17
20
23
26
29
32
Fig. 2
View of male H11 connector
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5.2
Table 6: MTBF and device hours
MTBF Ground Fixed Ground Mobile Device Hours 1
MTBF acc. to MIL-HDBK-217D
T
C = 40°C
T
C = 70°C
T
C = 40°C
T
C = 70°C
130'000 h 58'000 h 36'000 h 17'000 h 3'900'000 h
1Statistical values, based on an average of 4300 working hours per year and in general field use
Electromagnetic Compatibility EMC
Immunity
General condition: Case earthed.
Table 7: Immunity type tests
Phenomenon Standard Class Coupling Value Waveform Source Test In Per-
Level mode 4 applied Imped. procedure oper. form.
Impulse voltage IEC 255-4 III i/o, i/c, o/c 5000 Vp1.2/50 µs 500 3 pos. and 3 neg. no -
App. E4 5 +i/–i impulses per
(1976) coupling mode
High frequency IEC 255-4 III i/o, i/c, o/c 2500 Vp400 damped 200 2 s per yes 1
disturbance App. E5 5 +i/–i 1000 Vp1 MHz waves/s coupling mode
(1976)
Voltage surge IEC 571-1 i/c, +i/–i 800 V p100 µs 100 yes 2
(1990-07) 1500 Vp50 µs 1 pos. and 1 neg.
voltage surge per
coupling mode
3000 Vp5 µs
4000 Vp1 µs
7000 Vp100 ns
Electrostatic IEC 801-2 3 contact discharge 6000 Vp1/50 ns 330 10 positive and yes 1 6
discharge (1991-04) to case 10 negative
discharges
Electric field IEC 801-3 2 antenna in 3 V/m sine wave mod- 26…1000 MHz yes 1
(1984) 1m distance ulated w. 1 kHz
Fast transient/ IEC 801-4 3 i/c, +i/–i 2000 Vpbursts of 5/50 ns 50 1 min positive yes 1 3 6
burst (1988) 5 kHz rep. rate 1 min negative
transients with bursts per
15 ms burst coupling mode
duration and a
4 4000 Vp300 ms period 2 3 6
Transient IEC 801-5 III i/c 2000 Vp1.2/50 µs 12 5 pos. and 5 neg. yes 2 6
(Draft 1993-01 ) +i/–i 1000 Vp2 impulses per
coupling mode
Immunity to IEC 801-6 3 i, o, signal wires 10 Vrms 7 80% amplitude 50 AM 0.15...80 MHz yes 1
conducted modulated
disturbancies with 1 kHz
1Normal operation, no deviation from specifications
2Normal operation, temporary deviation from specs possible
3With option C: manual reset
4i = input, o = output, c = case
5In correspondance with DIN 57435 part 303 and VDE 0435 part 303 (1984-09)
6Option L neccessary
7Open circuit
Emission
For emission levels refer to "Electrical Input and Output
Data".
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5.2
Characteristics and Definitions
Output Protection
A voltage suppressor diode protects the output against an
internally generated overvoltage, which could occur due to
a failure of the control circuit, which in worst case condi-
tions fails into a shor t circuit. The suppressor diode is not
designed to withstand externally applied overvoltages. The
user should ensure that systems with Melcher power sup-
plies, in the event of a failure, do not result in an unsafe
condition (fail-safe).
Dynamic Characteristics
Fig. 3
Behaviour and characteristics under varying load condi-
tions.
Temperature
When a converter is located in free, quasi-stationary air at a
temperature
T
A = 71°C and is operated at its nominal output
power , the case temper ature
T
C will be about 95°C after the
warm-up phase measured at the measuring point of case
temperature
T
C (see "Mechanical Data").
Under practical operating conditions, the ambient tempera-
ture
T
A may exceed 71°C, provided additional measures
are taken to ensure that the case temperature
T
C does not
exceed its maximum value of 95°C ( heat sink, fan, etc.).
Example: Sufficient forced cooling allows
T
A max = 85°C. A
simple check of the case temperature
T
C (
T
C 95 °C) at full
load ensures correct operation of the system
0
10
20
30
40
50
60
70
80
–40 50 60 70 80 90 100
P
o [%]
T
A [°C]
90
100
110
T
C max
P
o max
(convection cooling)
P
o max (forced cooling)
Fig. 4
Output power derating versus ambient temperature
Parallel and Series Connection
Outputs of equal nominal voltages can be parallel-con-
nected. However, the use of a single unit with higher output
power, because of its power dissipation, is always a better
solution.
In parallel-connected oper ation, one or sev eral outputs may
operate continuously at their current limit knee-point which
will cause an increase of the case temperature. Conse-
quently, the max. ambient temperature value should be re-
duced by 10 K.
Outputs can be series-connected with an y other module. In
series-connection the maximum output current is limited by
the lo west current limitation. Galvanically separated source
voltages are needed for each module!
Short circuit behaviour
A constant current limitation circuit holds the output current
almost constant whenever an overload or a shor t circuit is
applied to the regulator's output. It acts self-protecting and
recovers - in contrar y to the fold back method - automati-
cally after remo val of the o verload or short circuit condition.
1.2
1.0
0.8
0.6
0.4
00.2 0.4 1.0 1.2
0.2
0.6 0.8 1.4
U
o/
U
o nom
I
o/
I
o nom
I
o nom
I
o L
Fig. 5
Overload, short-circuit behaviour U
o
versus I
o
I
o
/
I
o nom
3/3
2/3
1/3
0
t
10 µs
10 µs
u
od
u
od
t
r
t
r
U
o I
U
o I
t
U
o
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5.2
Electrical Input and Output Data
General Conditions
T
A = 25°C, unless
T
C is specified.
With R or option P, output voltage
U
o =
U
o nom at
I
o nom
Table 8a: Input and output data
Characteristics Conditions PSL 5A12 PSL 5A10 PSL 128 Unit
min typ max min typ max min typ max
Output
U
o nom Output voltage
U
i nom,
I
o nom 5.07 5.13 5.07 5.13 11.92 12.07 V
I
o nom Output current
U
i min...
U
i max 12.0 10.0 8.0 A
I
oL Output current
T
C min...
T
C max 12.0 15.6 10.0 13.0 8.0 10.4
limitation response
u
oRipple at output
U
i nom 50 35 50 80 150 mVpp
(BW = 20 MHz)
I
o nom
U
o U Static control deviation
U
i min...
U
i max 45 30 45 50 75 mV
versus input voltage
U
i
I
o nom
U
o I Static control deviation
U
i nom 25 20 25 28 35
versus output current
I
o
I
o = 0…
I
o nom
u
o d Dynamic control
U
i nom 130 130 130
deviation 1
I
o nom 1/3
I
o nom
t
rDynamic load transient 40 50 60 µs
time recovery 1
αuo Temperature coefficient
U
i min...
U
i max ±1±1±2 mV/K
U
o/
T
C
T
C min...
T
C max
I
o = 0...
I
o nom ±0.02 ±0.02 ±0.02 %/K
Input
U
iInput voltage
I
o = 0...
I
o nom 7 40 8 80 15 80 V DC
T
C min...
T
C max
U
io min Minimum differential 2 3 3 V
voltage
U
i -
U
o 2
U
i o Undervoltage cut-out 6.3 7.3 7.3
I
i 0 No load
I
o = 0 45 40 35 mA
input current
U
i min...
U
i max
I
i m Peak value of
U
i nom 150 250 250 A
inrush current 3
t
i s Rise time 3555µs
t
i r Tail half value time 340 40 40
I
i m Peak value of
U
i nom 250 350 350 A
inrush current 3with option L
t
i s Rise time 325 25 25 µs
t
i r Tail half value time 3125 125 125
u
i rfi RFI level at input, 4VDE 0871 (6. 78) B B B dB (µV)
0.01...30 MHz
U
i nom,
I
o nom
Efficiency
η
Efficiency
U
i nom,
I
o nom 83 76 89 %
Isolation
U
is Isolation test voltage Inputs/outputs 750 750 750 V DC
electronics to case interconnected
1See "Dynamic characteristics"
2The minimum differential voltage
U
io min between input and output increases linearly from 0 to 1 V at
T
A = 46°C and 71°C
(
T
C = 70°C and 95°C)
3Definitions according to VDE 0433, part 3
4With option L and additional external input capacitor
C
e = 120 µF/100 V, e.g. Nichicon, PF(M) series, or equivalent
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5.2
Table 8b: Input and output data
Characteristics Conditions PSL 158 PSL 248 PSL 368 Unit
min typ max min typ max min typ max
Output
U
o nom Output voltage
U
i nom,
I
o nom 14.91 15.09 23.85 24.14 35.78 36.22 V
I
o nom Output current
U
i min...
U
i max 8.0 8.0 8.0 A
I
oL Output current
T
C min...
T
C max 8.0 10.4 8.0 10.4 8.0 10.4
limitation response
u
oRipple at output
U
i nom 80 150 100 250 150 300 mVpp
(BW = 20 MHz)
I
o nom
U
o U Static control deviation
U
i min...
U
i max 70 100 150 220 200 270 mV
versus input voltage
U
i
I
o nom
U
o I Static control deviation
U
i nom 33 45 120 160 125 160
versus output current
I
o
I
o = 0…
I
o nom
u
o d Dynamic control
U
i nom 130 150 220
deviation 1
I
o nom 1/3
I
o nom
t
rDynamic load transient 60 80 100 µs
time recovery 1
αuo Temperature coefficient
U
i min...
U
i max ±3±5±8 mV/K
U
o/
T
C
T
C min...
T
C max
I
o = 0...
I
o nom ±0.02 ±0.02 ±0.02 %/K
Input
U
iInput voltage
I
o = 0...
I
o nom 19 80 29 80 42 80 V DC
T
C min...
T
C max
U
io min Minimum differential 4 5 6 V
voltage
U
i -
U
o 2
U
i o Undervoltage cut-out 7.3 12 19
I
i 0 No load
I
o = 0 35 35 40 mA
input current
U
i min...
U
i max
I
i m Peak value of
U
i nom 250 250 250 A
inrush current 3
t
i s Rise time 3555µs
t
i r Tail half value time 340 40 40
I
i m Peak value of
U
i nom 350 350 350 A
inrush current 3with option L
t
i s Rise time 325 25 25 µs
t
i r Tail half value time 3125 125 125
u
i rfi RFI level at input, 4VDE 0871 (6.78) B B B dB ( µV)
0.01...30 MHz
U
i nom,
I
o nom
Efficiency
η
Efficiency
U
i nom,
I
o nom 90 92 94 %
Isolation
U
is Isolation test voltage Inputs/outputs 750 750 750 V DC
electronics to case interconnected
1See "Dynamic characteristics"
2The minimum differential voltage
U
io min between input and output increases linearly from 0 to 1 V at
T
A = 46°C and 71°C
(
T
C = 70°C and 95°C)
3Definitions according to VDE 0433, part 3
4With option L and additional external input capacitor
C
e = 120 µF/100 V, e.g. Nichicon, PF(M) series, or equivalent
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5.2
Caution: To prevent damage
U
ex should not exceed
U
ref, nor be negative.
Vo +
R
+
G
4000
U
ref
R
1
R
2
Go –
Fig. 7
Voltage adjustment with external resistor R
1
or R
2
[
]
b)
U
o = 0...100%
U
o nom, using
R
1 between R and G (Go-):
R
14000 •
U
o
U
o
U
o nom ––––––––
R
1 –––-––––
R
1 + 4000
U
o nom -
U
o
c)
U
o =
U
o nom...
U
o max, using
R
2 between R and Vo+:
U
o max =
U
o nom + 8%
R
2
U
ref
U
o
U
ref –––––––––––––––––– k = ––––––
k • (
R
2 + 4000) - 4000
U
o nom
U
o • (1-k)
R
2 4000 • ––––––––– (
U
ref = 2.5 V ±4%)
k •
U
o -
U
ref
All for mulae give approximate values only.
U
o nom
a)
U
o
U
ex –––––– (
U
ref = 2.5 V ±4%)
U
ref
Fig. 6
Voltage adjustment with U
ex
[V] between R and G (Go-):
Vo +
R
+
4000
G
U
ref
U
ex
+
Go –
Standard Features
R External Output Voltage Adjustment
Note: With open R input,
U
o =
U
o nom.
(For superseded PSR types,
U
o = 1.08 •
U
o nom)
R-input together with option i or option P cannot
be supported simultaneously.
The output voltage
U
o can either be adjusted with an exter-
nal resistor (
R
1 or
R
2) or with an e xternal voltage (
U
ex). The
adjustment range is 0...1.08 of
U
o nom. The minimal differen-
tial voltage
U
io min between input and output should be
maintained (see data). Min. input = Undervoltage cut-out.
Data
Table 9: Inhibit characteristics
Characteristics Conditions min typ max Unit
U
inh Inhibit input voltage to keep
U
o = on
U
i min...
U
i max 50 +0.8 V DC
regulator output voltage...
U
o = off
T
C min...
T
C max +2.4 +50
t
r Switch-on time after inhibit command
U
i =
U
i nom 5ms
t
f Switch-off time after inhibit command
R
L =
U
o nom /
I
o nom 10
I
i off Input current when inhibited
I
o = 0,
U
i =
U
i nom 10 mA
Fig. 10
Inhibit current I
inh
versus inhibit voltage U
inh
Fig. 9
Output response as a function of inhibit signal
Description of Options
Option i Inhibit
Note: With open i-input, output is enabled (
U
o = on).
Inhibit excludes R function!
The inhibit input allows the switching regulators to be disa-
bled via a control signal. In systems with several units, this
feature can be used, for example, to control the activation
sequence of the regulators by a logic signal (TTL, C-MOS,
etc.).
An output voltage overshoot will not occur when the units
are switched on or off.
1
0.1
0
0
U
o
/
U
o nom
U
inh
t
r
t
f
t
t
1
4
2
0-50 -40 20 40
-30 0
-20 -10 10 30 50
5
3
1
I
inh
[mA]
U
inh
[V]
U
o
on
U
o
off
U
inh
= 0.8 V
U
inh
= 2.4 V
Vi+
Gi– Go–
i
Vo+
I
inh
U
inh
Fig. 8
Definition of I
inh
and U
inh
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5.2
Option -9 Extended Temperature Range
The operational ambient temperature range is extended to
T
A = –40...71°C.
Option P Potentiometer
Option P and the R-function cannot be supported simulta-
neously. The output voltage
U
o can be adjusted with a
screwdriver in the range from 0.92...1.08 of the nominal out-
put voltage
U
o nom.
Ho wever, the minimum differential v oltage
U
io min betw een
input and output voltages as specified in "Electrical Input
and Output Data" should be maintained.
Option U Ambient Temp. Range acc. UL Recognition
Underwriters Laboratories (UL) have approved the PSL
family as recognized components up to an ambient tem-
perature of
T
A max – 10 K given by the upper temperature
limit of the standard PCB material. If the full maximum am-
bient temperature
T
A max is required with UL approval, op-
tion U should be requested. It consists of an alternative
PCB material with a higher maximum temperature specifi-
cation.
The European approval boards have in contrast to UL ac-
cepted the standard PCB material to be operated up to
T
A max = 71°C without any further precautions.
Option L Input filter
Option L is recommended to reduce superimposed inter-
ference voltages, and to prevent oscillations, if input lines
exceed approx. 5 m in total length. The fundamental w ave
(approx. 120 kHz) of the reduced interference voltage be-
tween Vi+ and Gi– has, with an input line inductance of
5µH a maximum magnitude of 4 mVrms.
The input impedance of the switching regulator at 120 kHz
is about 50 m. The harmonics are small in comparison
with the fundamental wave. See also data: RFI.
With option L, the maximum permissible additionally super-
imposed ripple
u
i of the input voltage (rectifier mode) at a
specified input frequency
f
i has the following values:
Input voltage up to 40 V:
u
i max = 12 Vpp at 100 Hz or Vpp = 1200 Hz/
f
i • 1V
Input voltage up to 80 V:
u
i max = 22 Vpp at 100 Hz or Vpp = 2200 Hz/
f
i • 1V
Option C Thyristor Crowbar
This option is recommended to protect the load against
power supply malfunction, but it is not designed to sink ex-
ternal currents.
A fixed-value monitoring circuit checks the output voltage
U
o. When the trigger voltage
U
oc is reached, the thyristor
crowbar tr iggers and disables the output. It may be deacti-
v ated b y removal of the input v oltage . In case of a s witching
transistor defect, an internal fuse prevents excessive cur-
rent.
Note: As a centr al overv oltage protection device, the crow-
bar is usually connected to the e xternal load via distributed
inductance of the lines. For this reason, the overvoltage at
the load can tempor arily e xceed the trigger voltage
U
oc
. De-
pending on the application, further decentralized over-
voltage protection elements may have to be used addition-
ally.
Table 10: Crowbar trigger levels
Characteristics Conditions 5.1 V 12 V 15 V 24 V 36 V Unit
min max min max min max min max min max
U
o c Trigger voltage
U
i min...
U
i max 5.8 6.8 13.5 16 16.5 19 27 31 40 45.5 V
I
o = 0...
I
o nom
t
sDelay time
T
C min...
T
C max 1.5 1.5 1.5 1.5 1.5 µs
Option D (“Save Data”, input undervoltage monitor)
Note: Output instead of input undervoltage monitor is
available on request (option D1).
If the input voltage
U
i is belo w the adjustable threshold v olt-
age
U
t, the control circuit for ter minal D has low impedance.
Terminal D and Go– are connected to a self-conducting
field effect tr ansistor (FET). A 0.5 W Zener diode provides
protection against overvoltages.
The voltage
U
t can be e xternally adjusted with a trim poten-
tiometer by means of a screwdriver. The hysteresis
U
H of
U
t is <2%. Terminal D stays low for a minimum time
t
low min, in order to prevent any oscillation.
U
t can be set to a
value between
U
i min and
U
i max according to fig. 10. It is im-
portant to note that the FET can become conductive again
when
U
D >
U
i – 3V.
Fig. 11
Test circuit with definition of voltage U
D
and current I
D
on
Terminal D.
Fig. 12
Definition of U
t
and U
H
U
D
U
D high
U
D low
U
t
U
i
U
H
Vi +
Gi – Go –
8.2 V
D
U
D
+5 V
100 pF
I
D
10 k
FET
U
t
PSL-Family Switching Regulators 19" Industrial Environment
5 - 46 Edition 2/96 - © Melcher AG
MELCHER
The Power Partners.
5.2
Application examples
a) The signal
U
D can be utilized in battery powered systems to provide a warning in case of low batteries.
b) In case of power failure, the signal can serve to initiate data save routines.
Option A Test sockets
Test sockets (pin Ø = 2 mm) for measuring the output volt-
age are located at the front panel of the module. The output
voltage is measured internally directly at the connector
pins.
Mechanical Data
Dimensions in mm. Tolerances ±0.3 mm unless otherwise indicated.
Fig. 13
Case L04 (weight 550 g)
Data
Table 11: Option D data
Characteristics Conditions PSL Unit
min typ max
U
D low Voltage - Terminal D at low impedance
U
i <
U
t,
I
D 2.5 mA 0.8 V
U
D high Voltage - Terminal D at high impedance
U
i >
U
t +
U
H,
I
D > 25 µA 4.75
t
low min Minimum duration
U
D low 30 ms
t
D f Response time to
U
D low 1µs
I
D max Maximum current - Terminal D 20 mA
127
159.4
168.5
±0.5
173.7
±0.5
100
(19.1) 6.4
11
Measuring point of 
case temperature
T
C
2
32
4.9
ø5.2
Test sockets (option A)
LED output voltage indicator
Potentiometer (option P)
Mounting plane of
connector H11
ø3
0.9
17.4 10.9
1.5
20.32
min. 5
Potentiometer (option D)
M3; 4 mm deep
(for mounting screws)
107
±1
88
99 9.5
36.5
±0.8
100
±0.5
9.1 x 4.1
35 26.6
34.3
40.6
M2.5
20
±0.5
4 TE
6 TE
2 TE
4 TE
European
Projection
Industrial Environment Switching Regulators 19" PSL-Family
Edition 2/96 - © Melcher AG 5 - 47
MELCHER
The Power Partners.
5.2
Type Key and Product Marking
Type Key PSL 12 8 -7 L i R P C D A
Positive switching regulator in case L04 ..................... PSL
Blank ..................................................................................
Nominal output voltage in volt (5A –> 5.1) ............. 5.1...36
Nominal output current in ampere............................. 8...12
Ambient temperature range
T
A = –25...71°C ...................................................-7
T
A = –40...71°C ...................................................-9
Input filter ......................................................................... L
Inhibit input........................................................................ i
External output voltage adjustment................................. R
Potentiometer...................................................................P
Thyristor-Crowbar ........................................................... C
"Save Data" undervoltage monitor .................................. D
Test sockets .....................................................................A
Example:PSL 128-7LiPC = A positive switching regulator with a 12 V, 8 A output, ambient temperature range of
–25…71°C, input filter, inhibit input, potentiometer and thyristor-crowbar.
Produkt Marking
Main face: Family designation, applicable safety approval and recognition marks, warnings, pin allocation, Melcher pat-
ent nos. and company logo.
Front plate: Identification of LED, optional test sockets and potentiometers.
Back plate: Specific type designation, input voltage range, nominal output voltage and current, pin allocation of options
and auxiliary functions and degree of protection.
Rear side: Label with batch no., serial no. and data code comprising production site, modification status of the main PCB
and production date.