General Description
The MAX17595–MAX17597 is a family of peak-current-
mode controllers for design of wide input-voltage flyback
and boost regulators. The MAX17595 offers optimized
input thresholds for universal input AC-DC converters
and telecom DC-DC (36V to 72V input range) power
supplies. The MAX17596/MAX17597 offer input thresholds
suitable for low-voltage DC-DC applications (4.5V to 36V).
The MAX17597 implements a boost converter. All three
controllers contain a built-in gate driver for external
n-channel MOSFETs.
The MAX17595–MAX17597 house an internal error amplifier
with 1% accurate reference, eliminating the need for an
external reference. The switching frequency is programma-
ble from 100kHz to 1MHz with an accuracy of 8%, allow-
ing optimization of magnetic and filter components, resulting
in compact and cost-effective power conversion. For
EMI-sensitive applications, the MAX17595–MAX17597
family incorporates a programmable frequency dithering
scheme, enabling low-EMI spread-spectrum operation.
Users can start the power supply precisely at the desired
input voltage, implement input overvoltage protection,
and program soft-start time. A programmable slope com-
pensation scheme is provided to ensuree stability of the
peak-current-mode control scheme.
Hiccup-mode overcurrent protection and thermal
shutdown are provided to minimize dissipation in
overcurrent and overtemperature fault conditions.
Applications
● Universal Input Ofine AC-DC Power Supplies
●Wide-Range DC-Input Flyback/Boost Battery Chargers
● Battery-Powered Applications
●Industrial and Telecom Applications
Benets and Features
● Programmable Switching Frequency Allows
Optimization of the Magnetic and Filter Components,
Resulting in Compact, Cost-Effective, Efficient
Isolated/Non-Isolated Power Supplies
• 100kHz to 1MHz Programmable Switching
Frequency with Optional Synchronization
• Peak Current Mode Control Provides Excellent
Transient Response
- Ofine (Universal Input AC) and Telecom (36V to
72V) Flyback Controller—MAX17595
- DC-DC (4.5V to 36V) Flyback Controller—
MAX17596
- Nonsynchronous (4.5V to 36V) Boost PWM
Controller—MAX17597
• 3mm x 3mm TQFN Package
● Programmable Frequency Dithering Enables Low-
EMI Spread-Spectrum Operation
● Integrated Protection Features Enhance System
Reliability
• Adjustable Current Limit with External Current-
Sense Resistor
• Fast Cycle-By-Cycle Peak Current Limiting
• Hiccup-Mode Short-Circuit Protection
• Overtemperature Protection
• Programmable Soft-Start and Slope Compensation
• Input Overvoltage Protection
Ordering Information/Selector Guide appears at end of
data sheet.
19-6178; Rev 5; 5/17
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
EVALUATION KIT AVAILABLE
VIN to SGND .........................................................-0.3V to +40V
VDRV to SGND ................................ -0.3V to +16V (MAX17595)
VDRV to SGND ........ -0.3V to +6V (MAX17596 and MAX17597)
NDRV to SGND ....................................-0.3V to +(VDRV + 0.3)V
EN/UVLO to SGND ................................. -0.3V to +(VIN + 0.3)V
OVI, RT, DITHER, COMP, SS, FB,
SLOPE to SGND ................................................... -0.3V to +6V
CS to SGND ............................................................-0.8V to +6V
PGND to SGND ....................................................-0.3V to +0.3V
Maximum Input/Output Current (Continuous)
VIN, VDRV ......................................................................... 100mA
NDRV (pulsed, for less than 100ns) .......................... 1.5A/-0.9A
Continuous Power Dissipation TQFN (single-layer board)
(derate 20.8mW/NC above +70NC) ............................1666mW
Operating Temperature Range ......................... -40NC to +125NC
Storage Temperature Range ............................ -65NC to +150NC
Junction Temperature ...................................................... +150NC
Lead Temperature (soldering, 10s) .................................+300NC
Soldering Temperature (reflow) ....................................... +260NC
(Note 1)
Junction-to-Ambient Thermal Resistance (qJA) ..............48°C/W Junction-to-Case Thermal Resistance (qJC) .....................7°C/W
Electrical Characteristics
(VIN = 12V (for the MAX17595, bring VIN up to 21V for startup), VCS = VSLOPE = VDITHER = VFB = VOVI = VSGND = VPGND = 0V,
VEN/UVLO = +2V; NDRV, SS, COMP are unconnected, RRT = 25kΩ, CVIN = 1µF, CVDRV = 1µF, TA = TJ = -40°C to +125°C, unless
otherwise noted. Typical values are at TA = TJ = +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
INPUT SUPPLY (VIN)
VIN Voltage Range VIN
MAX17595 8 29 V
MAX17596/MAX17597 4.5 36
VIN Bootstrap UVLO
Wakeup VIN-UVR VIN rising #MAX17595 18.5 20 21.5 V
MAX17596/MAX17597 3.8 4.1 4.4
VIN Bootstrap UVLO
Shutdown Level VIN-UVF VIN falling $MAX17595 6.5 7 7.5 V
MAX17596/MAX17597 3.6 3.9 4.2
VIN Supply Startup Current
(Under UVLO)
IVIN-
STARTUP VIN < UVLO 20 32 FA
VIN Supply Shutdown
Current IIN-SH VEN = 0V 20 32 FA
VIN Supply Current IIN-SW Switching, fSW = 400kHz 2 mA
VIN Clamp Voltage VINC MAX17595, IVIN = 2mA sinking, VEN = 0V (Note
3) 30 33 36 V
ENABLE (EN)
EN Undervoltage Threshold VENR VEN rising #1.16 1.21 1.26 V
VENF VEN falling $1.1 1.15 1.2
EN Input Leakage Current IEN VEN = 1.5V, TA = +25NC -100 +100 nA
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Package Thermal Characteristics
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
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Electrical Characteristics (continued)
(VIN = 12V (for the MAX17595, bring VIN up to 21V for startup), VCS = VSLOPE = VDITHER = VFB = VOVI = VSGND = VPGND = 0V,
VEN/UVLO = +2V; NDRV, SS, COMP are unconnected, RRT = 25kΩ, CVIN = 1µF, CVDRV = 1µF, TA = TJ = -40°C to +125°C, unless
otherwise noted. Typical values are at TA = TJ = +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
INTERNAL LDO (VDRV)
VDRV Output Voltage
Range VDRV
8V < VIN < 15V and 0mA < IVDRV < 50mA
(MAX17595) 7.1 7.4 7.7
V
6V < VIN < 15V and 0mA < IVDRV < 50mA
(MAX17596/MAX17597) 4.7 4.9 5.1
VDRV Current Limit IVDRV-MAX 70 100 mA
VDRV Dropout VVDRV-DO VIN = 4.5V, IVDRV = 20mA (MAX17596/
MAX17597) 4.2
V
OVERVOLTAGE PROTECTION (OVI)
OVI Overvoltage Threshold VOVIR VOVI rising #1.16 1.21 1.26 V
VOVIF VOVI falling $1.1 1.15 1.2
OVI Masking Delay tOVI-MD 2 Fs
OVI Input Leakage Current IOVI VOVI = 1V, TA = +25NC -100 +100 nA
OSCILLATOR (RT)
NDRV Switching Frequency
Range fSW 100 1000 kHz
NDRV Switching Frequency
Accuracy
-8 +8 %
Maximum Duty Cycle DMAX fSW = 400kHz (MAX17595/MAX17596) 46 48 50 %
(MAX17597) 90 92.5 95
SYNCHRONIZATION (DITHER/SYNC)
Synchronization Logic-High
Input VHI-SYNC 3 V
Synchronization Pulse
Width
50 ns
Synchronization Frequency
Range fSYNC (MAX17595/MAX17596) (Note 4) 1.1 x fSW 1.8 x fSW Hz
DITHERING RAMP GENERATOR (DITHER/SYNC)
Charging Current 45 50 55 FA
Discharging Current 43 50 57 FA
Ramp-High Trip Point 2 V
Ramp-Low Trip Point 0.4 V
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
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Electrical Characteristics (continued)
(VIN = 12V (for the MAX17595, bring VIN up to 21V for startup), VCS = VSLOPE = VDITHER = VFB = VOVI = VSGND = VPGND = 0V,
VEN/UVLO = +2V; NDRV, SS, COMP are unconnected, RRT = 25kΩ, CVIN = 1µF, CVDRV = 1µF, TA = TJ = -40°C to +125°C, unless
otherwise noted. Typical values are at TA = TJ = +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SOFT-START (SS)
Soft-Start Charging Current ISSCH 9 10 11 FA
SS Bias Voltage VSS 1.19 1.21 1.23 V
NDRV DRIVER (NDRV)
Pulldown Impedance RNDRV-N INDRV (sinking) = 100mA 1.37 3 I
Pullup Impedance RNDRV-P INDRV (sourcing) = 50mA 4.26 8.5 I
Peak Sink Current CNDRV = 10nF 1.5 A
Peak Source Current CNDRV = 10nF 0.9 A
Fall Time tNDRV-F CNDRV = 1nF 10 ns
Rise Time tNDRV-R CNDRV = 1nF 20 ns
CURRENT-LIMIT COMPARATOR (CS)
Cycle-by-Cycle Peak
Current-Limit Threshold VCS-PEAK 290 305 320 mV
Cycle-by-Cycle Runaway
Current-Limit Threshold VCS-RUN 340 360 380 mV
Current-Sense Leading-
Edge Blanking Time tCS-BLANK From NDRV rising # edge 70 ns
Propagation Delay from
Comparator Input to NDRV tPDCS
From CS rising (10mV overdrive) to
NDRV falling (excluding leading
edge blanking)
40 ns
Number of Consecutive
Peak- Current-Limit Events
to Hiccup
NHICCUP-P 8 events
Number of Runaway-
Current-Limit Events to
Hiccup
NHICCUP-R 1 event
Overcurrent Hiccup
Timeout
32,768 cycle
Minimum On-Time tON-MIN 90 130 170 ns
SLOPE COMPENSATION (SLOPE)
Slope Bias Current ISLOPE 9 10 11 FA
Slope Resistor Range 25 200 kI
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
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Note 2: All devices 100% production tested at TA = +25°C. Limits over temperature are guaranteed by design.
Note 3: The MAX17595 is intended for use in universal input power supplies. The internal clamp circuit at VIN is used to prevent
the bootstrap capacitor from charging to a voltage beyond the absolute maximum rating of the device when EN is low
(shutdown mode). Externally limit the maximum current to VIN (hence to clamp) to 2mA (max) when EN is low.
Note 4: Using an external clock for synchronization increases the maximum duty cycle by a factor equal to fSYNC / fSW for the
MAX17595/MAX17596. External synchronization is not available for the MAX17597.
Electrical Characteristics (continued)
(VIN = 12V (for the MAX17595, bring VIN up to 21V for startup), VCS = VSLOPE = VDITHER = VFB = VOVI = VSGND = VPGND = 0V,
VEN/UVLO = +2V; NDRV, SS, COMP are unconnected, RRT = 25kΩ, CVIN = 1µF, CVDRV = 1µF, TA = TJ = -40°C to +125°C, unless
otherwise noted. Typical values are at TA = TJ = +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Slope Voltage Range
for Default Slope
Compensation
4 V
Slope Voltage Range
for Programmable Slope
Compensation
0.2 2 V
Slope Compensation Ramp RSLOPE = 100kW140 165 190 mV/Fs
Default Slope
Compensation Ramp
4V < VSLOPE 50 mV/Fs
PWM COMPARATOR
Comparator Offset Voltage VPWM-OS VCOMP, when VCS = 0 1.65 1.81 2 V
Current-Sense Gain ACS-PWM DVCOMP/DVCS 1.75 1.97 2.15 V/V
Comparator Propagation
Delay tPWM Change in VCS = 10mV (including internal lead-
edge blanking)
110 ns
ERROR AMPLIFIER
FB Reference Voltage VREF VFB, when ICOMP = 0 and VCOMP = 1.8V 1.19 1.21 1.23 V
FB Input Bias Current IFB VFB = 1.5V, TA = +25NC -100 +100 nA
Voltage Gain AEAMP 90 dB
Transconductance Gm 1.5 1.8 2.1 mS
Transconductance
Bandwidth BW Open-loop (gain = 1), -3dB frequency 10 MHz
Source Current VCOMP = 1.8V, VFB = 1V 80 120 210 FA
Sink Current VCOMP = 1.8V, VFB = 1.75V 80 120 210 FA
THERMAL SHUTDOWN
Thermal-Shutdown
Threshold
Temperature rising +160 NC
Thermal-Shutdown
Hysteresis
20 NC
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
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(VIN = 15V, VEN/UVLO = +2V, COMP = open, CVIN = 1µF, CVDRV = 1µF, TA = TJ = -40°C to +125°C, unless otherwise noted.)
BOOTSTRAP UVLO WAKE-UP LEVEL
vs. TEMPERATURE (MAX17595)
MAX17595/6/7 toc01
TEMPERATURE (°C)
BOOTSTRAP UVLO WAKE-UP LEVEL (V)
20 40 60 80 1001200-20
19.99
20.00
20.01
20.02
20.03
20.04
19.98
-40
VIN FALLING THRESHOLD vs. TEMPERATURE
(MAX17596/MAX17597)
MAX17595/6/7 toc04
TEMPERATURE (°C)
VIN
UVLO SHUTDOWN THRESHOLD (V)
20 40 60 80 1001200-20
3.92
3.97
-40
3.88
3.89
3.90
3.91
EN/UVLO FALLING THRESHOLD
vs. TEMPERATURE
MAX17595/6/7 toc06
TEMPERATURE (°C)
EN /U
VLO FALLING THRESHOLD (V)
20 40 60 80 1001200-20
1.149
1.145
-40
1.146
1.147
1.148
EN/UVLO RISING THRESHOLD
vs. TEMPERATURE
MAX17595/6/7 toc05
TEMPERATURE (°C)
EN/U
VLO RISING THRESHOLD (V)
20 40 60 80 1001200-20
1.209
1.202
-40
1.203
1.204
1.205
1.206
1.207
1.208
OVI RISING THRESHOLD
vs. TEMPERATURE
MAX17595/6/7 toc07
TEMPERATURE (°C)
OVI RISING THRESHOLD (V)
20 40 60 80 1001200-20
1.211
1.207
-40
1.208
1.209
1.210
VIN WAKE-UP LEVEL vs. TEMPERATURE
(MAX17596/MAX17597)
MAX17595/6/7 toc02
TEMPERATURE (°C)
VIN WAKE-UP LEVEL (V)
20 40 60 80 1001200-20
4.13
4.07
-40
4.08
4.09
4.11
4.10
4.12
VIN FALLING THRESHOLD
vs. TEMPERATURE (MAX17595)
MAX17595/6/7 toc03
TEMPERATURE (°C)
VIN
BOOTSTRAP UVLO SHUTDOWN LEVEL (V)
20 40 60 80 1001200-20
7.000
7.005
7.010
7.015
7.020
7.025
6.995
-40
Typical Operating Characteristics
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
Maxim Integrated
│
6
www.maximintegrated.com
(VIN = 15V, VEN/UVLO = +2V, COMP = open, CVIN = 1µF, CVDRV = 1µF, TA = TJ = -40°C to +125°C, unless otherwise noted.)
OVI FALLING THRESHOLD
vs. TEMPERATURE
MAX17595/6/7 toc08
TEMPERATURE (°C)
OVI FALLING THRESHOLD (V)
20 40 60 80 1001200-20
1.1480
1.1485
1.1490
1.1495
1.1500
1.1505
1.1475
-40
NDRV SWITCHING FREQUENCY
vs. RESISTOR
MAX17595/6/7 toc11
FREQUENCY SELECTION RESISTOR (kI)
NDRV SWITCHING FREQUENCY (kHz
)
1000
0
5152535455565758595
100
200
300
400
600
700
800
900
500
FREQUENCY DITHERING vs. RDITHER
RDITHER (kΩ)
FREQUENCY DITHERING (%
)
900800700600500400300
4
6
8
10
12
14
2
20
01
000
MAX17595/6/7 toc13
NDRV SWITCHING FREQUENCY
vs. TEMPERATURE
MAX17595/6/7 toc12
TEMPERATURE (°C)
NDRV SWITCHING FREQUENCY (kHz
)
20 40 60 80 1001200-20
950
850
750
650
550
450
350
250
150
50
-40
RRT = 10kΩ
RRT = 100kΩ
SWITCHING WAVEFORMS (MAX17595)
MAX17595/6/7 toc14
IPRI
1A/div
4µs/div
VDRAIN
100V/div
VIN SUPPLY CURRENT UNDER UVLO
vs. TEMPERATURE
MAX17595/6/7 toc09
TEMPERATURE (°C)
VIN
SUPPLY CURRENT UNDER UVLO (µA)
20 40 60 80 1001200-20
20.5
21.5
22.5
23.5
24.5
25.5
19.5
-40
SWITCHING CURRENT
vs. TEMPERATURE
MAX17595/6/7 toc10
TEMPERATURE (°C)
SWITCHING CURRENT (mA)
20 40 60 80 1001200-20
2.5
1.5
-40
1.6
1.7
1.8
1.9
2.1
2.2
2.3
2.4
2.0
Typical Operating Characteristics (continued)
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
Maxim Integrated
│
7
www.maximintegrated.com
(VIN = 15V, VEN/UVLO = +2V, COMP = open, CVIN = 1µF, CVDRV = 1µF, TA = TJ = -40°C to +125°C, unless otherwise noted.)
ENABLE STARTUP
MAX17595/6/7 toc15
COMP
1V/div
2ms/div
VOUT
10V/div
EN/UVLO
5V/div
SWITCHING CURRENT
vs. SWITCHING FREQUENCY
SWITCHING FREQUENCY (Hz)
SWITCHING CURRENT (mA)
900800700500600400300200
1.7
1.9
2.1
2.3
2.5
1.5
10
01
000
MAX17595/6/7 toc18
BODE PLOT (FIGURE 9 OUTPUT)
MAX17595/6/7 toc20
PHASE
36°/div
GAIN
10dB/div
BANDWIDTH = 11.5kHz
PHASE MARGIN = 50.9°
6682 2
44181
LOAD TRANSIENT RESPONSE
(FIGURE 9 OUTPUT)
MAX17595/6/7 toc19
0.4ms/div
VOUT (AC)
0.5V/div
ILOAD
0.5A/div
LOAD CURRENT (A)
0 1.41.21.00.80.60.40.2
EFFICIENCY GRAPH
(FIGURE 9 OUTPUT)
EFFICIENCY (%)
10
20
30
40
60
70
80
90
100
0
50
MAX17595/6/7 toc21
VDC = 120V
ENABLE SHUTDOWN
MAX17595/6/7 toc16
COMP
1V/div
400µs/div
VOUT
10V/div
EN/UVLO
5V/div
HICCUP OPERATION
MAX17595/6/7 toc17
1ms/div
VOUT
10V/div
VDRAIN
100V/div
IPRI
2A/div
Typical Operating Characteristics (continued)
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
Maxim Integrated
│
8
www.maximintegrated.com
PIN NAME FUNCTION
1, 12 N.C. No Connection
2 SLOPE
Slope Compensation Input. A resistor, RSLOPE, connected from SLOPE to SGND programs the
amount of slope compensation with reference-voltage soft-start mode. Floating the SLOPE pin
enables reference voltage soft-start with default slope compensation of 50mV/µs.
3 RT Switching Frequency Programming Resistor Connection. Connect resistor RRT from RT to SGND to
set the PWM switching frequency.
4 DITHER/SYNC
Frequency Dithering Programming or Synchronization Connection. For spread-spectrum frequency
operation, connect a capacitor from DITHER to SGND, and a resistor from DITHER to RT. To
synchronize the internal oscillator to the externally applied frequency (MAX17595/MAX17596 only),
connect DITHER/SYNC to the synchronization pulse.
5 COMP Transconductance Amplifier Output. Connect the frequency compensation network between COMP
and SGND.
6 FB Transconductance Amplifier Inverting Input
7 SS Soft-Start Capacitor Pin for Flyback Regulator. Connect a capacitor CSS from SS to SGND to set the
soft-start time interval.
8 SGND Signal Ground. Connect SGND to the signal ground plane.
9 CS Current-Sense Input. Peak-current-limit trip voltage is 300mV (typ).
10 PGND Power Ground. Connect PGND to the power ground plane.
11 NDRV External Switching nMOS Gate-Driver Output
15
16
14
13
5
6
7
RT
DITHER/
SYNC
8
N.C.
PGND
CS
N.C.
13
VIN
4
12 10 9
EN/UVLO
OVI EP
SGND
SS
FB
COMP
SLOPE NDRV
2
11
VDRV
TQFN
MAX17595
MAX17596
TOP VIEW
+
15
16
14
13
5
6
7
RT
DITHER
8
N.C.
PGND
CS
N.C.
13
VIN
4
12 10 9
EN/UVLO
OVI EP
SGND
SS
FB
COMP
SLOPE NDRV
2
11
VDRV
TQFN
MAX17597
+
Pin Description
Pin Conguration
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
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Detailed Description
The MAX17595 offers a bootstrap UVLO wake-up level
of 20V with a wide hysteresis, and is optimized for imple-
menting isolated and nonisolated universal (85V to 265V
AC) offline single-switch flyback converter or telecom
(36V to 72V) power supplies. The MAX17596/MAX17597
offer a UVLO wake-up level of 4.4V and are well-suited
for low-voltage DC-DC flyback/boost power supplies. An
internal 1% reference (1.21V) can be used to regulate
the output in nonisolated flyback and boost applications.
Additional semiregulated outputs, if needed, can be gen-
erated by using additional secondary windings on the
flyback converter transformer.
The MAX17595/MAX17596/MAX17597 family utilizes
peak-current-mode control and external compensation
for optimizing closed-loop performance. The devices
include cycle-by-cycle peak current limit, and eight
consecutive occurrences of current-limit-event trigger hic-
cup mode, which protects external components by halting
switching for a period of 32,768 cycles. .
Input Voltage Range (VIN)
The MAX17595 has no limitation on maxi-
mum input voltage, as long as the external
components are rated suitably and the maximum
operating voltages of the MAX17595 are respected.
The MAX17595 implements a rising and falling UVLO
threshold that allows it to be successfully used in uni-
versal input (85V to 265V AC) rectified bus applications,
in rectified 3-phase DC bus applications, and in telecom
(36V to 72V DC) applications.
The MAX17596/MAX17597 are intended to implement
flyback (isolated and nonisolated) and boost convert-
ers. The VIN pin of the MAX17596/MAX17597 has a
maximum operating voltage of 36V. The MAX17596/
MAX17597 implement rising and falling thresholds on
the VIN pin that assume power-supply startup schemes
typical of low-voltage DC-DC applications, down to
an input voltage of 4.5V DC. Therefore, flyback/boost
converters with a 4.5V to 36V supply voltage range can
be implemented with the MAX17596/MAX17597.
Internal Linear Regulator (VDRV)
The internal functions and driver circuits are designed
to operate from 7.4V (MAX17595) or 5V (MAX17596/
MAX17597) power-supply voltages. The MAX17595/
MAX17596/MAX17597 family has an internal linear regu-
lator that is powered from the VIN pin. The output of the
linear regulator is connected to the VDRV pin, and should
be decoupled with a 1FF capacitor to ground for stable
operation. The VDRV regulator output supplies all the oper-
ating current of the MAX17595/MAX17596/MAX17597.
The maximum operating voltage on the VIN pin is 29V for
the MAX17595, and 36V for the MAX17596/MAX17597.
PIN NAME FUNCTION
13 VDRV Linear Regulator Output and Driver Input. Connect a 1µF bypass capacitor from VDRV to SGND as
close as possible to the IC.
14 VIN Internal VDRV Regulator Input. Connect VIN to the input voltage source. Bypass VIN to PGND with a
1FF minimum ceramic capacitor.
15 EN/UVLO Enable/Undervoltage Lockout. To externally program the UVLO threshold of the input supply,
connect a resistive divider between input supply, EN, and SGND.
16 OVI Overvoltage Comparator Input. Connect a resistive divider between the input supply, OVI, and
SGND to set the input overvoltage threshold.
— EP Exposed Pad. Connect to a large ground plane through multiple vias to maximize thermal
dissipation.
Pin Description (continued)
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
10
Figure 1. MAX17595/MAX17596/MAX17597 Block Diagram (*See Note 4.)
CONTROL
AND
DRIVER LOGIC
HICCUP
8 PEAK EVENTS
OR 1 RUNAWAY SSDONE
SS
SS
SSDONE
1.21V
CHIPPEN
DITHER/
SYNC
1.21V
1.21V
UVLO
VDRV
DITHER/SYNC
NDRV
PGND
CS
SLOPE
COMP
FB
VIN
EN/
UVLO
OVI
RT
SS
SGND
7.4V (MAX17595)
OR
5V (MAX17596/
MAX17597)
OSC
PEAKLIM
COMP
305mV
360mV
FIXED
OR VAR
10µA
10µA
±50µA
RUNAWAY
COMP
PWM COMP
OSC OSC
70ns
BLANKING
R
R
INTERNAL
REFERENCE
1.21V
1X
DRIVER
VDRV
2V/0.4V
PGND
SLOPE
DECODE
0.9V
5V
LDO
POK
MAX17595
MAX17596
MAX17597*
7.4V
LDO
THERMAL SENSOR
CHIPEN
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
11
n-Channel MOSFET Gate Driver (NDRV)
The devices offer a built-in gate driver for driving an exter-
nal n-channel MOSFET. The NDRV pin can source/sink
peak currents in excess of 900mA/1500mA.
Maximum Duty Cycle
The MAX17595/MAX17596 operate at a maximum duty
cycle of 49%. The MAX17597 offers a maximum duty
cycle of 94% to implement flyback and boost converters
involving large input-to-output voltage ratios in DC-DC
applications. Slope compensation is necessary for sta-
ble operation of peak-current-mode controlled convert-
ers such as the MAX17595/MAX17596/MAX17597, in
addition to the loop compensation required for small
signal stability. The MAX17595/MAX17596/MAX17597
implement a SLOPE pin for this purpose. See the Slope
Compensation section for more details.
Soft-Start (SS)
The devices implement soft-start operation for the flyback/
boost regulators. A capacitor connected to the SS pin pro-
grams the soft-start period. The soft-start feature reduces
input inrush current during startup. When the voltage on
the SLOPE pin is more than 0.2V, the reference to the
internal error amplifier is ramped up from 0V to 1.21V in a
linear manner, as programmed by the soft-start capacitor.
See the Programming Soft-Start (SS) section.
Switching Frequency Selection (RT)
The ICs’ switching frequency is programmable between
100kHz and 1MHz with resistor RRT connected between
RT and SGND. Use the following formula to determine the
appropriate value of RRT needed to generate the desired
output-switching frequency (fSW):
=
10
RT SW
10
Rf
where fSW is the desired switching frequency.
Frequency Dithering for
Spread-Spectrum Applications (Low EMI)
The switching frequency of the converter can be
dithered in a range of Q10% by connecting a capaci-
tor from DITHER/SYNC to SGND, and a resistor from
DITHER to RT. Spread-spectrum modulation technique
spreads the energy of switching frequency and its har-
monics over a wider band while reducing their peaks,
helping to meet stringent EMI goals.
Applications Information
Startup Voltage and Input Overvoltage
Protection Setting (EN/UVLO, OVI)
The devices’ EN/UVLO pin serves as an enable/disable
input, as well as an accurate programmable input UVLO
pin. The devices do not commence startup operation
unless the EN/UVLO pin voltage exceeds 1.21V (typ).
The devices turn off if the EN/UVLO pin voltage falls
below 1.15V (typ). A resistor-divider from the input DC
bus to ground can be used to divide down and apply a
fraction of the input DC voltage (VDC) to the EN/UVLO
pin. The values of the resistor-divider can be selected so
the EN/UVLO pin voltage exceeds the 1.23V (typ) turn-
on threshold at the desired input DC bus voltage. The
same resistor-divider can be modified with an additional
resistor (ROVI) to implement input overvoltage protec-
tion in addition to the EN/UVLO functionality as shown
in Figure 2. When voltage at the OVI pin exceeds
1.21V (typ), the devices stop switching and resume
switching opera tions only if voltage at the OVI pin falls
below 1.15V (typ). For given values of startup DC input
voltage (VSTART) and input overvoltage-protection
voltage (VOVI), the resistor values for the divider can
be calculated as fol lows, assuming a 24.9kI resistor
for ROVI:
OVI
EN OVI START
V
R R 1k
V

=×−


I
where ROVI is in kI, while VSTART and VOVI are in volts.
START
SUM OVI EN
V
R R R 1k
1.21

= +× −




I
where REN and ROVI are in kI, while VSTART is in volts.
In universal AC input applications, RSUM may need to be
implemented as equal resistors in series (RDC1, RDC2,
and RDC) so that voltage across each resistor is limited
to its maximum operation voltage.
= = = SUM
DC1 DC2 DC3
R
RR R k
3I
For low-voltage DC-DC applications based on the
MAX17596/MAX17597, a single resistor can be used in
the place of RSUM, as the voltage across it is approxi-
mately 40V.
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
12
Figure 2. Programming EN/UVLO and OVI
Startup Operation
The MAX17595 is optimized for implementing an offline
single-switch flyback converter and has a 20V VIN UVLO
wake-up level with hysteresis of 15V (min). In offline
applications, a simple cost-effective RC startup circuit is
used. When the input DC voltage is applied, the startup
resistor (RSTART) charges the startup capacitor (CSTART),
causing the voltage at the VIN pin to increase towards the
wake-up VIN UVLO threshold (20V typ). During this time,
the MAX17595 draws a low startup current of 20FA (typ)
through RSTART. When the voltage at VIN reaches the
wake-up VIN UVLO threshold, the MAX17595 commenc-
es switching and control operations. In this condition, the
MAX17595 draws 2mA (typ) current from CSTART for its
internal operation. In addition, the gate-drive current is
also drawn from CSTART, which is a function of the gate
charge of the external MOSFET used and switching fre-
quency. Since this total current cannot be supported by
the current through RSTART, the voltage on CSTART
starts to drop. When suitably configured, as shown
in Figure 3, the external MOSFET is switched by the
NDRV pin and the flyback converter generates pulses
on bias winding NB. The soft-start period of the con-
verter should be programmed so the bias winding pulses
sustain the voltage on CSTART before it falls below 7V,
thus allowing continued operation. The large hysteresis
of the MAX17595 allows for a small startup capacitor
(CSTART). The low startup current (20FA typ) allows
the use of a large startup resistor (RSTART), thus
reducing power dissipation at higher DC bus voltages.
RSTART might need to be implemented as equal, multiple
resistors in series (RIN1, RIN2, and RIN3) to share
the applied high DC voltage in offline applications so
that the voltage across each resistor is limited to its
maximum continuous operating voltage rating. RSTART
and CSTART can be calculated as:
+× ×


= µ
××

+×


VDRV IN SS
START SS G SW
6
C I t 0.1
C 0.75 F
t Qf
0.04
10
where IIN is the supply current drawn at the VIN pin in mA,
QG is the gate charge of the external MOSFET used in
nC, fSW is the switching frequency of the converter in Hz,
and tSS is the soft-start time programmed for the flyback
converter in ms. CVDRV is a cummulative capacitor used
in VDRV node in μF. See the Programming Soft-Start of
Flyback/Boost Converter (SS) section.
( )
START
START START
V 10 50
Rk
1C
−×
=+


I
where CSTART is the startup capacitor in FF.
For designs that cannot accept power dissipation in the
startup resistors at high DC input voltages in offline appli-
cations, the startup circuit can be set up with a current
source instead of a startup resistor as shown in Figure 4.
The startup capacitor (CSTART) can be calculated using
the above equation:
Resistors RSUM and RISRC can be calculated as:
START
SUM
BEQ1
ISRC
V
RM
10
V
RM
70
= W
= W
The VIN UVLO wake-up threshold of the MAX17596/
MAX17597 is set to 4.1V (typ) with a 200mV hyster esis,
optimized for low-voltage DC-DC applications down to
4.5V. For applications where the input DC voltage is low
enough (e.g., 4.5V to 5.5V DC) that the power loss
incurred to supply the operating current of the MAX17596/
MAX17597 can be tolerated, the VIN pin is directly
connected to the DC input, as shown in Figure 5. In the
case of higher DC input voltages (e.g., 16V to 32V DC), a
startup circuit, such as that shown in Figure 6, can be
used to minimize power dissipation. In this startup
OVI
RDC1
RSUM RDC2
RDC3
EN/UVLO
REN
ROVI
MAX17595
MAX17596
MAX17597
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
13
scheme, the transistor (Q1) supplies the switching current
until a bias winding NB comes up and turns off Q1. The
resistor (RZ) can be calculated as:
−=×W
Z INMIN
R 2 (V 6.3) k
Programming Soft-Start (SS)
The soft-start period for the devices can be programmed
by selecting the value of the capacitor CSS connected
from the SS pin to SGND. Capacitor CSS can be calcu-
lated as:
SS SS
C 8.2645 t nF= ×
where tSS is expressed in ms. This equation is directly
applicable to the boost converter application circuit of
Figure 11. For optoisolated converters, the soft-start
period is approximately equal to 30% of tSS when the
Figure 3. MAX17595 RC-Based Startup Circuit
Figure 4. MAX17595 Current-Source-Based Startup Circuit
VDRV
VDC
COUT
VIN
VOUT
CVDRV
CSTART
LDO DRV CS
NDRV
D1
D2
NS
NP
NB
MAX17595
VDC
RIN1
RSTART RIN2
RIN3
RIN1
VDC
RSUM RIN2
VDRV
VDC
COUT
D1
VIN
RISRC
VOUT
CVDRV
RS
CSTART
RIN3
LDO DRV CS
NDRV
D2
NS
NP
NB
MAX17595
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
14
error amplifier is set up as a proportional gain amplifier as
shown in Figure 9.
Programming Output Voltage
The devices incorporate an error amplifier with a 1% pre-
cision voltage reference that enables negative feedback
control of the output voltage. The output voltage of the
switching converter can be programmed by selecting the
values for the resistor-divider connected from VOUT, and
the flyback/boost output to ground, with the midpoint of
the divider connected to the FB pin (Figure 7). With RB
selected in the 20kI to 50kI range, RU can be calculated
as:
OUT
UB B
V
R R 1 k , whereR is in k .
1.21

=×−


II
Peak-Current-Limit Setting (CS)
The devices include a robust overcurrent protection scheme
that protects the device under overload and short-circuit
conditions. A current-sense resistor, connected between
the source of the MOSFET and PGND, sets the peak
current limit. The current-limit comparator has a voltage
Figure 6. MAX17596/MAX17597 Typical Startup Circuit with Bias Winding to Turn Off Q1 and Reduce Power Dissipation
Figure 5. MAX17596/MAX17597 Typical Startup Circuit with VIN Connected Directly to DC Input
VDRV
VDC
COUT
CDRV
Np Ns
D1
VIN
VIN
VOUT
RS
CS
NDRV
LDO
MAX17596
MAX17597
DRV
VDRV
VDC
COUT
CDRV
Np
NB
Ns
D1
VIN
VIN
RZ
ZD1
6.3V
CIN
RS
CS
NDRV
MAX17596
MAX17597
LDO
Q1
DRV
D2
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
15
trip level (VCS-PEAK) of 300mV. Use the following equa-
tion to calculate the value of RCS:
CS MOSFET
300mV
RI
=I
where IMOSFET is the peak current flowing through the
MOSFET.
The devices implement 65ns of leading-edge blanking to
ignore leading-edge current spikes. Use a small RC network
for additional filtering of the leading edge spike on the sense
waveform when needed. Set the corner frequency between
10MHz and 20MHz. After the leading-edge blanking time,
the device monitors VCS. The switching cycle is termi-
nated within 30ns from VCS exceeding 300mV.
The devices offer a runaway current limit scheme that
protects the devices under high-input-voltage short-
circuit conditions when there is insufficient output volt-
age available to restore inductor current built up during
the on period of the flyback/boost converter. Either eight
consecutive occurrences of the peak-current-limit event
or one occurrence of the runaway current limit trigger
a hiccup mode that protects the converter by immedi-
ately suspending switching for a period of time (tRSTART).
This allows the overload current to decay due to power
loss in the converter resistances, load, and the output
diode of the flyback/boost converter before soft-start
is attempted again. The runaway current limit is set at
a VCS-PEAK of 360mV (typ). The peak-current-limit-
triggered hiccup operation is disabled until the end of
the soft-start period, while the runaway current-limit-
triggered hiccup operation is always enabled.
Programming Slope
Compensation (SLOPE)
The MAX17595/MAX17596 operate at a maximum duty
cycle of 49%. In theory, they do not require slope
compensation to prevent subharmonic instability that
occurs naturally in continuous-conduction mode (CCM)
peak-current-mode-controlled converters operating at
duty cycles greater than 50%. In practice, the MAX17595/
MAX17596 require a minimum amount of slope compen-
sation to provide stable operation. The devices allow the
user to program this default value of slope compensa-
tion simply by leaving the SLOPE pin unconnected. It is
recommended that discontinuous-mode designs also use
this minimum amount of slope compensation to provide
better noise immunity and jitter-free operation.
The MAX17597 flyback/boost converter can be
designed to operate in either discontinuous-conduction
mode (DCM) or to enter into continuous-conduction
mode at a specific load condition for a given DC input
voltage. In continuous-conduction mode, the flyback/
boost converter needs slope compensation to avoid
subharmonic instability that occurs naturally over all
specified load and line conditions in peak-current-mode-
controlled converters operating at duty cycles greater
than 50%. A minimum amount of slope signal is added to
the sensed current signal even for converters operating
below 50% duty to provide stable, jitter-free operation.
The SLOPE pin allows the user to program the necessary
slope compensation by setting the value of the resistor
(RSLOPE) connected from the SLOPE pin to ground.
E
SLOPE
S8
Rk
1.55
−
=I
where the slope (SE) is expressed in mV/Fs.
Frequency Dithering for
Spread-Spectrum Applications (Low EMI)
The switching frequency of the converter can be dithered in
a range of Q10% by connecting a capacitor from DITHER/
SYNC to SGND, and a resistor from DITHER to RT as
shown in the Typical Operating Circuits. This results in
lower EMI.
A current source at DITHER/SYNC charges capacitor
CDITHER to 2V at 50FA. Upon reaching this trip point, it
discharges CDITHER to 0.4V at 50FA. The charging and
discharging of the capacitor generates a triangular wave-
form on DITHER/SYNC with peak levels at 0.4V and 2V
and a frequency that is equal to:
=×
TRI DITHER
50 A
fC 3.2V
F
Figure 7. Programming Output Voltage
FB
RU
RB
VOUT
MAX17595
MAX17596
MAX17597
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
16
typically, fTRI should be set close to 1kHz. Resistor
RDITHER connected from DITHER/SYNC to RT deter-
mines the amount of dither as follows:
RT
DITHER
R
%DITHER R
=
where %DITHER is the amount of dither expressed as a
percentage of the switching frequency. Setting RDITHER
to 10 x RRT generates Q10% dither.
Synchronization (SYNC)
The internal oscillator can be synchronized to an external
clock by applying the clock to the DITHER/SYNC pin
directly. The external clock frequency can be set any-
where between 1.1x and 1.8x times the programmable
switching frequency for the MAX17595/MAX17596. The
synchronization feature is not available in the MAX17597.
An external clock increases the maximum duty cycle by a
factor of (fSYNC / fSW).
Error Amplier and Loop Compensation
The MAX17595/MAX17596/MAX17597 include an inter-
nal transconductance error amplifier. The noninverting
input of the error amplifier is internally connected to the
internal reference and the inverting input is brought out
at the FB pin to apply the feedback signal. The internal
reference is linearly ramped up from 0V to 1.21V (typ)
when the device is enabled at turn-on. After soft-start, the
internal reference is connected to the bandgap.
In isolated applications, where an optocoupler is used to
transmit the control signal from the secondary side, the
emitter current of the optocoupler flows through a resistor
to ground to set up the feedback voltage. A shunt regulator
is usually employed as a secondary-side error amplifier to
drive the optocoupler photodiode to couple the control sig-
nal to the primary. The loop compensation is applied in the
secondary side as an R-C network on the shunt regulator.
The MAX17595/MAX17596/MAX17597 error amp can be
set up as a proportional gain amplifier, or used to imple-
ment additional poles or zeros. The Typical Application
Circuits for the MAX17595/MAX17596 use the internal
error amplifier as a proportional gain amplifier.
In nonisolated applications, the output voltage is divided
down with a voltage-divider to ground and is applied to the
FB pin. Loop compensation is applied at the COMP pin
as an R-C network from COMP to GND that implements
the required poles and zeros, as shown in Figure 8. The
boost converter application circuit of Figure 11 for the
MAX17597 uses this approach.
Layout, Grounding and Bypassing
All connections carrying pulsed currents must be very
short and as wide as possible. The inductance of these
connections must be kept to an absolute minimum due to
the high di/dt of the currents in high-frequency-switching
power converters. This implies that the loop areas for
forward and return pulsed currents in various parts of the
circuit should be minimized. Additionally, small current
loop areas reduce radiated EMI. Similarly, the heatsink
of the MOSFET presents a dV/dt source; therefore,
the surface area of the MOSFET heatsink should be
minimized as much as possible.
Ground planes must be kept as intact as possible. The
ground plane for the power section of the converter
should be kept separate from the analog ground plane,
except for a connection at the least noisy section of the
power ground plane, typically the return of the input filter
capacitor. The negative terminal of the filter capacitor, the
ground return of the power switch and current-sensing
resistor, must be close together. PCB layout also affects
the thermal performance of the design. A number of
thermal vias that connect to a large ground plane should
be provided under the exposed pad of the part for
efficient heat dissipation. For a sample layout that ensures
first-pass success, refer to the MAX17595 evaluation kit
layout available at www.maximintegrated.com. For univer-
sal AC input designs, follow all applicable safety regula-
tions. Offline power supplies can require UL, VDE, and
other similar agency approvals.
Figure 8. Error-Amplifier Compensation Network
COMP
RZ
CZ
CP
MAX17595
MAX17596
MAX17597
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
17
Figure 9. MAX17595 Typical Application Circuit (Universal Offline Isolated Power Supply)
N1
VIN
1
2
R26
4.99kΩ
R28
2.49kΩ
R29
221Ω
R22
470Ω
C8
1µF
C11
1000pF
R21
0.2Ω
R20
100Ω
VFB
VDRV
IN
VOUT
C17
68nF
SGND
U3
EP
SGND
SGND
SGND
SGND
MAX17595
SGND PGND
C21
470nF
R4
549kΩ
R3
549kΩ
R2
549kΩ
R1
10Ω
AC1
AC2
C1
0.1µF/
275V AC
R5
19.8kΩ
R6
4.99kΩ
R12
49.9kΩ
VFB
VIN
COMP
SGND
DITHER/
SYNC
R14
402kΩ
R15
402kΩ
R16
402kΩ
C7
100nF
C5
100µF
450V
C9
4.7µF
50V
C10
3300pF
R18
100kΩ
L1
6.8mH
D1
C6
0.47µF
R19
10Ω
PGND
PGND
PGND
VIN
IN VOUT
VOUT
GND0
T1
D2
D3
D4
C13
22µF
C14
22µF
C15
22µF
C16
22µF
R9
82.5kΩ RT
SLOPE
NDRV
PGND
PGND
SGND
CS
VDRV
VDRV
SS
FB
EN/UVLO
OVI
C4
56pF
R13
22kΩ
15V, 1.5
A
SGND
Typical Operating Circuits
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
18
Figure 10. MAX17596 Typical Application Circuit (Power Supply for DC-DC Applications)
N1
R8
100Ω
R9
50mΩ
R14
8.6kΩ
R16
16.5kΩ
R15
8.6kΩ
R12
10kΩ
R17
470Ω
R13
470Ω
C14
0.1µF
VFB
VDRV
VOUT
C6
300pF
C15
22nF
C17
500nF
GND0
C16
56pF
U2
U3
NDRV
EP
VIN
SS
SLOPE
FB
COMP
PGND
C5
100nF
C3
0.22µF
C2
4.7µF
50V
C1
47µF
63V
PGND
VIN VOUT
GND0
24V, 1.5A
OUTPUT
18V TO 36V
R7
10kΩ
R6
20kΩ
R5
348kΩ
R4
49.9kΩ
R3
22kΩ
R1
750Ω
C4
0.1µF, 50V
C9
10µF
50V
C11
10µF
50V
C12
10µF
50V
D1
VFB
EN / UVLO
OVI
VIN
VIN
R10
28.5kΩ
RT
SGND
CS
DITHER/
SYNC
MAX17596
U1
C10
10µF
50V
C13
10µF
50V
PGNDSGND
SGND
C7
1µF
VDRV
VDRV
C8
100nF
D2
T1
VOUT
Typical Operating Circuits (continued)
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
19
Figure 11. MAX17597 Typical Application Circuit (Nonsynchronous Boost Converter)
EP
VIN
L1
6.8µH
C9
4.7µF/
50V
N1
R8
100Ω
R4
1.96kΩ
R3
187kΩ
R2
9.92kΩ
R1
32.4kΩ
R10
21kΩ
R7
18kΩ
R6
18kΩ
R5
187kΩ
R9
65mΩ
C8
300pF
VOUT
24V, 1A
VOUT
D1
NDRV
CS
RT
DITHER
SGND
SGND PGND
OVI
EN / UVLO
PGND
COMP
FB
SLOPE
VDRV
VIN
SS
C6
330pF
C5
33nF
C4
1µF
C3
47nF
PGND
8V TO
14V DC
VIN
VIN
C7
10µF
C1
22µF
VIN
MAX17597
C2
1µF
C10
4.7µF/
50V
C11
4.7µF/
50V
C12
10nF
Typical Operating Circuits (continued)
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
20
+Denotes a lead(Pb)-free/RoHS-compliant package.
*Exposed pad.
PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.
16 TQFN T1633+4 21-0136 90-0032
PART TEMP
RANGE
PIN
PACKAGE FUNCTIONALITY UVLO, VIN
CLAMP DMAX
MAX17595ATE+ -40NC to +125NC16 TQFN-EP* Ofine Flyback Controller 20V, Yes 46%
MAX17596ATE+ -40NC to +125NC16 TQFN-EP* Low-Voltage DC-DC Flyback Controller 4V, No 46%
MAX17597ATE+ -40NC to +125NC16 TQFN-EP* Boost Controller 4V, No 93%
Package Information
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Ordering Information/Selector Guide
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
www.maximintegrated.com Maxim Integrated
│
21
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 1/12 Initial release —
1 2/13
Updated General Description, Electrical Characteristics tables, Typical Operating
Characteristics; Detailed Description, Figures 1, 3–6; Typical Operating Circuits,
deleted sections relating to soft-stop, yback, and boost.
1–22
2 6/13 Updated Pin Description for EP and Figure 10 10, 19
3 11/14 Deleted automotive reference in Applications section 1
4 5/15 Updated Benets and Features section 1
5 5/17 Added reference to App Note and modied pin description 1, 9,
Revision History
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
MAX17595/MAX17596/
MAX17597
Peak-Current-Mode Controllers
for Flyback and Boost Regulators
© 2017 Maxim Integrated Products, Inc.
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22
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