○ Product structure：Silicon monolithic integrated circuit ○This product has no designed protect i on against radioact i ve rays
. 1/36
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
14
・
001
www.rohm.com
Serial EEPROM Series Standard EEPROM
I2C BUS EEPROM (2-Wire)
BR24Gxxx-3A (128K 256K 1M)
General Description
BR24Gxxx-3A is a serial EEPROM of I2C BUS Interface Method
Features
All controls available by 2 ports of serial clock(SCL) and
serial data(SDA)
Other devices than EEPROM can be connected to the
same port, saving microcontroller port
1.7V to 5.5V Single Power Source Operation most
suitable for battery use
1.7V to 5.5V wide limit of operating voltage, possible
1MHz operation
Page Write Mode useful for initial value write at factory
shipment
Self-timed Prog ramming Cycle
Low Current Consumption
Prevention of Write Mistake
Write (Write Protect) Function added
Prevention of Write Mistake at Low Voltage
More than 1 million write cycles
More than 40 years data retention
Noise filter built in SCL / SDA terminal
Initial delivery state FFh
Page Write
Number of Pages 64Byte 256Byte
Product Number BR24G128-3A
BR24G256-3A
BR24G1M-3A
BR24G128-3A
Capacity Bit Format Type
Power Source
Voltage
Package
128kbit 16k×8
BR24G128-3A
1.7V to 5.5V
DIP-T8
BR24G128F-3A SOP8
BR24G128FJ-3A SOP-J8
BR24G128FV-3A SSOP-B8
BR24G128FVT-3A TSSOP-B8
BR24G128FVJ-3A TSSOP-B8J
BR24G128FVM-3A MSOP8
BR24G128NUX-3A VSON008X2030
Packages W(Typ) x D(Typ)x H(Max)
Figure 1.
MSOP8
2.90mm x 4.00mm x 0.90mm
SOP-J8
4.90mm x 6.00mm x 1.65mm
SOP8
5.00mm x 6.20mm x 1.71mm
DIP-T8
9.30mm x 6.50mm x 7.10mm
SSOP-B8
3.00mm x 6.40mm x 1.35mm
TSSOP-B8
3.00mm x 6.40mm x 1.20mm
TSSOP-B8J
3.00mm x 4.90mm x 1.10mm
VSON008X2030
2.00mm x 3.00mm x 0.60mm
Datashee
t
. 2/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
BR24G256-3A
Capacity Bit Format Type
Power Source
Voltage
Package
256kbit 32k×8
BR24G256-3A
1.7V to 5.5V
DIP-T8
BR24G256F-3A SOP8
BR24G256FJ-3A SOP-J8
BR24G256FV-3A SSOP-B8
BR24G256FVT-3A TSSOP-B8
BR24G1M-3A
Capacity Bit Format Type
Power Source
Voltage
Package
1Mbit 128k×8
BR24G1M-3A
1.7V to 5.5V
DIP-T8
BR24G1MF-3A SOP8
BR24G1MFJ-3A SOP-J8
. 3/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Absolute Maximum Ratings (Ta=25°C)
Parameter Symbol
Rating Unit Remark
Supply Voltage Vcc -0.3 to +6.5 V
Power Dissipation Pd
0.45 (SOP8)
W
Derate b y 4.5mW/°C when oper ati n g above Ta=25°C
0.45 (SOP-J8) Derate b y 4.5mW/ °C when oper ati n g above Ta=25°C
0.30 (SSOP-B8) Derate b y 3.0mW/°C when oper ati n g above Ta=25°C
0.33 (TSSOP-B8) Derate b y 3.3mW/°C when oper ati n g above Ta=25°C
0.31 (TSSOP-B8J) Derate b y 3.1mW/°C when oper ati n g above Ta=25°C
0.31 (MSOP8) Derate by 3.1mW/°C when oper ati n g above Ta=25°C
0.30 (VSON 008X 2030) Derate by 3.0mW/°C when operatin g above Ta=25°C
0.80 (DIP-T8) Derate by 8.0mW/°C when operatin g above Ta=25°C
Storage Temperature Tstg -65 to +150 °C
Operating Tem per a ture Topr -40 to +85 °C
Input Voltage /
Output Voltage ‐ -0.3 to Vcc+1.0 V
The Max value of Input Voltage/Output Voltage is not over 6.5V.
When the pulse width is 50ns or less, the Min value Input
Voltage/Output Voltage is not lower than -1.0V.
Junction
Temperature
Tjmax 150 °C Junction temperature at the storage condition
Electrostatic discharge
voltage
(human body m odel)
VESD -4000 to +4000 V
Memory Cell Characteristics (Ta=25°C, Vcc=1.7V to 5.5V)
Parameter
Limit
Unit
Min
Typ
Max
Write Cycles (1)
1,000,000
-
-
Times
Data Retention (1)
40
-
-
Years
(1) Not 100% TESTED
Recommended Operating Ratings
Parameter
Symbol
Rating
Unit
Power Source Voltage
Vcc
1.7 to 5.5
V
Input Voltage
V
IN
0 to Vcc
DC Characteristics (Unless otherwise specified, Ta=-40°C to +85°C, Vcc =1.7V to 5.5V)
Parameter Symbol
Limit
Unit Conditions
Min Typ Max
Input High Voltage 1
V
IH1
0.7Vcc
-
Vcc+1.0
V
Input Low Voltage 1
V
IL1
-0.3(2)
-
+0.3Vcc
V
Output Low Voltage 1 VOL1 - - 0.4 V
I
OL
=3.0mA,
2.5V
≦
Vcc
≦
5.5V (SDA)
Output Low Voltage 2 VOL2 - - 0.2 V
I
OL
=0.7mA,
1.7V
≦
Vcc
＜
2.5V (SDA)
Input Leakage Current
I
LI
-1
-
+1
μA
V
IN
=0 to Vcc
Output Leakage Current ILO -1 - +1 μA VOUT=0 to Vcc (SDA)
Supply Current (Write) ICC1
- - 2.5
mA
V
CC
=5.5V, f
SCL
=1MHz, t
WR
=5ms,
Byte write, Page write
BR24G128/256-3A
- - 4.5
V
CC
=5.5V, f
SCL
=1MHz, t
WR
=5ms,
Byte write, Page write
BR24G1M-3A
Supply Current (Read) ICC2 - - 2.0 mA
V
CC
=5.5V, f
SCL
=1MHz
Random read, current read,
sequential read
Standby Current ISB
- - 2.0
μA
V
CC
=5.5V, SDA
・
SCL=Vcc
A0, A1, A2=GND, WP=GND
BR24G128/256-3A
- - 3.0
V
CC
=5.5V, SDA
・
SCL=Vcc
A0, A1, A 2=GND, WP=GND
BR24G1M-3A
(2) When the pulse width is 50ns or less, it is -1.0V.
. 4/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
AC Characteristics
(Unless otherwise specified, Ta=-40°C to +85°C, Vcc=1.7V to 5.5V)
Parameter Symbol Limit Unit
Min Typ Max
Clock Frequency fSCL - - 1000 kHz
Data Clock “HIGH“ Period tHIGH 0.30 - - µs
Data Clock “LOW“ Period tLOW 0.5 - - µs
SDA, SCL (INPUT) Rise Ti me (1) tR - - 0.12 µs
SDA, SCL (INPUT) Fall Ti me (1) tF1 - - 0.12 µs
SDA (OUTPUT) Fall Time (1) tF2 - - 0.12 µs
Start Condition Hold Time tHD:STA 0.25 - - µs
Start Condition Setup Time tSU:STA 0.20 - - µs
Input Data Hold Time tHD:DAT 0 - - ns
Input Data Setup Time tSU:DAT 50 - - ns
Output Data Delay Time tPD 0.05 - 0.45 µs
Output Data Dold Time tDH 0.05 - - µs
Stop Condition Setup Time tSU:STO 0.25 - - µs
Bus Free Time tBUF 0.5 - - µs
Write Cycle Time tWR - - 5 ms
Noise S pike Width (SDA, SCL) tI - - 0.05 µs
WP Hold Time tHD:WP 1.0 - - µs
WP Setup Time tSU:WP 0.1 - - µs
WP High Period tHIGH:WP 1.0 - - µs
(1) Not 100% tested
AC Characteristics Condition
Parameter Symbol Conditions Unit
Load Capacitance CL 100 pF
SDA, SCL (INPUT) Rise Time tR 20 ns
SDA, SCL (INPUT) Fall Time
t
F1
20
ns
Input Data Level VIL1/VIH1 0.2VCC/0.8Vcc V
Input/Output Data Timing Reference Level - 0.3VCC/0.7Vcc V
. 5/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Serial Input / Output Timing
Figure 2-(e). WP Timing at Write Cancel
Figure 2-(d). WP Timing at Write Execution
Figure 2-(c). Write Cycle Timing
Figure 2-(b). Start-Stop Bit Timing
Figure 2-(a). Serial Input / Output Timing
○
Input read at the rise edge of SCL
○Data output in sync with the fall of SCL
SCL
SDA
(入力)
SDA
(出力)
tR
tF1
tHIGH
tSU:DAT
tLOW
tHD:DAT
tDH
tPD
tBUF
tHD:STA
70%
30%
70%
70%
30%
70%
70%
30%
30%
70%
70%
30%
70%
70%
70%
70%
30%
30%
30%
30%
tF2
70%
70%
tSU:STA
tHD:STA
START CONDITION
tSU:STO
STOP CONDITION
30%
30%
70%
70%
D0
ACK
tWR
write data
(n-th address)
START CONDITION
STOP CONDITION
70%
70%
DATA(1)
D0
ACK
D1
DATA(n)
ACK
tWR
30%
70%
STOP CONDITION
tHD:WP
tSU:WP
30%
70%
DATA(1)
D0
D1 ACK
DATA(n)
ACK
tHIGH:WP
70%
70%
tWR
70%
(INPUT)
(OUTPUT)
. 6/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Block Diagram
Figure 3 . Block Diagram
Pin Configuration (TOP VIEW)
Pin Descriptions
Terminal
Name Input/
Output
Descriptions
BR24G128/256-3A BR24G1M-3A
A0 Input Slave address setting(2) Don’t use(1)
A1 Input Slave address setting(2)
A2 Input Slave address setting(2)
GND - Reference voltage of all input / output, 0V
SDA
Input/
Output S erial data input serial data ou tput
SCL Input Serial cloc k input
WP Input Wri te prot ect term ina l
VCC - Connect the power source.
(1) Pins not used as devic e add ress may be set to any of ‘H’, 'L', and 'Hi-Z'.
(2) A0, A1 and A2 are not allowed to use as open
1
1
1
2
1
3
1
4
1
1
6
1
5
BR24G128-3A
BR24G256-3A
BR24G1M-3A
A0
1
7
A1
A2
GND
VCC
WP
SCL
8
SDA
8
7
6
5
4
3
2
1
SDA
SCL
WP
VCC
GND
A2
A1
A0
Address
Decoder
Word
Address
Register
Data
Register
Control Circuit
High Voltage
Generating Circuit
Power Source
Voltage Detection
8bit
ACK
START
STOP
(1)
(2) A0= Don't use : BR24G1M-3A
(1)
14bit: BR24G128-3A
15bit: BR24G256-3A
17bit: BR24G1M-3A
128Kbit, 256Kbit, 1Mbit
EEPROM
Array
(2)
14biit
15biit
17biit
. 7/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Typical Performance Curves
Figure 4. Input High Voltage1 vs Supply Voltage
(A0, A1, A2, SCL, SDA, WP)
Figure 5. Input Low Voltage1 vs Supply Voltage
(A0, A1, A2, SCL, SDA, WP)
Figure 6. Output Low Voltage1 vs Output Low Current
(Vcc=2.5V)
Figure 7. Output Low Voltage2 vs Output Low Current
(Vcc=1.7V)
0
1
2
3
4
5
6
0123456
Supply Voltage : Vc c ( V)
I nput Low V oltage1 : V
IL1
(V)
Ta=-40℃
T a= 25℃
T a= 85℃
SPEC
0
1
2
3
4
5
6
0123456
Supply Voltage : Vc c ( V)
I nput High V oltage1 : VIH1(V)
Ta=-40℃
T a= 25℃
T a= 85℃
SPEC
0
0.2
0.4
0.6
0.8
1
0123456
O utput Low Cur r ent : I
OL
(mA)
O utput Low V oltage2 : V
OL2
(V)
SPEC
Ta=-40℃
T a= 25℃
T a= 85℃
0
0.2
0.4
0.6
0.8
1
0123456
O utput Low Cur r ent : IOL(mA)
O utput Low V oltage1 : VOL1(V)
Ta=-40℃
T a= 25℃
T a= 85℃
SPEC
. 8/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Typical Performance Curves
‐
continued
Figure 8 . Input Leakage Current vs Supply Voltage
(A0, A1, A2, SCL, WP)
Figure 9 . Output Leakage Current vs Supply Voltage
(SDA)
Figure 10. Supply Current (Write) vs Supply Voltage
(fSCL=1MHz BR24G128/256-3A)
Figure 11. Supply Current (Write) vs Supply Voltage
(fSCL=1MHz BR24G1M-3A)
0
0.2
0.4
0.6
0.8
1
1.2
0123456
Supply Voltage : Vc c ( V)
I nput Leak age Cur r ent : I
LI
(µA)
Ta=-40℃
T a= 25℃
T a= 85℃
SPEC
0
0.2
0.4
0.6
0.8
1
1.2
0123456
Supply Voltage: Vc c ( V)
O utput Leak age Cur r ent : I
LO
(µA)
Ta=-40℃
T a= 25℃
T a= 85℃
SPEC
0
1
2
3
4
5
6
0123456
Supply Voltage : Vc c ( V)
Supply Current (W rite) : I cc1(mA)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.5
1
1.5
2
2.5
3
0123456
Supply Voltage : Vc c ( V)
Supply Current (W rite) : I cc1(mA)
Ta=-40℃
T a= 25℃
T a= 85℃
SPEC
. 9/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Typical Performance Curves
‐
continued
Figure 12. Supply Current (Read) v s Suppl y Voltage
(fscl=1MHz)
Figure 13. Standby Current v s Supply Volt ag e
(BR24G128/256-3A)
Figure 15. Clock Frequency vs Supply Voltage
Figure 14. Standby Current v s Supply Volt ag e
(BR24G1M-3A)
0.1
1
10
100
1000
10000
0123456
Supply Voltage : Vc c ( V)
Clock Frequency : f scl(kHz)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.5
1
1.5
2
2.5
0123456
Supply Volt age : Vc c ( V)
Standby Cur r ent : I
SB
(µA)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.5
1
1.5
2
2.5
0 1 2 3 4 5 6
S uppl y V ol tage : V cc(V )
S uppl y Current (Read) : I
CC2
(mA)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.5
1
1.5
2
2.5
3
3.5
0123456
Supply Voltage : Vc c ( V)
Standby Cur r ent : I
SB
(µA)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
. 10/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Typical Pe rfo rmance Curves
‐
continued
Figure 16. Data Clock High Period vs Supply Voltage
Figure 17. Data Clock Low Period vs Supply Voltage
Figure 19. Start Condition Hold Time vs Supply Voltage
Figure18. SDA (OUTPUT) Fall Time vs Supply Voltage
0
0.1
0.2
0.3
0.4
0123456
Supply Voltage : Vc c ( V)
Dat a Cloc k High P er iod : t
HIGH
(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.1
0.2
0.3
0.4
0.5
0.6
0123456
S uppl y V ol tage : V cc(V )
Dat a Clock Low P eriod : t
LOW
(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.05
0.1
0.15
0.2
0.25
0.3
0 1 2 3 4 5 6
S uppl y V ol tage : V cc(V )
S tart Conditi on Hold T i m e : t
HD:STA
(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
0123456
S uppl y V ol tage : V cc(V )
SDA (OUTPUT) Fall Time : t
F2
(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
. 11/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Typical Performance Curves
‐
continued
Figure 20. Start Condition Setup Time vs Supply Voltage
0
0.05
0.1
0.15
0.2
0.25
0.3
0123456
S uppl y V ol tage : V cc(V )
S tart Conditi on S etup Ti m e : tSU:STA(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
-150
-100
-50
0
50
0 1 2 3 4 5 6
S uppl y V ol tage : V cc(V )
I nput Dat a Hold T i m e : tHD:DAT(ns)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
10
20
30
40
50
60
0123456
S uppl y V ol tage : V cc(V )
I nput Dat a S etup Ti m e : t
SU:DAT
(ns)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
Figure 21. Input Data Hold Time vs Supply Voltage
(HIGH)
-150
-100
-50
0
50
012 3 4 5 6
S uppl y V ol tage : V cc(V )
I nput Dat a Hold T i m e : t
HD:DAT
(ns)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
Figure 22. Input Data Hold Time vs Supply Voltage
(LOW)
Figure 23 Input Data Setup Time vs Supply Voltage
(HIGH)
. 12/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Typical Performance Curves
‐
continued
0
10
20
30
40
50
60
0123456
Supply Volt age : Vc c ( V)
I nput Data S etup T im e : tSU:DAT(ns)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.1
0.2
0.3
0.4
0.5
0123456
Supply Voltage : Vc c ( V)
O utput Data Delay Tim e : t
PD0
(µs)
SPEC
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.1
0.2
0.3
0.4
0.5
0123456
Supply Voltage : Vc c ( V)
O utput Data Delay Tim e : t
PD1
(µs)
SPEC
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.05
0.1
0.15
0.2
0.25
0.3
0123456
Supply Voltage : Vc c ( V)
Stop Condition S etup T im e : tSU:STO(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
Figure 24. Input Data Setup Time vs Supply Voltage
(LOW)
Figure 25. Output Data Delay Time vs Supply Voltage
Figure 26. Output Data Delay Time vs Supply Voltage
Figure 27. Stop Condition Setup Time vs Supply Voltage
. 13/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Figure 31. Noise Spike Width vs Supply Voltage
(SCL LOW)
Figure 30. Noise S pike Width vs Supply Voltage
(SCL HIGH)
Typical Performance Curves
‐
continued
0
0.1
0.2
0.3
0.4
0.5
0.6
0123456
Supply Voltage : Vc c ( v)
Bus Free Time : tBUF(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
1
2
3
4
5
6
0123456
Supply Voltage : Vc c ( v)
Write Cycle Time : t
WR
(ms)
Ta=-40℃
T a= 25℃
T a= 85℃
SPEC
0
0.05
0.1
0.15
0.2
0.25
0.3
01234 5 6
S uppl y V ol tage : V cc(V )
Noise S pi ke Wi dt h(S CL LOW) : t I(µ s)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.05
0.1
0.15
0.2
0.25
0.3
0123456
S uppl y V ol tage : V cc(V )
Noise S pi ke Wi dt h(S CL HI G H) : t I(µ s)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
Figure 28. Bus Free Time vs Supply Voltage
Figure 29. Write Cycle Time vs Supply Voltage
. 14/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Figure 35. WP Setup Time vs Supply Voltage
Figure 34. WP Hold Time vs Supply Voltage
Figure 33. Noise Spike Width vs Supply Voltage
(SDA LOW)
Figure 32. Noise Spike Width vs Supply Voltage
(SDA HIGH)
Typical Performance Curves
‐
continued
0
0.05
0.1
0.15
0.2
0.25
0.3
0123456
Supply Voltage : Vc c ( V)
Noise Spike Width(SDA LO W ) : t I(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.2
0.4
0.6
0.8
1
1.2
0 1 23 4 5 6
S uppl y V ol tage : V cc(V )
WP Hold T i m e : t
HD:WP
(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
-0.3
-0.2
-0.1
0
0.1
0.2
0123456
S uppl y V ol tage : V cc(V )
WP S etup T ime : t
SU:WP
(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.05
0.1
0.15
0.2
0.25
0.3
0 1 2 3 4 5 6
Supply Voltage : Vc c ( V)
Noise Spike Width(SDA HI G H) : t I(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
. 15/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Figure 36. WP High Period vs S upply Volt age
Typical Performance Curves
‐
continued
0
0.2
0.4
0.6
0.8
1
1.2
0123456
Supply Voltage : Vc c ( V)
W P High P er iod : tHIGH:WP ( µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
. 16/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Timing Chart
1. I2C BUS Data Communication
I2C BUS data c ommunication starts by start condition input, and ends by stop condition input. Data is always 8bit long,
and acknowledge is always required after each byte. I2C BUS data communication with several devices is possible by
connecting with 2 communication lines: serial data (SDA) and serial clock (SCL).
Among the devices , there should be a “master” that generates clock and control communication s tart and end. The rest
become “sl ave” which are controlled by an address peculiar to each device, l ike this EEPROM. The device that outputs
data to the bus during data communication is called “transmitter”, and the device that receives data is c alled “receiver”..
2. Start Condition (Start Bit Recognition)
(1) Before executing each command, start condition (start bit) where SDA goes from 'HIGH' down to 'LOW' when
SCL is 'HIGH' is necessary.
(2) This IC always detects whether SDA and SCL are in start condition (start bit) or not, therefore, unless this
condition is satisfied, any command cannot be executed.
3. Stop Condition (Stop Bit Recognition)
(1) Each command can be ended by a stop condition (stop bit) where SDA goes from 'LOW ' to 'HIGH' while SCL is
'HIGH'.
4. Acknowledge (ACK) Signal
(1) This acknowledge (ACK) s ignal is a software rule to show whether data transfer has been made normally or not.
In master-slave communication, the device (Ex. µ-COM sends slave address input for write or read command to
this IC) at the transmitter (sending) side releases the bus after output of 8bit data.
(2) The device (Ex. This IC receives the slave address input for write or read command from the µ-COM) at the
receiver (receiving) side sets SDA 'LOW' during 9th clock cycle, and outputs acknowledge signal (ACK signal)
showing that it has received the 8bit data.
(3) This IC, after recognizing start condition and slave address (8bit), outputs acknowledge signal (ACK signal)
'LOW'.
(4) After receiving 8bit data (word address and write data) during each write operation, this IC outputs acknowledge
signal (ACK signal) 'LOW'.
(5) During read operation, this IC outputs 8bit data (read data), and detects acknowledge signal (ACK signal) 'LOW'.
When acknowledge signal (ACK signal) is detected, and stop condition is not sent from the m aster (µ-COM) side,
this IC continues to output data. When acknowledge signal (ACK signal) is not detected, this IC stops data
transfer, and recognizes stop condition (stop bit), and ends read operation. Then this IC becomes ready for
another transmission.
5. Device Addressing
(1) Slave address comes after start condition from master.
(2) The significant 4 bits of slave address are used for recognizing a device type.
The device code of this IC is fixed to '1010'.
(3) Next slave addres ses (A2 A1 A0 --- device address ) are for selecting devices, and plural ones can be used on a
same bus according to the number of devi ce addre ss es.
(4) The most insignificant bit (R/W --- READ/WRITE) of slave address is used for designating write or read action,
and is as shown below.
Setting R / W
―― to 0 ------- write (setting 0 to word address setting of random read)
Setting R / W
―― to 1 ------- read
P0 is page select bit.
Type Slave address
Maximum number of
Connected buses
BR24G128-3A, BR24G256-3A, 1 0 1 0 A2 A1 A0 R/W
―― 8
BR24G1M-3A
1 0 1 0 A2 A1 P0 R/W
――
4
8 9 8 9 8 9
S P
condition condition
ACK
STOP
ACK
DATA
DATA
ADDRESS
START
R/W
ACK
1-7
SDA
SCL
1-7
1-7
Figure 37. Data Transfer Timing
. 17/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Write Command
1. Write Cycle
(1) Arbitrary data can be written to EEPROM. When writing only 1 byte, Byte Write is normally used, and when
writing continuous data of 2 bytes or more, simultaneous write is possible by Page Write cycle. The maximum
number of write bytes is spe cif ied per device of each capacity.
Up to 256 arbitrary bytes can be written.（In the case of BR 24G 1M-3A）
(2) During internal write execution, all input commands are ignored, therefore ACK is not returned.
(3) Data is written to the address designated by word address (n-th address)
(4) By issuing stop bit after 8bit data input, internal write to memory cell starts.
(5) When internal write is started, command is not accepted for tWR (5ms at maximum).
(6) Using page write cycle, writing in bulk is done as follows: Up to 64Byte (BR24G128-3A, BR24G256-3A）
Up to 256Byte (BR24G1M-3A）
The bytes in excess overwrite the data already sent first.
(Refer to "Internal Address Increment")
(7) As for page write cycle of BR24G128-3A and BR24G256-3A, where 2 or more bytes of data is intended to be
written, after the 8 significant bits (BR24G128-3A) or 9 significant bits (BR24G256-3A) of word address are
designated arbitrarily, only the value of 6 least significant bits in the addr e ss is increme nted internally, so that data
up to 64 bytes of memory only can be written.
(8) As for page write cycle of BR24G1M-3A, where 2 or more bytes of data is intended to be written, after the page
select bit ‘P0’ of slave, and the 8 significant bits of word address are designated arbitrarily, only the value of 8
lea st sign ific ant bi ts in the address is incremented internally, so that data up to 256 bytes of memory only ca n be
written
A1
A2
WA
14
1
1
0
0
W
R
I
T
E
S
T
A
R
T
R
/
W
S
T
O
P
1st WORD
ADDRESS
DATA
SLAVE
ADDRESS
A0
D0
A
C
K
SDA
LINE
A
C
K
A
C
K
Note)
WA
0
A
C
K
2nd WORD
ADDRESS
D7
(1)
WA
15
(1) As for WA14, BR24G128-3A becomes don't care.
As for WA15, BR24G128/256-3A becomes don't car e.
Figure 38. Byte Write Cycle
Figure 39. Page Write Cycle
(1) As for WA14, BR24G128-3A becomes don't care.
As for WA15, BR24G128/256-3A becomes don't care.
(2) As for BR24G128/256-3A becomes (n+63)
As for BR24G1M-3A becomes (n+255 )
W
R
I
T
E
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
1st WORD
ADDRESS(n)
SDA
LINE
A
C
K
A
C
K
DATA(n+63)
A
C
K
SLAVE
ADDRESS
1
0
0
0
1
0
A0
A1
A2
WA
14
D0
Note
)
(1)
DATA(n)
D0
D7
A
C
K
2nd WORD
ADDRESS(n)
WA
0
(2)
1
0
0
1
A0
A1
A2
(1)
Note)
Figure 40. Differenc e of Slave Address of Each Ty pe
WA
15
(1) In BR24G1M-3A A0 becomes P0.
. 18/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
2. Notes on Write Cyc le Continuous Input
List of numbers of page write
Number of
Pages
64Byte 256Byte
Product
number BR24G128-3A
BR24G256-3A
BR24G1M-3A
The above numbers are maxim um bytes for respective types.
Any bytes below these can be written.
In the case BR24G256-3A, 1 page=64bytes, but the page
write cycle time is 5ms at maximum for 64byte bulk write.
It does not stand 5ms at maximum × 64byte=320ms(Max)
3. Internal Address Increment
Page write mode (in t he case of BR24G128-3A）
4. Write Protect (WP) Terminal
Write prote ct (WP) f unction
When WP termina l is set at Vcc (H level), data rewrite of all addresses is prohibited. When it is set GND (L level), data
rewrite of all address is enabled. Be sure to connect this terminal to Vcc or GND, or control it to H level or L level. Do
not leave it ope n.
In case of using it as ROM, it is recommended to connect it to pull up or Vcc. At extremely low voltage at power
ON/OFF, by setting the WP terminal ‘H’, write error can be prevented.
For example, when it is started from address 3Eh,
then, increment is made as below,
3Eh→3Fh→00h→01h･･･ please take note.
※3Eh･･･3E in hexadecimal, t herefore, 00111110 becomes a
binary number.
WA7 WA6 WA5 WA4 WA3 WA2 WA1 WA0
00000000
000 0 0001
0 0 00 0 0 1 0
0011 1 11 0
00111 1 1 1
0 0 0000 0 0
Increment
3Eh
Significant bit is fixed.
No digit up
. 19/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Read Command
1. Read Cycle
Read cycle is when data of EEPROM is read. Read cycle could be random read cycle or current read cycle. Random
read cycle is a command to read data by designating a specific address, and is used generally. Current read cycle is a
command to read data of internal address register without designating an address, and is used when to verify just after
write cycle. In both the read cycles, sequential read cycle is available where the next address data can be read in
succession.
(1) In random read cycle, data of designated word address can be read.
(2) When the command just before current read cycle is random read cycle, current read cycle (each including
sequential read cycle), data of incremented last read address (n)-th, i.e., data of the (n+1)-th address is output.
(3) W he n ACK sig nal 'LOW' after D0 is detected, and stop condition is not sent from master (μ-COM) side, the next
address data can be read in succession.
(4) Read cycle is ended by stop condition where 'H' is input to ACK signal after D0 and SDA signal goe s from ‘L’ to
‘H’ while at SCL signal is ‘H’.
(5) When 'H' is not input to ACK signal after D0, sequential read gets in, and the next data is output.
Therefore, read command cycle cannot be ended. To end read command cycle, be sure to input 'H' to ACK si gnal
after D0, and the stop condition where SDA goes from ‘L’ to ‘H’ while SCL sig nal is 'H'.
(6) Sequential read is ended by stop condition where 'H' is input to ACK signal after arbitrary D0 and SDA is asserted
from ‘L’ to ‘H’ while SCL signal is 'H'.
W
R
I
T
E
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
1st WORD
ADDRESS（ｎ）
SDA
LINE
A
C
K
A
C
K
DATA(n)
A
C
K
SLAVE
ADDRESS
1
0
0
1
A0
A1
A2
WA
14
D7
D0
2nd WORD
ADDRESS（ｎ）
A
C
K
S
T
A
R
T
SLAVE
ADDRESS
1
0
0
1
A2
A1
R
/
W
R
E
A
D
A0
WA
0
Note)
(1)
WA
15
Figure 41. Random Read Cyc le
(1) As for WA14, BR24G128-3A become don’t care.
As for WA15, BR24G128/256-3A become don’t care.
S
T
A
R
T
S
T
O
P
SDA
LINE
A
C
K
DATA(n)
A
C
K
SLAVE
ADDRESS
1
0
0
1
A0
A1
A2
D0
D7
R
/
W
R
E
A
D
Note)
Figure 42. Current Read Cycle
R
E
A
D
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
DATA(n)
SDA
LINE
A
C
K
A
C
K
DATA(n+x)
A
C
K
SLAVE
ADDRESS
1
0
0
1
A0
A1
A2
D0
D7
D0
D7
Note）
Figure 43. Sequential Read Cycle (in the case of current read cycle)
(1) In BR24G1M-3A, A0 becomes P0.
Note)
Figure 44. Difference of Slave Address of Each Type
1
0
0
1
A0
A1
A2
(1)
. 20/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. A l l rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Software Reset
Software reset is executed to avoid malfunction after power ON, and during command input. Software reset has several
kinds, and 3 kinds of them are shown in the figure below. (Refer to Figure 45-(a), Figure 45-(b), Figure 45-(c)) W ithin the
dummy clock input area, the SDA bus is released ('H' by pull up) and ACK output and read data '0' (both 'L' level) may be
output from EEPROM. Therefore, if 'H' is input forcibly, output may conflict and over current may flow, leading to
instantaneous power failure of system power source or influence upon devices.
Acknowledge Polling
During internal write execution, all input commands are ignored, therefore ACK is not returned. During internal automatic
write execution after write cycle input, next command (slave address) is sent, and if the first ACK signal sends back 'L', then
it means end of write operation, else 'H' is returned, which means writing is still in progress. By the use of acknowledge
polling, next command can be executed without waiting for tWR = 5ms.
To write continuously, R/W = 0, then to carry out current read cycle after write, slave address with R/W = 1 is sent, and if
ACK signal sends bac k 'L', then execute word address input and data output and so forth.
1
2
13
14
SCL
Dummy clock×14
Start×2
SCL
Figure 45-(a). The Case of Dummy Clock × 14 +START+START+ Command Input
タト
※
S t ar t command from START input.
2
1
8
9
Dummy clock
×
9
Start
Figure 45-(b).
The Case of START + Dummy Clock × 9 +START+ Command Input
Start
Normal command
Normal command
Normal command
Normal command
Start
×
9
SDA
SDA
SCL
SD
1
2
3
8
9
7
Figure 45-(c).
START×9+ Command Input
Normal command
Normal command
SDA
Slave
address
Word
address
…
…
S
T
A
R
T
First write command
A
C
K
H
A
C
K
L
Slave
address
Slave
address
Slave
address
Data
Write command
During internal write,
ACK = HIGH is returned.
After completion of internal write,
ACK=LOW is returned, so input next
word address and data in succession.
t
WR
t
WR
Second write command
S
T
A
R
T
S
T
A
R
T
S
T
A
R
T
S
T
A
R
T
S
T
O
P
S
T
O
P
A
C
K
H
A
C
K
H
A
C
K
L
A
C
K
L
Figure 46.
Case to Continuous Write by Acknowledge Polling
. 21/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. A l l rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
WP Valid Timing (W rite Can cel)
WP is usually fixed to 'H' or 'L', but when W P is used to cancel write cycle and so on, pay attention to the following W P valid
timing. During write cycle execution, inside cancel valid area, by setting W P='H', write cycle can be cancelled. In both byte
write cycle and page write cycle, the area from the first start condition of command to the rise of clock to take in D0 of data(in
page write cycle, the first byte data) is the cancel invalid area.
WP input in this area becomes ‘Don't care’. The area from the rise of SCL to take in D0 to the stop condition input is the
cancel valid area. Furthermore, after the execution of forced end by W P, the IC enters standby status..
Command Cancel by Start Condition and Stop Condition
During command input, by continuously inputting start condition and stop condition, command can be cancelled. (Figure
48.) However, within ACK output area and during data read, SDA bus may output 'L'. In this case, start condition and stop
condition cannot be input, so reset is not available. Therefore, execute software reset. When command is cancelled by
start-stop condition during random read cycle, sequential read cycle, or current read cycle, internal setting address is not
determined. Therefore, it is not possible to carry out current read cycle in succession. To c arr y o u t re a d c ycl e i n suc c es s ion,
carry out random read cycle.
・
Rise of D0 taken clock
SCL
D0
ACK
Enlarged view
SCL
SDA
ACK
D0
・
Rise of SDA
SDA
WP
WP cancel invalid area
WP cancel valid area
Data is not written.
Figure 47. WP Valid Timing
Slave
address
D7
D6
D5
D4
D3
D2
D1
D0
Data
t
WR
SDA
D1
S
T
A
R
T
A
C
K
L
A
C
K
L
A
C
K
L
A
C
K
L
S
T
O
P
Word
address
Figure 48. Case of Cancel by Start, Stop Condition during Slav e Address Input
SCL
SDA
1
1
0
0
Start condition
Stop condition
Enlarged view
WP cancel invalid area
. 22/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. A l l rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
I/O Peripheral Circuit
1. Pull Up Resistance of SDA Terminal
SDA is NMOS open drain, so it requires a pull up resistor. As for this resistor value (RPU), select an appropriate value
from microcontroller VIL, IL, and VOL-IOL characteristics of this IC. If RPU is large, operating frequency is limited. The
smaller the RPU, the larger is the supply current (Read).
2. Maximum Value of RPU
The maxi m um value of RPU is determined by the following fac tors.
(1)SDA rise time to be determined by the capacitance (CBUS) of bus line of RPU and SDA should be tR or lower.
Furthermore, AC timing should be satisfied even when SDA rise time is late.
(2)The bus electric potential A to be determined by input leak total (IL) of device connected to bus at output of 'H' to
SDA bus and RPU should sufficiently secure the input 'H' level (VIH) of microcontroller and EEPROM including
recommended noise margin of 0.2VCC.
VCC-ILRPU-0.2 VCC ≧ VIH
∴
R
PU
≦
0.8V
CC－
V
IH
I
L
Ex.) VCC =3V IL=10μA VIH=0.7 VCC
From (2)
≦
300
[kΩ]
R
PU
≦
0.8×3－0.7×3
10×10
-6
3. Minimum Value of RPU
The minimum value of RPU is determined by the following factors.
(1) When IC outputs LOW, it should be satis fied that VOLMAX=0.4V and IOLMAX=3mA.
(2) VOLMAX=0.4V should secure the input 'L' level (VIL) of microcontroller and EEPROM including recommended
noise margin 0.1VCC.
VOLMAX ≦ VIL-0.1 VCC
Ex.) VCC =3V, VOL=0.4V, IOL=3mA, microcontro ller, EEPROM VIL=0.3VCC
And VOL=0.4 [V]
VIL=0.3×3
=0.9 [V]
Therefore, the condition (2) is satisfied.
4. Pull Up Resistance of SCL Terminal
When SCL control is made at the CMOS output port, there is no need for a pull up resistor. But when there is a time
where SCL becomes 'Hi-Z', add a pull up resistor. As for the pull up resistor value, one of several kΩ to several ten kΩ is
recommended in consideration of drive performance of output port of microcontroller.
I
OL
R
PU
≧
V
CC－
V
OL
I
OL
∴
V
CC－
V
OL
R
PU
≦
≧867
[Ω]
R
PU
≧
3－0.4
3×10
-3
from (1)
Microcontroller
R
PU
A
SDA terminal
I
L
I
L
Bus line
capacity
CBUS
Figure 49. I/O Circuit Diagram
BR24GXX
. 23/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. A l l rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Cautions on Microcontroller Connection
1. RS
In I2C BUS, it is rec ommended that SDA port is of open drain input/output. However, when using CMOS input / output of
tri state to SDA port, insert a series resistance RS between the pull up resistor RPU and the SDA terminal of EEPROM.
This is to c ontrol over current that may occur when PMOS of the microcontroller and NMOS of EEPROM are turned ON
simultaneously. RS also plays the role of protecting the SDA terminal against surge. Therefore, even when SDA port is
open drain input/output, RS can be used.
2. Maximum Value of RS
The maxi m um value of RS is determined by the following relations.
(1) SDA rise time to be determined by the capacitance (CBUS) of bus line and RPU of SDA should be tR or lower.
Furthermore, AC timing should be satisfied even when SDA rise time is slow.
(2) The bus electric potential A to be determined by RPU and RS the moment when EEPROM outputs 'L' to SDA bus
should sufficiently secure the input 'L' level (VIL) of microco nt r oller in clu din g recom men ded nois e margin of 0.1VCC.
3. Minimum Value of RS
The minimum value of RS is determined by over current at bus collision. When over current flows, noises in power
source line and instantaneous power failure of power source may occur. When allowable over current is defined as I,
the following relation must be satisfied. Determine the allowable current in consideration of the impedance of power
source line in set and so forth. Set the over current to EEPROM to 10mA or lower.
R
PU
Microcontroller
R
S
EEPROM
Figure 50. I/O Circuit Diagram
Figure 51. Input / O ut put Co lli s ion Timing
ACK
'L' output of EEPROM
'H' output of microcontroller
Over cur rent flo ws to S DA line by 'H'
output of microcontroller and 'L'
output of EEPROM.
SCL
SDA
Microcontroller
EEPROM
'L'output
R
S
R
PU
'H' output
Over current I
Figure 53. I/O Circuit Diagram
≦
1.67 [kΩ]
≦
0.3×3
－
0.4
－
0.1×3
×
20×10
3
1.1×3
－
0.3×3
R
S
×
R
PU
1.1V
CC
-V
IL
Ex.
）
V
CC
=3V
V
IL
=0.3V
CC
V
OL
=0.4V
R
PU
=20k
Ω
∴
R
S
≦
V
IL
－
V
OL
－
0.1V
CC
(V
CC
－
V
OL
)×R
S
+
V
OL
+0.1V
CC
≦
V
IL
R
PU
+R
S
V
CC
R
S
V
CC
I
≧
300 [Ω]
∴
Ex.) Vcc=3V, I=10mA
R
S
≧
3
10×10
-3
≦
I
R
S
≧
R
PU
Micro controller
R
S
EEPROM
I
OL
A
Bus line
capacity
C
BUS
V
OL
V
CC
V
IL
Figure 52. I/O Circuit Diagram
. 24/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. A l l rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
I/O Equivalence Circuit
1. Input (A0, A1, A 2, SCL, WP)
2. Input / Output (SDA)
Power-Up/Down Conditions
At power on, the IC’s internal circuits may go through unstable low voltage area as the Vcc rises, making the IC’s internal
logic circuit not completely reset, hence, malfunction may occur. To prevent this, the IC is equipped with POR circuit and
LVCC circuit. To assure the op eration, observe the foll owing conditions at power ON.
1. Set SDA = 'H' and SCL ='L' or 'H’
2. Start power source so as to satisfy the recommended conditions of tR, tOFF, and Vbot for operating POR circuit.
tOFF
tR
Vbot
0
V
CC
3. Set SDA and SCL so as not to bec ome 'Hi-Z'.
When the above conditions 1 and 2 cannot be observed, take the following countermeasures.
(1) In the case when the above condition 1 cannot be observed such that SDA becomes 'L' at power ON.
→Control SCL and SDA as shown below, to make SCL and SDA, 'H' and 'H'.
(2) In the case when the above condition 2 cannot be observed.
→After power source becomes stable, execute software reset(Page19).
(3) In the case when the above conditions 1 and 2 c annot be observed.
→Carry out (1), and then carry out (2).
Low Voltage Malfunction Prevention Function
LVCC circuit prevents data rewrite operation at low power, and prevents write error. At LVCC voltage (Typ =1.2V) or below,
data rewrite is prev ented.
Noise Countermeasures
1. Bypass Capacitor
When noise or surge gets in the power source line, malfunction may occur, therefore, it is recommended to connect a
bypass capacitor (0.1μF) between the IC’s VCC and GND pins. Connect the capacitor as close to IC as possible. In
addition, it is also recommended to connect a bypass capacitor between board’s VCC and GND.
Recommended c onditions of tR, tOFF,Vbot
tR tOFF Vbot
10ms or below 10m s or larger 0.3V or below
100ms or below 10ms or larger 0.2V or below
Figure 56. Rise Wav eform Diagram
t
LOW
t
SU:DAT
t
DH
After Vcc becomes stable
SCL
V
CC
SDA
Figure 57. When SCL= 'H' and SDA= 'L'
t
SU:DAT
After Vcc becomes stable
Figure 58. When SCL='L' and SDA='L'
Figure 54. Input Pin Circuit Diagram
Figure 55. Input / Output Pin Circuit Diagram
. 25/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. A l l rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Operational Notes
1. Described numeric values and data are design representative values only, and the values are not guaranteed.
2. We believe that the application circuit exampl es in this document are recommendable. However, in actual use, confirm
characteristics further sufficiently. If changing the fixed number of external parts is desired, make your decision with
sufficient margin in consideration of static characteristics, transient characteristics, and fluctuations of external parts
and our LSI.
3. Absolute maximum ratings
If the absolute maximum ratings such as supply voltage, operating temperature range, and so on are exceeded, LSI
may be destroyed. Do not supply voltage or subject the IC to temperatures exceeding the absolute maximum ratings.
In case of fear of exceeding the absolute maximum ratings, take physical safety countermeasures such as adding
fuses, and see to it that conditions exceeding the absolute maximum ratings should not be supplied to the LSI.
4. GND electric potential
Set the voltage of GND terminal lowest at any operating condition. Make sure that each terminal voltage is not lower
than that of GND terminal.
5. Thermal design
Use a thermal design that allows for a sufficient margin by taking into account the permissible power dissipation (Pd) in
actual operat ing co ndit ion s.
6. Short between pins an d mounting errors
Be careful when mounting the IC on printed circuit boards. The IC may be damaged if it is mounted in a wrong
orientation or if pins are shorted together. Short circuit may be caused by conductive particles caught between the pins.
7. Operating the IC in the presence of strong electromagnetic field may cause malfunction, therefore, evaluate design
sufficiently.
. 26/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. A l l rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Part Numbering
B R 2 4 G x x x x x x - 3 A x x x x
Lineup
Capacity Package Orderable Part Number Remark
Type Quantity
128K
DIP-T8 Tube of 2000 BR24G128 -3A Not Halogen free 100% Sn
SOP8 Reel of 2500 BR24G128F -3AGTE2 Halogen free 100% Sn
SOP-J8
BR24G128FJ
-3AGTE2
Halogen free
100% Sn
SSOP-B8 Reel of 2500 BR24G128FV -3AGTE2 Halogen free 100% Sn
TSSOP-B8 Reel of 3000 BR24G128FVT -3AGE2 Halogen free 100% Sn
TSSOP-B8J Reel of 2500 BR24G128FVJ -3AGTE2 Halogen free 100% Sn
MSOP8 Reel of 3000 BR24G128FVM -3AGTTR Halogen free 100% Sn
VSON008X2030 Reel of 4000 BR24G128NUX -3ATTR Halogen free 100% Sn
256K
DIP-T8 Tube of 2000 BR24G256 -3A Not Halogen free 100% Sn
SOP8 Reel of 2500 BR24G256F -3AGTE2 Halogen free 100% Sn
SOP-J8 BR24G256FJ -3AGTE2 Halogen free 100% Sn
SSOP-B8 Reel of 2500 BR24G256FV -3AGTE2 Halogen free 100% Sn
TSSOP-B8
Reel of 3000
BR24G256FVT
-3AGE2
Halogen free
100% Sn
1M DIP-T8 Tube of 2000 BR24G1M -3A Not Halogen free 100% Sn
SOP8 Reel of 2500 BR24G1MF -3AGTE2 Halogen free 100% Sn
SOP-J8 BR24G1MFJ -3AGTE2 Halogen free 100% Sn
BUS type
24：I2C
Operating temperature/ Operating Voltage
-40°C to +85°C/ 1.7V to 5.5V
Process Code
Packaging and Forming Specification
E2
: Embossed tape and reel
(SOP8,SOP-J8, SSOP-B8,TSSOP-B8, T SSOP-B8J)
TR
: Embossed tape and reel
(MSOP8, VSON008X2030)
None
: Tube
(DIP-T8)
Revision
128=128K 256=256K 1M=1024K
Capacity
Package
Blank
F
FV
FVJ
NUX
: DIP-T8
: SOP8
: SSOP-B8
: TSSOP-B8J
: VSON008X2030
FJ
FVT
FVM
: SOP-J8
: TSSOP-B8
: MSOP 8
As an exception, VSON008X2030 package will be Halogen free with “Blank”
G : Halogen free
Blank :
Not Halogen free
T : 100% Sn
Blank :
100% Sn
. 35/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. A l l rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Marking Diagrams
SOP8(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
SOP-J8(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
TSSOP-B8J(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
VSON008X2030 (TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
MSOP8(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
TSSOP-B8(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
SSOP-B8(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
DIP-T8 (TOP VIEW)
Part Number Marking
LOT Number
. 36/36
BR24Gxxx-3A (128K 256K 1M)
TSZ02201-0R2R0G100020-1-2
18.Jun.2015 Rev.006
© 2014 ROHM Co., Ltd. A l l rights reserved.
TSZ22111
・
15
・
001
www.rohm.com
Marking Information
Capacity Product Name
Marking
Package
128K
BR24G128A DIP-T8
4G12A SOP8
SOP-J8
4GHA SSOP-B8
4G12A TSSOP-B8
4G1
2A3
TSSOP-B8J
4GH
A
□
3
MSOP8
4G1
2A3
VSON008X2030
256K
BR24G256A DIP-T8
4G25A SOP8
SOP-J8
4GJA SSSOP-B8
4G25A TSSOP-B8
1M
BR24G1MA DIP-T8
4G1MA SOP8
SOP-J8
Revision History
Date Revision Changes
12.Apr.2012
001
New Release
25.Feb.2013 002 Update som e English words, sentences ’ descriptions, grammar and formatting.
Update Part Numbering.
Delete Lineup.
31.May.2013 003
P1 Change format of package line-up table.
P.3 Add VESD in Absolute Maximum Ratings
P.6 Add directions in Pin Descriptions
04.Jul.2013 004 P.4 Change Start Condition Setup Time from 0.25us to 0.20us.
P.26 Update Part Numbering. Add Lineup table.
02.May.2014
005
P.17,24,26 Japanese datasheet updated
18.Jun.2015 006
P.3 Change unit of power dissipation from mW to W.
P.24 Japanese datasheet upd ated
Datasheet
Datasheet
Notice-PGA-E Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
Notice
Precaution on using ROHM Products
1. Our Products are designed and manufactured for applicatio n in ordinar y elec tronic eq uipm ents (such as AV equipment ,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred b y you or third parties arisin g from the use of an y ROHM’s Prod ucts for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN USA EU CHINA
CLASSⅢ CLASSⅢ CLASSⅡb CLASSⅢ
CLASSⅣ CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe d esign against the physical injur y, damage to any property, which
a failure or malfunction of our Products may cause. T he following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliabili ty, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlig ht or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing comp onents, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flu x (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radi ation-proof design.
5. Please verify and confirm ch aracteristics of the final or mounted products in using the Pro ducts.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Po wer Dissipation (P d) dependi ng on Ambient temp erature (T a). When us ed in sealed area, confirm the actual
ambient temperature.
8. Confirm that operation temperature is within the specified range described i n the product specification.
9. ROHM shall not be in any way responsible or lia ble for failure induced under deviant conditio n from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogen ous (chlori ne, bromine, etc.) flu x is used, the residue of flux may negativel y affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM represe ntative in advance.
For details, please refer to ROHM Mounting specification
Datasheet
Datasheet
Notice-PGA-E Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise you r own indepen dent verificatio n and judgmen t in the use of such information
contained in this document. ROHM shall no t be in any way responsible or liable f or any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please t ake special care under dry condit ion (e.g. Grounding of human body / equipment / sol der iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportati on
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommende d b y ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderabilit y of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommen de d storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive s t ress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is require d before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products pl ease dispose them properly us ing an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoi ng information or data will not infringe any int ellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained i n this document. Provide d, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including b ut not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
DatasheetDatasheet
Notice – WE Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
