LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
LMV931-N/LMV931-N-Q1 /LMV932-N/LMV932-N-Q1/LMV934-N/LMV934-N-Q1
Single/Dual/Quad 1.8V, RRIO Operational Amplifiers
Check for Samples: LMV931-N,LMV931-N-Q1,LMV932-N,LMV932-N-Q1,LMV934-N,LMV934-N-Q1
1FEATURES DESCRIPTION
The LMV931-N/LMV932-N/LMV934-N are low
2(Typical 1.8V Supply Values; Unless Otherwise voltage, low power operational amplifiers. LMV931-
Noted) N/LMV932-N/LMV934-N operate from +1.8V to +5.5V
LMV931-N/LMV932-N/LMV934-N are Available supply voltages and have rail-to-rail input and output.
in Automotive AEC-Q100 Grade 1 Versions LMV931-N/LMV932-N/LMV934-N input common
mode voltage extends 200mV beyond the supplies
Guaranteed 1.8V, 2.7V and 5V Specifications which enables user enhanced functionality beyond
Output Swing the supply voltage range. The output can swing rail-
w/600Load 80mV from Rail to-rail unloaded and within 105mV from the rail with
w/2kLoad 30mV from Rail 600load at 1.8V supply. The LMV931-N/LMV932-
N/LMV934-N are optimized to work at 1.8V which
VCM 200mV Beyond Rails make them ideal for portable two-cell battery powered
Supply Current (Per Channel) 100μAsystems and single cell Li-Ion systems.
Gain Bandwidth Product 1.4MHz LMV931-N/LMV932-N/LMV934-N exhibit excellent
Maximum VOS 4.0mV speed-power ratio, achieving 1.4MHz gain bandwidth
Ultra Tiny Packages product at 1.8V supply voltage with very low supply
current. The LMV931-N/LMV932-N/LMV934-N are
Temperature Range 40°C to 125°C capable of driving a 600load and up to 1000pF
capacitive load with minimal ringing. LMV931-
APPLICATIONS N/LMV932-N/LMV934-N have a high DC gain of
Consumer Communication 101dB, making them suitable for low frequency
applications.
Consumer Computing The single LMV931-N is offered in space saving 5-
PDAs Pin SC70 and SOT-23 packages. The dual LMV932-
Audio Pre-amp N are in 8-Pin VSSOP and SOIC packages and the
Portable/Battery-powered Electronic quad LMV934-N are in 14-Pin TSSOP and SOIC
Equipment packages. These small packages are ideal solutions
for area constrained PC boards and portable
Supply Current Monitoring electronics such as cellular phones and PDAs.
Battery Monitoring
Typical Application
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2001–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
Charged Device Model 750V
ESD Tolerance(3) Machine Model 200V
Human Body Model 2000V
Supply Voltage (V+–V ) 6V
Differential Input Voltage ± Supply Voltage
Voltage at Input/Output Pins V++0.3V, V--0.3V
Storage Temperature Range 65°C to 150°C
Junction Temperature(4) 150°C
For soldering specifications:
See product folder at www.ti.com and http://www.ti.com/lit/SNOA549
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test
conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for availability and
specifications.
(3) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of
JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
(4) The maximum power dissipation is a function of TJ(MAX),θJA and TA. The maximum allowable power dissipation at any ambient
temperature is PD= (TJ(MAX) TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.
Operating Ratings(1)
Supply Voltage Range 1.8V to 5.5V
Temperature Range 40°C to 125°C
5-Pin SC70 414°C/W
5-Pin SOT-23 265°C/W
8-Pin VSSOP 235°C/W
Thermal Resistance (θJA)8-Pin SOIC 175°C/W
14-Pin TSSOP 155°C/W
14-Pin SOIC 127°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test
conditions, see the Electrical Characteristics.
2Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
1.8V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ= 25°C. V+= 1.8V, V = 0V, VCM = V+/2, VO= V+/2 and RL> 1 M.
Boldface limits apply at the temperature extremes. See(1)
Symbol Parameter Condition Min Typ Max Units
(2) (3) (2)
VOS Input Offset Voltage LMV931-N (Single) 1 4 mV
6
LMV932-N (Dual) 1 5.5 mV
LMV934-N (Quad) 7.5
TCVOS Input Offset Voltage Average 5.5 μV/°C
Drift
IBInput Bias Current 15 35 nA
50
IOS Input Offset Current 13 25 nA
40
ISSupply Current (per channel) 103 185 μA
205
CMRR Common Mode Rejection Ratio LMV931-N, 0 VCM 0.6V 60 78
1.4V VCM 1.8V(4) 55
LMV932-N and LMV934-N 55 76
0VCM 0.6V 50 dB
1.4V VCM 1.8V(4)
0.2V VCM 0V 50 72
1.8V VCM 2.0V
PSRR Power Supply Rejection Ratio 1.8V V+5V 75 100 dB
70
CMVR Input Common-Mode Voltage For CMRR Range TA= 25°C V0.2 0.2 to 2.1 V++0.2
Range 50dB TA40°C to VV+V
85°C
TA= 125°C V+0.2 V+0.2
AVLarge Signal Voltage Gain RL= 600to 0.9V, 77 101
LMV931-N (Single) VO= 0.2V to 1.6V, VCM = 0.5V 73 dB
RL= 2kto 0.9V, 80 105
VO= 0.2V to 1.6V, VCM = 0.5V 75
Large Signal Voltage Gain RL= 600to 0.9V, 75 90
LMV932-N (Dual) VO= 0.2V to 1.6V, VCM = 0.5V 72 dB
LMV934-N (Quad) RL= 2kto 0.9V, 78 100
VO= 0.2V to 1.6V, VCM = 0.5V 75
VOOutput Swing RL= 600to 0.9V 1.65 1.72
VIN = ±100mV 1.63
0.077 0.105
0.120 V
RL= 2kto 0.9V 1.75 1.77
VIN = ±100mV 1.74
0.024 0.035
0.04
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ= TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ> TA. See Applications section for information of temperature derating of the device. Absolute
Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded, either mechanically or
electrically.
(2) All limits are guaranteed by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
(4) For guaranteed temperature ranges, see Input Common-Mode Voltage Range specifications.
Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
www.ti.com
1.8V DC Electrical Characteristics (continued)
Unless otherwise specified, all limits guaranteed for TJ= 25°C. V+= 1.8V, V = 0V, VCM = V+/2, VO= V+/2 and RL> 1 M.
Boldface limits apply at the temperature extremes. See(1)
Symbol Parameter Condition Min Typ Max Units
(2) (3) (2)
VOOutput Swing RL= 600to 0.9V 1.65 1.72
LMV932-N-Q1 (Dual) VIN = ±1 1.63
0.077 0.105
0.173 V
RL= 2kto 0.9V 1.75 1.77
VIN = ±100mV 1.74
0.024 0.035
0.055
IOOutput Short Circuit Current(5) Sourcing, VO= 0V 4 8
VIN = 100mV 3.3 mA
Sinking, VO= 1.8V 7 9
VIN =100mV 5
(5) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of 45mA over long term may adversely affect
reliability.
1.8V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ= 25°C. V+= 1.8V, V = 0V, VCM = V+/2, VO= V+/2 and RL> 1 M.
Boldface limits apply at the temperature extremes. See (1)
Symbol Parameter Conditions Min Typ Max Units
(2) (3) (2)
SR Slew Rate See(4) 0.35 V/μs
GBW Gain-Bandwidth Product 1.4 MHz
ΦmPhase Margin 67 deg
GmGain Margin 7 dB
enInput-Referred Voltage Noise f = 10 kHz, VCM = 0.5V 60 nV/Hz
inInput-Referred Current Noise f = 10 kHz 0.08 pA/Hz
THD Total Harmonic Distortion f = 1kHz, AV= +1 0.023 %
RL= 600, VIN = 1 VPP
Amp-to-Amp Isolation See(5) 123 dB
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ= TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ> TA. See Applications section for information of temperature derating of the device. Absolute
Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded, either mechanically or
electrically.
(2) All limits are guaranteed by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
(4) Connected as voltage follower with input step from Vto V+. Number specified is the slower of the positive and negative slew rates.
(5) Input referred, RL= 100kconnected to V+/2. Each amp excited in turn with 1kHz to produce VO= 3VPP (For Supply Voltages <3V, VO
= V+).
4Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
2.7V DC Electrical Characteristics
Unles s otherwise specified, all limits guaranteed for TJ= 25°C. V+= 2.7V, V = 0V, VCM = V+/2, VO= V+/2 and RL> 1 M.
Boldface limits apply at the temperature extremes. See (1)
Symbol Parameter Condition Min Typ Max Units
(2) (3) (2)
VOS Input Offset Voltage LMV931-N (Single) 1 4 mV
6
LMV932-N (Dual) 1 5.5 mV
LMV934-N (Quad) 7.5
TCVOS Input Offset Voltage Average 5.5 μV/°C
Drift
IBInput Bias Current 15 35 nA
50
IOS Input Offset Current 8 25 nA
40
ISSupply Current (per channel) 105 190 μA
210
CMRR Common Mode Rejection Ratio LMV931-N, 0 VCM 1.5V 60 81
2.3V VCM 2.7V(4) 55
LMV932-N and LMV934-N 55 80
0VCM 1.5V 50 dB
2.3V VCM 2.7V(4)
0.2V VCM 0V 50 74
2.7V VCM 2.9V
PSRR Power Supply Rejection Ratio 1.8V V+5V 75 100 dB
VCM = 0.5V 70
VCM Input Common-Mode Voltage For CMRR TA= 25°C V0.2 0.2 to 3.0 V++0.2
Range Range 50dB TA=40°C to VV+V
85°C
TA= 125°C V+0.2 V+0.2
AVLarge Signal Voltage Gain RL= 600to 1.35V, 87 104
LMV931-N (Single) VO= 0.2V to 2.5V 86 dB
RL= 2kto 1.35V, 92 110
VO= 0.2V to 2.5V 91
Large Signal Voltage Gain RL= 600to 1.35V, 78 90
LMV932-N (Dual) VO= 0.2V to 2.5V 75 dB
LMV934-N (Quad) RL= 2kto 1.35V, 81 100
VO= 0.2V to 2.5V 78
VOOutput Swing RL= 600to 1.35V 2.55 2.62
VIN = ±100mV 2.53
0.083 0.110
0.130 V
RL= 2kto 1.35V 2.65 2.675
VIN = ±100mV 2.64
0.025 0.04
0.045
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ= TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ> TA. See Applications section for information of temperature derating of the device. Absolute
Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded, either mechanically or
electrically.
(2) All limits are guaranteed by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
(4) For guaranteed temperature ranges, see Input Common-Mode Voltage Range specifications.
Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
www.ti.com
2.7V DC Electrical Characteristics (continued)
Unles s otherwise specified, all limits guaranteed for TJ= 25°C. V+= 2.7V, V = 0V, VCM = V+/2, VO= V+/2 and RL> 1 M.
Boldface limits apply at the temperature extremes. See (1)
Symbol Parameter Condition Min Typ Max Units
(2) (3) (2)
VOOutput Swing RL= 600to 1.35V 2.55 2.62
LMV932-N-Q1 (Dual) VIN = ±100mV 2.53
0.083 0.110
0.187 V
RL= 2kto 1.35V 2.65 2.675
VIN = ±100mV 2.64
0.025 0.04
0.059
IOOutput Short Circuit Current(5) Sourcing, VO= 0V 20 30
VIN = 100mV 15 mA
Sinking, VO= 2.7V 18 25
VIN =100mV 12
(5) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of 45mA over long term may adversely affect
reliability.
2.7V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ= 25°C. V+= 2.7V, V = 0V, VCM = 1.0V, VO= 1.35V and RL> 1 M.
Boldface limits apply at the temperature extremes. See (1)
Symbol Parameter Conditions Min Typ Max Units
(2) (3) (2)
SR Slew Rate See(4) 0.4 V/µs
GBW Gain-Bandwidth Product 1.4 MHz
ΦmPhase Margin 70 deg
GmGain Margin 7.5 dB
enInput-Referred Voltage Noise f = 10 kHz, VCM = 0.5V 57 nVHz
inInput-Referred Current Noise f = 10 kHz 0.08 pA/Hz
THD Total Harmonic Distortion f = 1kHz, AV= +1 0.022 %
RL= 600, VIN = 1VPP
Amp-to-Amp Isolation See(5) 123 dB
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ= TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ> TA. See Applications section for information of temperature derating of the device. Absolute
Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded, either mechanically or
electrically.
(2) All limits are guaranteed by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
(4) Connected as voltage follower with input step from Vto V+. Number specified is the slower of the positive and negative slew rates.
(5) Input referred, RL= 100kconnected to V+/2. Each amp excited in turn with 1kHz to produce VO= 3VPP (For Supply Voltages <3V, VO
= V+).
6Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
5V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ= 25°C. V+= 5V, V = 0V, VCM = V+/2, VO= V+/2 and RL> 1 M.
Boldface limits apply at the temperature extremes. See(1)
Symbol Parameter Condition Min Typ Max Units
(2) (3) (2)
VOS Input Offset Voltage LMV931-N (Single) 1 4 mV
6
LMV932-N (Dual) 1 5.5 mV
LMV934-N (Quad) 7.5
TCVOS Input Offset Voltage Average 5.5 μV/°C
Drift
IBInput Bias Current 14 35 nA
50
IOS Input Offset Current 9 25 nA
40
ISSupply Current (per channel) 116 210 μA
230
CMRR Common Mode Rejection Ratio 0 VCM 3.8V 60 86
4.6V VCM 5.0V(4) 55 dB
0.2V VCM 0V 50 78
5.0V VCM 5.2V
PSRR Power Supply Rejection Ratio 1.8V V+5V 75 100 dB
VCM = 0.5V 70
CMVR Input Common-Mode Voltage For CMRR Range TA= 25°C V0.2 0.2 to 5.3 V++0.2
Range 50dB TA=40°C to VV+V
85°C
TA= 125°C V+0.3 V+0.3
AVLarge Signal Voltage Gain RL= 600to 2.5V, 88 102
LMV931-N (Single) VO= 0.2V to 4.8V 87 dB
RL= 2kto 2.5V, 94 113
VO= 0.2V to 4.8V 93
Large Signal Voltage Gain RL= 600to 2.5V, 81 90
LMV932-N (Dual) VO= 0.2V to 4.8V 78 dB
LMV934-N (Quad) RL= 2kto 2.5V, 85 100
VO= 0.2V to 4.8V 82
VOOutput Swing RL= 600to 2.5V 4.855 4.890
VIN = ±100mV 4.835
0.120 0.160
0.180 V
RL= 2kto 2.5V 4.945 4.967
VIN = ±100mV 4.935
0.037 0.065
0.075
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ= TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ> TA. See Applications section for information of temperature derating of the device. Absolute
Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded, either mechanically or
electrically.
(2) All limits are guaranteed by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
(4) For guaranteed temperature ranges, see Input Common-Mode Voltage Range specifications.
Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
www.ti.com
5V DC Electrical Characteristics (continued)
Unless otherwise specified, all limits guaranteed for TJ= 25°C. V+= 5V, V = 0V, VCM = V+/2, VO= V+/2 and RL> 1 M.
Boldface limits apply at the temperature extremes. See(1)
Symbol Parameter Condition Min Typ Max Units
(2) (3) (2)
VOOutput Swing RL= 600to 2.5V 4.855 4.890
LMV932-N-Q1 (Dual) VIN = ±100mV 4.807
0.120 0.160
0.218 V
RL= 2kto 2.5V 4.945 4.967
VIN = ±100mV 4.935
0.037 0.065
0.075
IOOutput Short Circuit Current(5) LMV931-N, Sourcing, VO= 0V 80 100
VIN = 100mV 68 mA
Sinking, VO= 5V 58 65
VIN =100mV 45
(5) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of 45mA over long term may adversely affect
reliability.
5V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ= 25°C. V+= 5V, V = 0V, VCM = V+/2, VO= 2.5V and R L> 1 M.
Boldface limits apply at the temperature extremes. See(1)
Symbol Parameter Conditions Min Typ Max Units
(2) (3) (2)
SR Slew Rate See(4) 0.42 V/µs
GBW Gain-Bandwidth Product 1.5 MHz
ΦmPhase Margin 71 deg
GmGain Margin 8 dB
enInput-Referred Voltage Noise f = 10 kHz, VCM = 1V 50 nV/Hz
inInput-Referred Current Noise f = 10 kHz 0.08 pA/Hz
THD Total Harmonic Distortion f = 1kHz, AV= +1 0.022 %
RL= 600, VO= 1V PP
Amp-to-Amp Isolation See(5) 123 dB
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ= TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ> TA. See Applications section for information of temperature derating of the device. Absolute
Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded, either mechanically or
electrically.
(2) All limits are guaranteed by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
(4) Connected as voltage follower with input step from Vto V+. Number specified is the slower of the positive and negative slew rates.
(5) Input referred, RL= 100kconnected to V+/2. Each amp excited in turn with 1kHz to produce VO= 3VPP (For Supply Voltages <3V, VO
= V+).
8Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
OUT B
1
2
3
4 5
6
7
8
OUT A
-IN A
+IN A
V-
V+
-IN B
+IN B
-+
+-
A
B
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
CONNECTION DIAGRAMS
5-Pin SC70/SOT-23 8-Pin VSSOP/SOIC 14-Pin TSSOP/SOIC
(LMV931-N) (LMV932-N) (LMV934-N)
Top View Top View Top View
Devices with an asterisk (*) are future products. Please contact the factory for availability.
Automotive Grade (Q) product incorporates enhanced manufacturing and support processes for the automotive
market, including defect detection methodologies. Reliability qualification is compliant with the requirements and
temperature grades defined in the AEC Q100 standard. Automotive Grade products are identified with the letter
Q. Fully compliant PPAP documentation is available. For more information go to
http://www.ti.com/lsds/ti/apps/automotive/end_equipment.page.
Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
01 2 3456
SUPPLY VOLTAGE (V)
20
25
30
35
40
45
OUTPUT VOLTAGE PROXIMITY TO
SUPPLY VOLTAGE (mV ABSOLUTE VALUE)
RL = 2k:
NEGATIVE SWING
POSITIVE SWING
ISINK (mA)
0.001 0.01 0.1 110
0.01
0.1
1
10
100
OUTPUT VOLTAGE REF TO GND (V)
VS = 5V
VS = 2.7V
VS = 1.8V
0123456
SUPPLY VOLTAGE (V)
60
70
80
90
100
110
120
130
140
OUTPUT VOLTAGE PROXIMITY TO SUPPLY
VOLTAGE (mV ABSOLUTE VALUE)
NEGATIVE SWING
POSITIVE SWING
RL = 600:
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (éA)
160
140
120
100
80
60
40
20
00123456
125°C
25°C -40°C
85°C
0.001 0.01 0.1 1 10
0.01
0.1
1
10
100
ISOURCE (mA)
OUTPUT VOLTAGE REFERENCED TO V+ (V)
VS = 5V
VS = 1.8V
VS = 2.7V
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
www.ti.com
Typical Performance Characteristics
Unless otherwise specified, VS= +5V, single supply, TA= 25°C.
Supply Current vs. Supply Voltage (LMV931-N) Sourcing Current vs. Output Voltage
Figure 1. Figure 2.
Sinking Current vs. Output Voltage Output Voltage Swing vs. Supply Voltage
Figure 3. Figure 4.
Output Voltage Swing vs. Supply Voltage Gain and Phase vs. Frequency
Figure 5. Figure 6.
10 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
FREQUENCY (Hz)
INPUT VOLTAGE NOISE (nV/ Hz)
1000
100
10
10 100 1k 10k 100k
10 100 1k 10k
FREQUENCY (Hz)
30
40
50
60
70
80
90
100
PSRR (dB)
+PSRR
-PSRR
VS = 5V
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
Typical Performance Characteristics (continued)
Unless otherwise specified, VS= +5V, single supply, TA= 25°C.
Gain and Phase vs. Frequency Gain and Phase vs. Frequency
Figure 7. Figure 8.
Gain and Phase vs. Frequency CMRR vs. Frequency
Figure 9. Figure 10.
PSRR vs. Frequency Input Voltage Noise vs. Frequency
Figure 11. Figure 12.
Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
(50 mV/DIV)
TIME (2.5 Ps/DIV)
OUTPUT SIGNAL
VS = 1.8V
RL = 2 k:
INPUT SIGNAL
(50 mV/DIV)
TIME (2.5 Ps/DIV)
OUTPUT SIGNAL
VS = 2.7V
RL = 2 k:
INPUT SIGNAL
10 100 1k 10k 100k
FREQUENCY (Hz)
0.01
0.1
1
10
THD (%)
1.8V
2.7V
5V
RL = 600:
AV = +10
0123456
0.25
0.3
0.35
0.45
0.5
SLEW RATE (V/Ps)
SUPPLY VOLTAGE (V)
0.4
RL = 2k:
AV = +1
VIN = 1VPP
FALLING EDGE
RISING EDGE
FREQUENCY (Hz)
INPUT CURRENT NOISE (pA/ Hz)
1
0.1
0.01
10 100 1k 10k 100k
10 100 1k 10k 100k
FREQUENCY (Hz)
0.01
0.1
1
10
THD (%)
1.8V
2.7V
5V
RL = 600:
AV = +1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
www.ti.com
Typical Performance Characteristics (continued)
Unless otherwise specified, VS= +5V, single supply, TA= 25°C.
Input Current Noise vs. Frequency THD vs. Frequency
Figure 13. Figure 14.
THD vs. Frequency Slew Rate vs. Supply Voltage
Figure 15. Figure 16.
Small Signal Non-Inverting Response Small Signal Non-Inverting Response
Figure 17. Figure 18.
12 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
-40 10 60 110
0
10
20
30
40
50
60
70
80
90
SHORT CIRCUIT CURRENT (mA)
TEMPERATURE
C)
2.7V
1.8V
5V
-40 10 60 110
0
10
20
30
40
50
60
70
80
90
SHORT CIRCUIT CURRENT (mA)
TEMPERATURE
C)
2.7V
1.8V
5V
TIME (10 Ps/DIV)
VIN
VOUT
VS = 2.7V
RL = 2 k:
AV = +1
(1.35V/DIV)
(2.5 V/div)
TIME (10 Ps/div)
VIN
VOUT
VS = 5.0V
RL = 2k:
AV = +1
(50 mV/DIV)
TIME (2.5 Ps/DIV)
OUTPUT SIGNAL
VS = 5V
RL = 2 k:
INPUT SIGNAL
(900 mV/div)
TIME (10 Ps/div)
VIN
VOUT
VS = 1.8V
RL = 2k:
AV = +1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
Typical Performance Characteristics (continued)
Unless otherwise specified, VS= +5V, single supply, TA= 25°C.
Small Signal Non-Inverting Response Large Signal Non-Inverting Response
Figure 19. Figure 20.
Large Signal Non-Inverting Response Large Signal Non-Inverting Response
Figure 21. Figure 22.
Short Circuit Current
vs.
Temperature (Sinking) Short Circuit Current vs. Temperature (Sourcing)
Figure 23. Figure 24.
Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
-0.4 0.6 1.6 2.6 3.6 4.6 5.6
VCM (V)
-1
-0.5
0
0.5
1
1.5
2
2.5
3
VOS (mV)
VS = 5V
125°C 85°C25°C
-40°C
-0.4 00.4 0.8 1.2 1.6 22.4
-1
-0.5
0
0.5
1
1.5
2
2.5
3
VOS (mV)
VCM (V)
VS = 1.8V
125°C
25°C
85°C
-40°C
-0.4 0.1 0.6 1.1 1.6 2.1 2.6 3.1
-1
-0.5
0
0.5
1
1.5
2
2.5
3
VOS (mV)
VCM (V)
VS = 2.7V
125°C
25°C
85°C
-40°C
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
www.ti.com
Typical Performance Characteristics (continued)
Unless otherwise specified, VS= +5V, single supply, TA= 25°C.
Offset Voltage vs. Common Mode Range Offset Voltage vs. Common Mode Range
Figure 25. Figure 26.
Offset Voltage vs. Common Mode Range
Figure 27.
14 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
APPLICATION NOTE
INPUT AND OUTPUT STAGE
The rail-to-rail input stage of this family provides more flexibility for the designer. The LMV931-N/LMV932-
N/LMV934-N use a complimentary PNP and NPN input stage in which the PNP stage senses common mode
voltage near Vand the NPN stage senses common mode voltage near V+. The transition from the PNP stage to
NPN stage occurs 1V below V+. Since both input stages have their own offset voltage, the offset of the amplifier
becomes a function of the input common mode voltage and has a crossover point at 1V below V+.
This VOS crossover point can create problems for both DC and AC coupled signals if proper care is not taken.
Large input signals that include the VOS crossover point will cause distortion in the output signal. One way to
avoid such distortion is to keep the signal away from the crossover. For example, in a unity gain buffer
configuration and with VS= 5V, a 5V peak-to-peak signal will contain input-crossover distortion while a 3V peak-
to-peak signal centered at 1.5V will not contain input-crossover distortion as it avoids the crossover point.
Another way to avoid large signal distortion is to use a gain of 1 circuit which avoids any voltage excursions at
the input terminals of the amplifier. In that circuit, the common mode DC voltage can be set at a level away from
the VOS cross-over point. For small signals, this transition in VOS shows up as a VCM dependent spurious signal in
series with the input signal and can effectively degrade small signal parameters such as gain and common mode
rejection ratio. To resolve this problem, the small signal should be placed such that it avoids the VOS crossover
point. In addition to the rail-to-rail performance, the output stage can provide enough output current to drive 600
loads. Because of the high current capability, care should be taken not to exceed the 150°C maximum junction
temperature specification.
INPUT BIAS CURRENT CONSIDERATION
The LMV931-N/LMV932-N/LMV934-N family has a complementary bipolar input stage. The typical input bias
current (IB) is 15nA. The input bias current can develop a significant offset voltage. This offset is primarily due to
IBflowing through the negative feedback resistor, RF. For example, if IBis 50nA and RFis 100k, then an offset
voltage of 5mV will develop (VOS = IBx RF). Using a compensation resistor (RC), as shown in Figure 28, cancels
this effect. But the input offset current (IOS) will still contribute to an offset voltage in the same manner.
Figure 28. Canceling the Offset Voltage due to Input Bias Current
Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
www.ti.com
TYPICAL APPLICATIONS
HIGH SIDE CURRENT SENSING
The high side current sensing circuit (Figure 29) is commonly used in a battery charger to monitor charging
current to prevent over charging. A sense resistor RSENSE is connected to the battery directly. This system
requires an op amp with rail-to-rail input. The LMV931-N/LMV932-N/LMV934-N are ideal for this application
because its common mode input range goes up to the rail.
Figure 29. High Side Current Sensing
HALF-WAVE RECTIFIER WITH RAIL-TO-GROUND OUTPUT SWING
Since the LMV931-N/LMV932-N/LMV934-N input common mode range includes both positive and negative
supply rails and the output can also swing to either supply, achieving half-wave rectifier functions in either
direction is an easy task. All that is needed are two external resistors; there is no need for diodes or matched
resistors. The half wave rectifier can have either positive or negative going outputs, depending on the way the
circuit is arranged.
In Figure 30 the circuit is referenced to ground, while in Figure 31 the circuit is biased to the positive supply.
These configurations implement the half wave rectifier since the LMV931-N/LMV932-N/LMV934-N can not
respond to one-half of the incoming waveform. It can not respond to one-half of the incoming because the
amplifier can not swing the output beyond either rail therefore the output disengages during this half cycle.
During the other half cycle, however, the amplifier achieves a half wave that can have a peak equal to the total
supply voltage. RIshould be large enough not to load the LMV931-N/LMV932-N/LMV934-N.
Figure 30. Half-Wave Rectifier with Rail-To-Ground Output Swing Referenced to Ground
16 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
Figure 31. Half-Wave Rectifier with Negative-Going Output Referenced to VCC
INSTRUMENTATION AMPLIFIER WITH RAIL-TO-RAIL INPUT AND OUTPUT
Some manufactures make a non-“rail-to-rail”-op amp rail-to-rail by using a resistive divider on the inputs. The
resistors divide the input voltage to get a rail-to-rail input range. The problem with this method is that it also
divides the signal, so in order to get the obtained gain, the amplifier must have a higher closed loop gain. This
raises the noise and drift by the internal gain factor and lowers the input impedance. Any mismatch in these
precision resistors reduces the CMRR as well. The LMV931-N/LMV932-N/LMV934-N is rail-to-rail and therefore
doesn’t have these disadvantages.
Using three of the LMV931-N/LMV932-N/LMV934-N amplifiers, an instrumentation amplifier with rail-to-rail inputs
and outputs can be made as shown in Figure 32.
In this example, amplifiers on the left side act as buffers to the differential stage. These buffers assure that the
input impedance is very high and require no precision matched resistors in the input stage. They also assure that
the difference amp is driven from a voltage source. This is necessary to maintain the CMRR set by the matching
R1-R2with R3-R4. The gain is set by the ratio of R2/R1and R3should equal R1and R4equal R2. With both rail-to-
rail input and output ranges, the input and output are only limited by the supply voltages. Remember that even
with rail-to-rail outputs, the output can not swing past the supplies so the combined common mode voltages plus
the signal should not be greater that the supplies or limiting will occur. For additional applications, see Texas
Instruments application notes AN–29 (SNOA625), AN–31 (SNLA140), AN–71 (SNOA652), and AN–127
(SNVA516).
Figure 32. Rail-to-rail Instrumentation Amplifier
Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
www.ti.com
Simplified Schematic
18 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993M NOVEMBER 2001REVISED NOVEMBER 2013
REVISION HISTORY
Changes from Revision L (MARCH 2013) to Revision M Page
Added NEW Q VERSIONS ................................................................................................................................................... 1
Added NEW LIST ITEM ........................................................................................................................................................ 1
Added Output Swing for Q-Grade in all Electrical Tables .................................................................................................... 3
Added Output Swing for Q-Grade in all Electrical Tables .................................................................................................... 4
Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
PACKAGE OPTION ADDENDUM
www.ti.com 1-Dec-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LMV931MF NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 125 A79A
LMV931MF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 A79A
LMV931MFX NRND SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 125 A79A
LMV931MFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 A79A
LMV931MG NRND SC70 DCK 5 1000 TBD Call TI Call TI -40 to 125 A74
LMV931MG/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 A74
LMV931MGX/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 A74
LMV931Q1MF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ALAA
LMV931Q1MFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ALAA
LMV931Q1MG/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 BBA
LMV931Q1MGX/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 BBA
LMV932MA NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 LMV9
32MA
LMV932MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV9
32MA
LMV932MAX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 125 LMV9
32MA
LMV932MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV9
32MA
LMV932MM NRND VSSOP DGK 8 1000 TBD Call TI Call TI -40 to 125 A86A
LMV932MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 A86A
LMV932MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 A86A
LMV932Q1MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV93
2Q1MA
PACKAGE OPTION ADDENDUM
www.ti.com 1-Dec-2013
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LMV932Q1MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV93
2Q1MA
LMV934MA NRND SOIC D 14 55 TBD Call TI Call TI -40 to 125 LMV934MA
LMV934MA/NOPB ACTIVE SOIC D 14 55 Green (RoHS
& no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 125 LMV934MA
LMV934MAX NRND SOIC D 14 2500 TBD Call TI Call TI -40 to 125 LMV934MA
LMV934MAX/NOPB ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 125 LMV934MA
LMV934MT/NOPB ACTIVE TSSOP PW 14 94 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV93
4MT
LMV934MTX NRND TSSOP PW 14 2500 TBD Call TI Call TI -40 to 125 LMV93
4MT
LMV934MTX/NOPB ACTIVE TSSOP PW 14 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV93
4MT
LMV934Q1MA/NOPB PREVIEW SOIC D 14 TBD Call TI Call TI -40 to 125
LMV934Q1MT/NOPB PREVIEW TSSOP PW 14 TBD Call TI Call TI -40 to 125
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
PACKAGE OPTION ADDENDUM
www.ti.com 1-Dec-2013
Addendum-Page 3
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1, LMV934-N, LMV934-N-Q1 :
Catalog: LMV931-N, LMV932-N, LMV934-N
Automotive: LMV931-N-Q1, LMV932-N-Q1, LMV934-N-Q1
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LMV931MF SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV931MF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV931MFX SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV931MFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV931MG SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV931MG/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV931MGX/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV931Q1MF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV931Q1MFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV931Q1MG/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV931Q1MGX/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV932MAX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LMV932MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LMV932MM VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LMV932MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LMV932MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LMV932Q1MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LMV934MAX SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Nov-2013
Pack Materials-Page 1
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LMV934MAX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1
LMV934MTX TSSOP PW 14 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.0 Q1
LMV934MTX/NOPB TSSOP PW 14 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.0 Q1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LMV931MF SOT-23 DBV 5 1000 210.0 185.0 35.0
LMV931MF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0
LMV931MFX SOT-23 DBV 5 3000 210.0 185.0 35.0
LMV931MFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0
LMV931MG SC70 DCK 5 1000 210.0 185.0 35.0
LMV931MG/NOPB SC70 DCK 5 1000 210.0 185.0 35.0
LMV931MGX/NOPB SC70 DCK 5 3000 210.0 185.0 35.0
LMV931Q1MF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0
LMV931Q1MFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0
LMV931Q1MG/NOPB SC70 DCK 5 1000 210.0 185.0 35.0
LMV931Q1MGX/NOPB SC70 DCK 5 3000 210.0 185.0 35.0
LMV932MAX SOIC D 8 2500 367.0 367.0 35.0
LMV932MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LMV932MM VSSOP DGK 8 1000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Nov-2013
Pack Materials-Page 2
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LMV932MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0
LMV932MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0
LMV932Q1MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LMV934MAX SOIC D 14 2500 367.0 367.0 35.0
LMV934MAX/NOPB SOIC D 14 2500 367.0 367.0 35.0
LMV934MTX TSSOP PW 14 2500 367.0 367.0 35.0
LMV934MTX/NOPB TSSOP PW 14 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Nov-2013
Pack Materials-Page 3
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