© Semiconductor Components Industries, LLC, 2014
September, 2014 − Rev. 3 1Publication Order Number:
NVMFD5873NL/D
NVMFD5873NL
Power MOSFET
60 V, 13 mW, 58 A, Dual N−Channel Logic
Level, Dual SO−8FL
Features
Small Footprint (5x6 mm) for Compact Designs
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
NVMFD5873NLWF − Wettable Flanks Option for Enhanced Optical
Inspection
AEC−Q101 Qualified and PPAP Capable
This is a Pb−Free Device
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter Symbol Value Unit
Drain−to−Source Voltage VDSS 60 V
Gate−to−Source Voltage VGS "20 V
Continuous Drain Cur
-
rent RYJ−mb (Notes 1,
2, 3, 4) Steady
State
Tmb = 25°CID58 A
Tmb = 100°C 41
Power Dissipation
RYJ−mb (Notes 1, 2, 3
)
Tmb = 25°CPD107 W
Tmb = 100°C 54
Continuous Drain Cur
-
rent RqJA (Notes 1, 3
& 4) Steady
State
TA = 25°CID10 A
TA = 100°C 7.0
Power Dissipation
RqJA (Notes 1 & 3) TA = 25°CPD3.1 W
TA = 100°C 1.6
Pulsed Drain Current TA = 25°C, tp = 10 msIDM 190 A
Operating Junction and Storage Temperature TJ, Tstg 55 to
175 °C
Source Current (Body Diode) IS58 A
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VGS = 10 V, IL(pk) = 28.3 A,
L = 0.1 mH, RG = 25 W)
EAS 40 mJ
Lead Temperature for Soldering Purposes
(1/8 from case for 10 s) TL260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be af fected.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter Symbol Value Unit
Junction−to−Mounting Board (top) − Steady
State (Notes 2, 3) RYJ−mb 1.4
°C/W
Junction−to−Ambient − Steady State (Note 3) RqJA 48
1. The e ntire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second are higher but are dependent
on pulse duration and duty cycle.
ORDERING INFORMATION
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Device Package Shipping
V(BR)DSS RDS(on) MAX ID MAX
60 V 13 mW @ 10 V 58 A
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
DFN8 5x6
(SO8FL)
CASE 506BT
MARKING DIAGRAM
16.5 mW @ 4.5 V
NVMFD5873NLT1G DFN8
(Pb−Free) 1500 / Tape &
Reel
5873NL = Specific Device Code
for NVMFD5873NL
5873LW = Specific Device Code
for NVMFD5873NLWF
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
D1
D1
D2
D2
S1
G1
S2
G2
Dual N−Channel
D1
S1
G1
5873xx
AYWZZ
1
D2
D1
D2
S2
G2
D2
D1
NVMFD5873NLWFT1G DFN8
(Pb−Free) 1500 / Tape &
Reel
NVMFD5873NL
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2
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA60 V
Drain−to−Source Breakdown Voltage
Temperature Coefficient V(BR)DSS/TJ54.9 mV/°C
Zero Gate Voltage Drain Current IDSS VGS = 0 V,
VDS = 60 V TJ = 25°C 1.0 mA
TJ = 125°C 100
Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = ±20 V ±100 nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 mA1.5 2.5 V
Threshold Temperature Coefficient VGS(TH)/TJ−5.8 mV/°C
Drain−to−Source On Resistance RDS(on) VGS = 10 V, ID = 15 A 10.7 13 mW
VGS = 4.5 V, ID = 10 A 13.6 16.5
Forward Transconductance gFS VDS = 5.0 V, ID = 15 A 15 S
CHARGES AND CAPACITANCES
Input Capacitance Ciss
VGS = 0 V, f = 1.0 MHz, VDS = 25 V
1560 pF
Output Capacitance Coss 145
Reverse Transfer Capacitance Crss 98
Total Gate Charge QG(TOT)
VGS = 4.5 V, VDS = 48 V,
ID = 15 A
16.5 nC
Threshold Gate Charge QG(TH) 1.3
Gate−to−Source Charge QGS 4.0
Gate−to−Drain Charge QGD 8.8
Total Gate Charge QG(TOT) VGS = 10 V, VDS = 48V, ID = 15 A 30.5 nC
SWITCHING CHARACTERISTICS (Note 6)
T urn−On Delay Time td(on)
VGS = 4.5 V, VDS = 48 V,
ID = 15 A, RG = 2.5 W
10.8 ns
Rise Time tr51
T urn−Off Delay Time td(off) 21
Fall Time tf42.6
T urn−On Delay Time td(on)
VGS = 10 V, VDS = 48 V,
ID = 15 A, RG = 2.5 W
9.5 ns
Rise Time tr13
T urn−Off Delay Time td(off) 25
Fall Time tf6.6
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage VSD VGS = 0 V,
IS = 15 A TJ = 25°C 0.8 1.0 V
TJ = 125°C 0.7
Reverse Recovery Time tRR
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 15 A
22.4 ns
Charge Time ta14.5
Discharge Time tb9.0
Reverse Recovery Charge QRR 18 nC
5. Pulse Test: pulse width = 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
NVMFD5873NL
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3
TYPICAL CHARACTERISTICS
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 3. On−Resistance vs. VGS Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
Figure 5. On−Resistance Variation with
Temperature Figure 6. Drain−to−Source Leakage Current
vs. Voltage
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
3.4 V
VGS = 3.0 V
10 V VDS 10 V
TJ = 25°C
TJ = 125°CTJ = −55°C
ID = 15 A
TJ = 25°C
VGS = 4.5 V
TJ = 25°C
VGS = 10 V
ID = 15 A
VGS = 10 V VGS = 0 V
TJ = 150°C
TJ = 25°C
3.8 V
TJ = 125°C
4.5 V
IDDS, LEAKAGE (nA)
0
20
40
60
80
0.0 1.0 2.0 3.0 4.0 5.0 0
20
40
60
80
2.0 2.5 3.0 3.5 4.0 4.5
0.005
0.010
0.015
0.020
0.025
2345678910
0.0050
0.0075
0.0100
0.0125
0.0150
0.0175
0.0200
5 1015202530
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
−50 25 0 25 50 75 100 125 150 175 100
1000
10000
100000
10 20 30 40 50 60
NVMFD5873NL
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4
TYPICAL CHARACTERISTICS
Qgs
Figure 7. Capacitance Variation Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current
RG, GATE RESISTANCE (W)VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1001010.1
0.1
1
10
C, CAPACITANCE (pF)
VGS, GATE−TO−SOURCE VOLTAGE (V)
t, TIME (ns)
IS, SOURCE CURRENT (A)
ID, DRAIN CURRENT (A)
VGS = 0 V
TJ = 25°C
Ciss
Coss
Crss
VDS = 48 V
ID = 15 A
VGS = 10 V
td(on)
tr
tf
TJ = 25°C
VGS = 0 V
NVMFD5873NL
FBSOA
TA = 25°C, 650 mm2,
2 oz Cu Pad, VGS = 10 V
0.1 ms
10 ms
1 ms
TJ = 25°C
VDS = 48 V
ID = 15 A
0.01 ms
td(off)
100
Qgd
0
500
1000
1500
2000
0 102030405060 0
2
4
6
8
10
0 5 10 15 20 25 30 35
QT
1
10
100
1000
1 10 100 0
10
20
30
40
50
60
70
80
0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00
NVMFD5873NL
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5
TYPICAL CHARACTERISTICS
Figure 12. Thermal Response
PULSE TIME (sec)
R(t) (°C/W)
10%
Duty Cycle = 50%
20%
5%
2%
1%
Single Pulse
0.01
0.1
1
10
100
0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
NVMFD5873NL
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6
PACKAGE DIMENSIONS
DFN8 5x6, 1.27P Dual Flag (SO8FL−Dual)
CASE 506BT
ISSUE E
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
1.27
0.75
1.40
3.70
4.56
8X
PITCH
6.59
4.84
1.00
DIMENSION: MILLIMETERS
2.30
4X
0.70
5.55
4X
0.56
2X
2.08
2X
M3.25
h−−−
3.50
−−−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED
BETWEEN 0.15 AND 0.30 MM FROM THE TERMINAL TIP.
4. PROFILE TOLERANCE APPLIES TO THE EXPOSED PAD AS WELL
AS THE TERMINALS.
5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
6. SEATING PLANE IS DEFINED BY THE TERMINALS. A1 IS DEFINED
AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
7. A VISUAL INDICATOR FOR PIN 1 MUST BE LOCATED IN THIS ARE
A.
1234
56
TOP VIEW
SIDE VIEW
BOTTOM VIEW
D1
E1 h
D
E
B
A
0.20 C
0.20 C
2X
2X
DIM MINMILLIMETERS
A0.90
A1 −−−
b0.33
c0.20
D5.15 BSC
D1 4.70
D2 3.90
E6.15 BSC
E1 5.70
E2 3.90
e1.27 BSC
G0.45
K0.51
L0.48
A
0.10 C
0.10 C
14
8
e
8X
D2
b1 E2
b
A0.10 B
C
0.05 C
L
DETAIL A
A1
c
4X
5
MAX
−−−
−−−
0.42
−−−
4.90
4.10
5.90
4.15
0.55
−−−
0.61
M
N1.80 2.00
78
N
PIN ONE
IDENTIFIER
NOTE 7
NOTE 4 CSEATING
PLANE
DET AIL A NOTE 6
4X
K
NOTE 3
D3 1.50 1.70
b1 0.33 0.42
ÉÉÉ
ÉÉÉ
ÉÉÉ
4X
D3
G
4X
DETAIL B
DETAIL B
ALTERNATE
CONSTRUCTION
K1 0.56 −−−
K1
3.75
12
_
MAX
1.10
0.05
0.51
0.33
5.10
4.30
6.10
4.40
0.65
−−−
0.71
2.20
1.90
0.51
−−−
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