MIC2174/MIC2174C
Synchronous Buck Controller
Featuring Adaptive On-Time Control
40V Input, 300kHz
Hyper Speed Control™ Family
Hyper Speed Control and Any Capacitor are trademarks of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
General Description
The Micrel MIC2174/MIC2174C is a fixed-frequency,
synchronous buck controller featuring adaptive on-time
control. The MIC2174/MIC2174C operates over an input
supply range of 3V to 40V at a fixed switching frequency of
300kHz and is capable of driving 25A of output current.
The output voltage is adjustable down to 0.8V.
A unique Hyper Speed Control™ architecture allows for
ultra-fast transient response while reducing the output
capacitance. It also makes ultra-fast transient response
while reducing the output capacitance and also allows for
extremely low duty-cycle operation. The MIC2174 /
MIC2174C utilizes an adaptive TON ripple controlled
architecture. A UVLO is provided to ensure proper
operation under power-sag conditions to prevent the
external power MOSFET from overheating. A soft-start is
provided to reduce inrush current. Foldback current limit
and “hiccup” mode short-circuit protection ensure FET and
load protection.
The MIC2174/MIC2174C is available in a 10-pin MSOP
(MAX1954A-compatible) package with an operating
junction temperature range from –40°C to +125°C.
All support documentation can be found on Micrel’s web
site at: www.micrel.com.
Features
• Hyper Speed Control™ architecture enables:
– High delta V operation (VHSD = 40V and VOUT = 0.8V)
– Smaller output capacitors than competitors
• 3V to 40V input voltage
• Any CapacitorTM stable
- Zero ESR to high ESR
• 300kHz switching frequency
• Adjustable output from 0.8V to 5.5V (VHSD 28V)
• Adjustable output from 0.8V to 3.6V (VHSD > 28V)
• ±1% FB accuracy (MIC2174)
• ±3% FB accuracy (MIC2174C)
• Up to 94% efficiency
• Foldback current limit and “hiccup” mode short-circuit
protection
• Thermal shutdown
• Safe start-up into pre-biased loads
• –40°C to +125°C junction temperature range
Applications
• Telecom Networking
• Industrial Equipment
• Distributed DC power systems
____________________________________________________________________________________________________________
Typical Application
Synchronous Buck Controller Featuring Adaptive On-Time Control
12V to 3.3V Efficiency
50
55
60
65
70
75
80
85
90
95
100
02468
OUTPUT CURRENT (A)
EFFI CIENCY (% )
10
VIN=5V
September 2010 M9999-091310-C
Micrel, Inc. MIC2174/MIC2174C
September 2010 2 M9999-091310-C
Ordering Information
Part Number Voltage Accuracy Switching Frequency Junction Temperature
Range Package Lead Finish
MIC2174-1YMM Adj. ±1% 300kHz –40° to +125°C 10-Pin MSOP Pb-Free
MIC2174C-1YMM Adj. ±3% 270kHz –40° to +125°C 10-Pin MSOP Pb-Free
Pin Configur ation
10-Pin MSOP (MM)
Pin Description
Pin Number Pin Name Pin Function
1 HSD
High-Side N-MOSFET Drain Connection (input): Power to the drain of the external high-side N-
channel MOSFET. The HSD operating voltage range is from 3V to 40V. Input capacitors between
HSD and the power ground (PGND) are required.
2 EN
Enable (input): A logic level control of the output. The EN pin is CMOS-compatible. Logic high or
floating = enable, logic low = shutdown. In the off state, supply current of the device is greatly reduced
(typically 0.8mA).
3 FB
Feedback (input): Input to the transconductance amplifier of the control loop. The FB pin is regulated
to 0.8V. A resistor divider connecting the feedback to the output is used to adjust the desired output
voltage.
4 GND
Signal ground. GND is the ground path for the device input voltage VIN and the control circuitry. The
loop for the signal ground should be separate from the power ground (PGND) loop.
5 IN
Input Voltage (input): Power to the internal reference and control sections of the MIC2174/MIC2174C.
The IN operating voltage range is from 3V to 5.5V. A 2.2µF ceramic capacitors from IN to GND are
recommended for clean operation. VIN must be powered up no earlier than VHSD to make the soft-start
function behavior correctly.
6 DL
Low-Side Drive (output): High-current driver output for external low-side MOSFET. The DL driving
voltage swings from ground to IN.
7 PGND
Power Ground. PGND is the ground path for the MIC2174/MIC2174C buck converter power stage.
The PGND pin connects to the sources of low-side N-Channel MOSFETs, the negative terminals of
input capacitors, and the negative terminals of output capacitors. The loop for the power ground
should be as small as possible and separate from the Signal ground (GND) loop.
8 DH
High-Side Drive (output): High-current driver output for external high-side MOSFET. The DH driving
voltage is floating on the switch node voltage (LX). It swings from ground to VIN minus the diode drop.
Adding a small resistor between DH pin and the gate of the high-side N-channel MOSFETs can slow
down the turn-on and turn-off time of the MOSFETs.
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September 2010 3 M9999-091310-C
Pin Description (Continued)
Pin Number Pin Name Pin Function
9 LX
Switch Node and Current Sense input: High current output driver return. The LX pin connects directly
to the switch node. Due to the high speed switching on this pin, the LX pin should be routed away
from sensitive nodes.
LX pin also senses the current by monitoring the voltage across the low-side MOSFET during OFF
time. In order to sense the current accurately, connect the low-side MOSFET drain to LX using a
Kelvin connection.
10 BST
Boost (output): Bootstrapped voltage to the high-side N-channel MOSFET driver. A Schottky diode is
connected between the IN pin and the BST pin. A boost capacitor of 0.1F is connected between the
BST pin and the LX pin. Adding a small resistor in series with the boost capacitor can slow down the
turn-on time of high-side N-Channel MOSFETs.
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September 2010 4 M9999-091310-C
Absolute Maximum Ratings(1)
IN, FB, EN to GND .......................................... −0.3V to +6V
BST to LX ........................................................ −0.3V to +6V
BST to GND .................................................. −0.3V to +46V
DH to LX............................................−0.3V to (VBST + 0.3V)
DL, COMP to GND.............................. −0.3V to (VIN + 0.3V)
HSD to GND.................................................... −0.3V to 42V
PGND to GND.............................................. −0.3V to +0.3V
Junction Temperature .............................................. +150°C
Storage Temperature (TS).........................−65°C to +150°C
Lead Temperature (soldering, 10sec)........................ 260°C
Operating Ratings(2)
Input Voltage (VIN)............................................ 3.0V to 5.5V
Supply Voltage (VHSD) ....................................... 3.0V to 40V
Junction Temperature (TJ) ........................ −40°C to +125°C
Junction Thermal Resistance
MSOP (θJA) ..................................................130.5°C/W
Continuous Power Dissipation (TA = 70°C) .......421mW
(derate 5.6mW/°C above 70°C)
.
Electrical Characteristics(4)
VBST − VLX = 5V; TA = 25°C, unless noted. Bold values indicate −40°C TJ +125°C.
Parameter Condition Min. Typ. Max. Units
General
Operating Input Voltage (VIN) (5) 3.0 5.5 V
HSD Voltage Range (VHSD) 3.0 40 V
Quiescent Supply Current (VFB = 1.5V, output switching but excluding external
MOSFET gate current) 1.4
3.0 mA
Standby Supply Current VIN = VBST = 5.5V, VHSD = 40V, LX = unconnected, EN =
GND (6) 0.8
2 mA
Undervoltage Lockout Trip Level 2.4 2.7 3 V
UVLO Hysteresis 50 mV
DC-DC Controller
3.0V ≤ VHSD ≤ 28V 0.8 5.5
Output-Voltage Adjust Range (VOUT) 28V < VHSD ≤ 40V 0.8 3.6 V
Error Amplifier
0°C TJ 85°C (MIC2174) -1 1
−40°C TJ 125°C (MIC2174) -2 2
FB Regulation Voltage
TJ = 25°C (MIC2174C) -3 3
%
FB Input Leakage Current 5 500 nA
VFB = 0.8V (MIC2174) 103 130 162
VFB = 0V (MIC2174) 19 48 77
VFB = 0.8V(MIC2174C) 95 130 170
Current-Limit Threshold
VFB = 0V (MIC2174C) 15 48 80
mV
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guaranteed to function outside its operating rating.
3. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
4. Specification for packaged product only.
5. The application is fully functional at low IN (supply of the control section) if the external MOSFETs have enough low voltage VTH.
6. The current will come only from the internal 100k pull-up resistor sitting on the EN Input and tied to IN.
Micrel, Inc. MIC2174/MIC2174C
September 2010 5 M9999-091310-C
Electrical Characteristics(4)
VBST − VLX = 5V; TA = 25°C, unless noted. Bold values indicate −40°C TJ +125°C.
Parameter Condition Min. Typ. Max. Units
Soft-Start
Soft-Start Period 6 ms
Oscillator
MIC2174 0.225 0.3 0.375
Switching Frequency MIC2174C 0.202 0.27 0.338 MHz
Measured at DH (7) 87
Maximum Duty Cycle MIC2174C 87 %
Minimum Duty Cycle Measured at DH, VFB = 1V 0 %
FET Drives
DH, DL Output Low Voltage ISINK = 10mA 0.1 V
DH, DL Output High Voltage ISOURCE = 10mA
VIN-0.1V
or
VBST-0.1V
V
DH On-Resistance, High State 2.1 3.3
DH On-Resistance, Low State 1.8 3.3
DL On-Resistance, High State
1.8 3.3
DL On-Resistance, Low State
1.2 2.3
LX Leakage Current VLX = 40V, VIN = 5.5V,VBST = 45.5V 55 µA
HSD Leakage Current VLX = 40V, VIN = 5.5V,VBST = 45.5V 21 µA
Thermal Protection
Over-Temperature Shutdown 155 °C
Over-Temperature Shutdown
Hysteresis 10 °C
Shutdown Control
EN Logic Level Low 3V < VIN <5.5V 0.4 0.8 V
EN Logic Level High 3V < VIN <5.5V 0.9 1.2 V
EN Pull-Up Current 50
µA
Note:
7. The maximum duty cycle is limited by the fixed mandatory off time TOFF of typical 363ns.
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September 2010 6 M9999-091310-C
Typical Characteristics
12V to 3.3V Efficiency
50
55
60
65
70
75
80
85
90
95
100
02468
OUTPUT CURRENT (A)
EFFICIENCY (%)
10
VIN=5V
24V to 1.8V Efficiency
40
45
50
55
60
65
70
75
80
85
90
02468
OUTPUT CURRENT (A)
EFFICIENCY (%)
10
VIN=5V
24V to 3.3V Efficiency
40
45
50
55
60
65
70
75
80
85
90
02468
OUTPUT CURRENT (A)
EFFICIENCY (%)
10
VIN=5V
Feedback Voltage vs . Load
0.75
0.76
0.77
0.78
0.79
0.80
0.81
0.82
0.83
0.84
0.85
02468
OUTPUT CURRENT (A)
FEEDBACK VOLT AGE (V
10
)
VIN=5V
Feedback Voltage
vs. Input Voltage
0.75
0.76
0.77
0.78
0.79
0.80
0.81
0.82
0.83
0.84
0.85
3 3.5 4 4.5 5 5.5
INPUT V OLTAGE (V)
FEEDBACK VOLT AGE (V
)
Feedback Voltage
vs. HSD Voltage
0.75
0.76
0.77
0.78
0.79
0.80
0.81
0.82
0.83
0.84
0.85
3 7 11 15 19 23 27 31 35 39
HSD VOLTAGE (V )
FEEDBACK VOLT AGE ( V
)
VIN=5V
Feedback Voltage
vs. Te mperature
0.790
0.792
0.794
0.796
0.798
0.800
0.802
0.804
0.806
0.808
0.810
-40-20 0 20406080100120
TEMPERATURE (°C)
FEEDBACK VOLT AGE (V
)
VIN=5V
Switching Frequency
vs. Load
250
260
270
280
290
300
310
320
330
340
350
02468
OUTPUT CURRENT (A)
SWI TCHING FREQUENCY ( kHz)
10
VHSD=24V
VIN=5V
VOUT=3.3V
Switching Frequenc y
vs. Input Voltage
250
260
270
280
290
300
310
320
330
340
350
33.5 44.5 55
INPUT V OLTAGE (V)
SWI TCHING FREQUENCY ( kHz)
.5
VHSD=24V
VOUT=3.3V
Switching Frequency
vs. HSD Voltage
250
260
270
280
290
300
310
320
330
340
350
3 7 11 15 19 23 27 31 35 39
HSD VOLTAGE (V)
SWI TCHING FREQUENCY ( kHz)
VIN=5V
VOUT=1.8V
Switching Frequency
vs. Tem perature
250
260
270
280
290
300
310
320
330
340
350
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
SWI TCHING FREQUENCY ( kHz)
VIN=5V
Current Limit Threshold vs.
Feedback Voltage Percentage
0
15
30
45
60
75
90
105
120
135
150
0 102030405060708090100
Feedback Voltage Percentage (%)
CURRENT L IMIT T HRE S HOL D
(mV)
Micrel, Inc. MIC2174/MIC2174C
September 2010 7 M9999-091310-C
Typical Characteristics (Continued)
Current Limit Threshold
vs. Temperature
0
15
30
45
60
75
90
105
120
135
150
-40-20 0 20406080100120
TEMPERATURE (°C)
CURRENT L IMIT THRE SHOLD
(mV)
VFB=0.8V
VFB=0V
Quies cent Supply Current
vs. Inp ut Voltage
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
33.544.555
INPUT VOLTAGE (V)
QUIESCENT SUPPLY
CURRENT (mA)
.5
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September 2010 8 M9999-091310-C
Functional Characteristics
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September 2010 9 M9999-091310-C
Functional Characteristics (Continued)
IL
(5A/div)
Vout
(1V/div)
Time 100μs/div
Short Circuit
Vhsd=24V
Vin=5V
Vout=1.8V
Iout=5A to short
Micrel, Inc. MIC2174/MIC2174C
September 2010 10 M9999-091310-C
Functional Diagram
Figure 1. MIC2174/MIC2174C Block Diagram
Micrel, Inc. MIC2174/MIC2174C
September 2010 11 M9999-091310-C
Functional Description
The MIC2174/MIC2174C is an adaptive on-time
synchronous buck controller built for low cost and high
performance. It is designed for a wide input voltage
range from 3V to 40V and for high output power buck
converters. An estimated-ON-time method is applied in
MIC2174/MIC2174C to obtain a constant switching
frequency and to simplify the control compensation. The
over-current protection is implemented without the use of
an external sense resistor. It includes an internal soft-
start function which reduces the power supply input
surge current at start-up by controlling the output voltage
rise time.
Theory of Operation
The MIC2174/MIC2174C is an adaptive on-time
synchronous buck controller. Further, Figure 1 illustrates
the block diagram for the control loop. The output
voltage variation will be sensed by the
MIC2174/MIC2174C feedback pin FB via the voltage
divider R1 and R2, and compared to a 0.8V reference
voltage VREF at the error comparator through a low gain
transconductance (gm) amplifier, which improves the
MIC2174/MIC2174C converter output voltage regulation.
If the FB voltage decreases and the output of the gm
amplifier is below 0.8V, then the error comparator will
trigger the control logic and generate an ON-time period,
where in DH pin is logic high and DL pin is logic low. The
ON-time period length is predetermined by the “FIXED
TON ESTIMATION” circuitry:
300kHzV
V
T
HSD
OUT
ed)ON(estimat ×
= (1)
where VOUT is the output voltage, VHSD is the power
stage input voltage.
After an ON-time period, the MIC2174/MIC2174C goes
into the OFF-time period. This is when the DH pin is
logic low and DL pin is logic high. The OFF-time period
length depends upon the FB voltage in most cases.
When the FB voltage decreases and the output of the
gm amplifier is below 0.8V, then the ON-time period is
triggered and the OFF-time period ends. If the OFF-time
period determined by the FB voltage is less than the
minimum OFF time TOFF(min), which is about 363ns
typical, then the MIC2174/MIC2174C control logic will
apply the TOFF(min) instead. TOFF(min) is required to
maintain enough energy in the Boost capacitor (CBST) to
drive the high-side MOSFET.
The maximum duty cycle is obtained from the 363ns
TOFF(min):
SS
OFF(min)S
T
363ns
1
T
TT
Dmax −=
−
=
where Ts = 1/300kHz = 3.33μs. It is not recommended to
use MIC2174/MIC2174C with a OFF-time close to
TOFF(min) during steady-state operation. Also, as VOUT
increases, the internal ripple injection will increase and
reduce the line regulation performance. Therefore, the
maximum output voltage of the MIC2174 should be
limited to 5.5V for up to 28V VHSD and 3.6V for VHSD
higher than 28V. If a higher output voltage is required,
use the MIC2176 instead. Please refer to “Setting Output
Voltage” subsection in “Application Information” for more
details.
The power stage input voltage VHSD is fed into the Fixed
TON Estimation block through a 6:1 divider and 5V
voltage clamper. Therefore, if the VHSD is higher than
30V, then the Fixed TON Estimation block uses 30V to
estimate TON instead of the real VHSD. As a result, the
switching frequency will be less than 300kHz:
300kHz
V
30V
f
HSD
30V)SW(VHDS ×=
> (2)
The estimated ON-time method results in a constant
300kHz switching frequency up to 30V VHSD. The actual
ON-time varies with the different rising and falling times
of the external MOSFETs. Therefore, the type of the
external MOSFETs, the output load current, and the
control circuitry power supply VIN will modify the actual
ON-time and the switching frequency. Also, the minimum
TON results in a lower switching frequency in high VHSD
and low VOUT applications, such as 36V to 1.0V. The
minimum TON measured on the MIC2174/MIC2174C
evaluation board with Si7148DP MOSFETs is about
184ns. During the load transient, the switching frequency
is changed due to the varying OFF time.
To illustrate the control loop, the steady-state scenario
and the load transient scenario are analyzed. For easy
analysis, the gain of the gm amplifier is assumed to be 1.
With this assumption, the inverting input of the error
comparator is the same as the FB voltage. Figure 2
shows the MIC2174/MIC2174C control loop timing
during steady-state operation. During steady-state, the
gm amplifier senses the FB voltage ripple, which is
proportional to the output voltage ripple and the inductor
current ripple, to trigger the ON-time period. The ON-
time is predetermined by the estimation. The ending of
OFF-time is controlled by the FB voltage. At the valley of
Micrel, Inc. MIC2174/MIC2174C
September 2010 12 M9999-091310-C
the FB voltage ripple, which occurs when VFB falls below
VREF, the OFF period ends and the next ON-time period
is triggered through the control logic circuitry.
Figure 2. MIC2174/MIC2174C Control Loop Timing
Figure 3 shows the load transient operation of the
MIC2174/MIC2174C converter. The output voltage drops
due to the sudden load increase, which causes the FB
voltage to be less than VREF. This will cause the error
comparator to trigger an ON-time period. At the end of
the ON-time period, a minimum OFF-time TOFF(min) is
generated to charge CBST since the FB voltage is still
below VREF. Then, the next ON-time period is triggered
due to the low FB voltage. Therefore, the switching
frequency changes during the load transient. With the
varying duty cycle and switching frequency, the output
recovery time is fast and the output voltage deviation is
small in MIC2174/MIC2174C converter.
Figure 3. MIC2174/MIC2174C Load-Transient Response
Unlike in current-mode control, the MIC2174/MIC2174C
uses the output voltage ripple, which is proportional to
the inductor current ripple if the ESR of the output
capacitor is large enough, to trigger an ON-time period.
The MIC2174/MIC2174C predetermined ON-time control
loop has the advantage of constant ON-time mode
control that eliminates the need for the slope
compensation.
The MIC2174/MIC2174C has its own stability concern;
the FB voltage ripple should be in phase with the
inductor current ripple and large enough to be sensed by
the gm amplifier and the error comparator. The
recommended FB voltage ripple is 20mV~100mV. If a
low ESR output capacitor is selected, then the FB
voltage ripple may be too small to be sensed by the gm
amplifier and the error comparator. Also, the output
voltage ripple and the FB voltage ripple are not in phase
with the inductor current ripple if the ESR of the output
capacitor is very low. Therefore, the ripple injection is
required for a low ESR output capacitor. Please refer to
“Ripple Injection” subsection in “Application Information”
for more details about the ripple injection.
Soft-Start
Soft-start reduces the power supply input surge current
at startup by controlling the output voltage rise time. The
input surge appears while the output capacitor is
charged up. A slower output rise time will draw a lower
input surge current.
The MIC2174/MIC2174C implements an internal digital
soft-start by making the 0.8V reference voltage VREF
ramp from 0 to 100% in about 6ms with a 9.7mV step.
Therefore, the output voltage is controlled to increase
slowly by a stair-case VREF ramp. Once the soft-start
cycle ends, the related circuitry is disabled to reduce
current consumption. VIN must be powered up no earlier
than VHSD to make the soft-start function behavior
correctly.
Current Limit
The MIC2174/MIC2174C uses the RDS(ON) of the low-
side power MOSFET to sense over-current conditions.
This method will avoid adding cost, board space and
power losses taken by a discrete current sense resistor.
The low-side MOSFET is used because it displays much
lower parasitic oscillations during switching than the
high-side MOSFET.
In each switching cycle of the MIC2174/MIC2174C
converter, the inductor current is sensed by monitoring
the low-side MOSFET in the OFF period. The sensed
voltage is compared with a current-limit threshold
voltage VCL after a blanking time of 150ns. If the sensed
voltage is over VCL, which is 130mV typical at 0.8V
feedback voltage, then the MIC2174/MIC2174C turns off
the high-side MOSFET and a soft-start sequence is
triggered. This mode of operation is called “hiccup
mode” and its purpose is to protect the downstream load
in case of a hard short. The current limit threshold VCL
has a fold back characteristic related to the FB voltage.
Please refer to the “Typical Characteristics” for the curve
of VCL vs. FB voltage.
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The circuit in Figure 4 illustrates the MIC2174/MIC2174C
current limiting circuit. MOSFET Gate Drive
The MIC2174/MIC2174C high-side drive circuit is
designed to switch an N-Channel MOSFET. The block
diagram of Figure 1 shows a bootstrap circuit, consisting
of D1 (a Schottky diode is recommended) and CBST. This
circuit supplies energy to the high-side drive circuit.
Capacitor CBST is charged, while the low-side MOSFET
is on, and the voltage on the LX pin is approximately 0V.
When the high-side MOSFET driver is turned on, energy
from CBST is used to turn the MOSFET on. As the high-
side MOSFET turns on, the voltage on the LX pin
increases to approximately VHSD. Diode D1 is reversed
biased and CBST floats high while continuing to keep the
high-side MOSFET on. The bias current of the high-side
driver is less than 10mA so a 0.1F to 1F is sufficient to
hold the gate voltage with minimal droop for the power
stroke (high-side switching) cycle, i.e. BST = 10mA x
3.33s/0.1F = 333mV. When the low-side MOSFET is
turned back on, CBST is recharged through D1. A small
resistor RG, which is in series with CBST, can be used to
slow down the turn-on time of the high-side N-channel
MOSFET.
Figure 4. MIC2174/MIC2174C Current Limiting Circuit
Using the typical VCL value of 130mV, the current limit
value is roughly estimated as:
DS(ON)
CL R
130mV
I≈
The drive voltage is derived from the supply voltage VIN.
The nominal low-side gate drive voltage is VIN and the
nominal high-side gate drive voltage is approximately VIN
– VDIODE, where VDIODE is the voltage drop across D1. An
approximate 30ns delay between the high-side and low-
side driver transitions is used to prevent current from
simultaneously flowing unimpeded through both
MOSFETs.
For designs where the current ripple is significant
compared to the load current IOUT, or for low duty cycle
operation, calculating the current limit ICL should take
into account that one is sensing the peak inductor
current and that there is a blanking delay of
approximately 150ns.
2
I
L
tV
R
130mV
IL(pp)
DLYOUT
DS(ON)
CL −
×
+= (3)
Lf
D)(1V
I
SW
OUT
L(pp) ×
−×
= (4)
where:
VOUT = The output voltage
tDLY = Current limit blanking time, 150ns typical
IL(pp) = Inductor current ripple peak-to-peak value
D = Duty Cycle
fSW = Switching frequency
The MOSFET RDS(ON) varies 30 to 40% with temperature.
Therefore, it is recommended to add 50% margin to ICL
in the above equation to avoid false current limiting due
to an increased MOSFET junction temperature rise. It is
also recommended to connect the LX pin directly to the
drain of the low-side MOSFET to accurately sense the
MOSFETs RDS(ON).
Micrel, Inc. MIC2174/MIC2174C
September 2010 14 M9999-091310-C
Application Information
MOSFET Selection
The MIC2174/MIC2174C controller works from input
voltages of 3V to 40V and has an external 3V to 5.5V VIN
to provide power to turn the external N-Channel power
MOSFETs for the high- and low-side switches. For
applications where VIN < 5V, it is necessary that the
power MOSFETs used are sub-logic level and are in full
conduction mode for VGS of 2.5V. For applications when
VIN > 5V; logic-level MOSFETs, whose operation is
specified at VGS = 4.5V must be used.
There are differing criteria for choosing the high-side and
low-side MOSFETs. These differences are more
significant at lower duty cycles, such as a 12V to 1.8V
conversion. In such an application, the high-side
MOSFET is required to switch as quickly as possible to
minimize transition losses, whereas the low-side
MOSFET can switch slower, but must handle larger
RMS currents. When the duty cycle approaches 50%,
the current carrying capability of the high-side MOSFET
starts to become critical.
It is important to note that the on-resistance of a
MOSFET increases with increasing temperature. A 75°C
rise in junction temperature will increase the channel
resistance of the MOSFET by 50% to 75% of the
resistance specified at 25°C. This change in resistance
must be accounted for when calculating MOSFET power
dissipation and in calculating the value of current limit.
Total gate charge is the charge required to turn the
MOSFET on and off under specified operating conditions
(VDS and VGS). The gate charge is supplied by the
MIC2174/MIC2174C gate-drive circuit. At 300kHz
switching frequency and above, the gate charge can be
a significant source of power dissipation in the
MIC2174/MIC2174C. At low output load, this power
dissipation is noticeable as a reduction in efficiency. The
average current required to drive the high-side MOSFET
is:
SWGside]-G[high f Q(avg)I ×= (5)
where:
IG[high-side](avg) = Average high-side MOSFET gate
current
QG = Total gate charge for the high-side MOSFET taken
from the manufacturer’s data sheet for VGS = VIN.
fSW = Switching Frequency (300kHz)
The low-side MOSFET is turned on and off at VDS = 0
because an internal body diode or external freewheeling
diode is conducting during this time. The switching loss
for the low-side MOSFET is usually negligible. Also, the
gate-drive current for the low-side MOSFET is more
accurately calculated using CISS at VDS = 0 instead of
gate charge.
For the low-side MOSFET:
SWGSISSside]-G[low f V C (avg)I ××
=
(6)
Since the current from the gate drive comes from the VIN,
the power dissipated in the MIC2174/MIC2174C due to
gate drive is:
(avg))I (avg)(I V P side]-G[lowside]-G[highINGATEDRIVE +
×
=
(7)
A convenient figure of merit for switching MOSFETs is
the on resistance times the total gate charge RDS(ON) ×
QG. Lower numbers translate into higher efficiency. Low
gate-charge logic-level MOSFETs are a good choice for
use with the MIC2174/MIC2174C. Also, the RDS(ON) of
the low-side MOSFET will determine the current limit
value. Please refer to “Current Limit” subsection in
“Functional Description” for more details.
Parameters that are important to MOSFET switch
selection are:
• Voltage rating
• On-resistance
• Total gate charge
The voltage ratings for the high-side and low-side
MOSFETs are essentially equal to the power stage input
voltage VHSD. A safety factor of 20% should be added to
the VDS(max) of the MOSFETs to account for voltage
spikes due to circuit parasitic elements.
The power dissipated in the MOSFETs is the sum of the
conduction losses during the on-time (PCONDUCTION) and
the switching losses during the period of time when the
MOSFETs turn on and off (PAC):
ACCONDUCTIONSW P P P +
=
(8)
DS(ON)
2
SW(RMS)CONDUCTION R I P ×= (9)
AC(on)) AC(off
AC P P P += (10)
where:
RDS(ON) = on-resistance of the MOSFET switch
D = Duty Cycle = VOUT / VHSD
Micrel, Inc. MIC2174/MIC2174C
September 2010 15 M9999-091310-C
Making the assumption that the turn-on and turn-off
transition times are equal; the transition times can be
approximated by:
G
HSDOSSINISS
TI
VCVC
t×+×
= (11)
where:
CISS and COSS are measured at VDS = 0
IG = gate-drive current
The total high-side MOSFET switching loss is:
SWTPKDHSD AC f t I) V(V P ×××+= (12)
where:
tT = Switching transition time
VD = Body diode drop (0.5V)
fSW = Switching Frequency (300kHz)
The high-side MOSFET switching losses increase with
the input voltage VHSD due to the longer turn-on time and
turn-off time. The low-side MOSFET switching losses
are negligible and can be ignored for these calculations.
Inductor Selection
Values for inductance, peak, and RMS currents are
required to select the output inductor. The input and
output voltages and the inductance value determine the
peak-to-peak inductor ripple current. Generally, higher
inductance values are used with higher input voltages.
Larger peak-to-peak ripple currents will increase the
power dissipation in the inductor and MOSFETs. Larger
output ripple currents will also require more output
capacitance to smooth out the larger ripple current.
Smaller peak-to-peak ripple currents require a larger
inductance value and therefore a larger and more
expensive inductor. A good compromise between size,
loss and cost is to set the inductor ripple current to be
equal to 20% of the maximum output current. The
inductance value is calculated by Equation 13:
OUT(max)swHSD(max)
OUTHSD(max)OUT
I20% f V
)V(VV
L×××
−×
= (13)
where:
fSW = switching frequency, 300 kHz
20% = ratio of AC ripple current to DC output current
VHSD(max) = maximum power stage input voltage
The peak-to-peak inductor current ripple is:
L f V
)V(VV
I
swHSD(max)
OUTHSD(max)OUT
L(pp) ××
−×
=Δ (14)
The peak inductor current is equal to the average output
current plus one half of the peak-to-peak inductor current
ripple.
IL(pk) =IOUT(max) + 0.5 × IL(pp) (15)
The RMS inductor current is used to calculate the I2R
losses in the inductor.
12
I
II
2
L(PP)
2
OUT(max)L(RMS) += (16)
Maximizing efficiency requires both the proper selection
of core material and the minimizing of winding
resistance. The high frequency operation of the
MIC2174/MIC2174C requires the use of ferrite materials
for all but the most cost sensitive applications.
Lower cost iron powder cores may be used but the
increase in core loss will reduce the efficiency of the
power supply. This is especially noticeable at low output
power. The winding resistance decreases efficiency at
the higher output current levels. The winding resistance
must be minimized although this usually comes at the
expense of a larger inductor. The power dissipated in the
inductor is equal to the sum of the core and copper
losses. At higher output loads, the core losses are
usually insignificant and can be ignored. At lower output
currents, the core losses can be a significant contributor.
Core loss information is usually available from the
magnetics vendor. Copper loss in the inductor is
calculated by Equation 17:
PINDUCTOR(Cu) = IL(RMS)
2 × RWINDING (17)
The resistance of the copper wire, RWINDING, increases
with the temperature. The value of the winding
resistance used should be at the operating temperature.
PWINDING(Ht) = RWINDING(20°C) × (1 + 0.0042 × (TH – T20°C))
(18)
Micrel, Inc. MIC2174/MIC2174C
September 2010 16 M9999-091310-C
where:
TH = temperature of wire under full load
T20°C = ambient temperature
RWINDING(20°C) = room temperature winding resistance
(usually specified by the manufacturer)
Output Capacitor Selection
The type of the output capacitor is usually determined by
its ESR (equivalent series resistance). Voltage and RMS
current capability are two other important factors for
selecting the output capacitor. Recommended capacitors
are tantalum, low-ESR aluminum electrolytic, OS-CON
and POSCAPS. The output capacitor’s ESR is usually
the main cause of the output ripple. The output capacitor
ESR also affects the control loop from a stability point of
view. The maximum value of ESR is calculated:
L(PP)
OUT(pp)
CI
V
ESR OUT ≤ (19)
where:
ΔVOUT(pp) = peak-to-peak output voltage ripple
IL(PP) = peak-to-peak inductor current ripple
The total output ripple is a combination of the ESR and
output capacitance. The total ripple is calculated below:
()
2
CL(PP)
2
SWOUT
L(PP)
OUT(pp) OUT
ESRI
8fC
I
V×+
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
××
=
(20)
where:
D = duty cycle
COUT = output capacitance value
fSW = switching frequency
As described in the “Theory of Operation” subsection in
Functional Description, the MIC2174/MIC2174C requires
at least 20mV peak-to-peak ripple at the FB pin to make
the gm amplifier and the error comparator to behavior
properly. Also, the output voltage ripple should be in
phase with the inductor current. Therefore, the output
voltage ripple caused by the output capacitor COUT
should be much smaller than the ripple caused by the
output capacitor ESR. If low-ESR capacitors, such as
ceramic capacitors, are selected as the output
capacitors, a ripple injection method should be applied to
provide the enough FB voltage ripple. Please refer to the
“Ripple Injection” subsection for more details.
The voltage rating of the capacitor should be twice the
output voltage for a tantalum and 20% greater for
aluminum electrolytic or OS-CON. The output capacitor
RMS current is calculated below:
12
I
IL(PP)
(RMS)COUT = (21)
The power dissipated in the output capacitor is:
OUTOUTOUT C
2
(RMS)C)DISS(C ESRIP ×= (22)
Input Capacitor Selection
The input capacitor for the power stage input VHSD
should be selected for ripple current rating and voltage
rating. Tantalum input capacitors may fail when
subjected to high inrush currents, caused by turning the
input supply on. A tantalum input capacitor’s voltage
rating should be at least two times the maximum input
voltage to maximize reliability. Aluminum electrolytic,
OS-CON, and multilayer polymer film capacitors can
handle the higher inrush currents without voltage de-
rating. The input voltage ripple will primarily depend on
the input capacitor’s ESR. The peak input current is
equal to the peak inductor current, so:
VIN = IL(pk) × ESRCIN (23)
The input capacitor must be rated for the input current
ripple. The RMS value of input capacitor current is
determined at the maximum output current. Assuming
the peak-to-peak inductor current ripple is low:
D)(1DII OUT(max)CIN(RMS) −××≈ (24)
The power dissipated in the input capacitor is:
PDISS(CIN) = ICIN(RMS)
2 × ESRCIN (25)
External Schottky Diode (Optional)
An external freewheeling diode, which is not necessary,
is used to keep the inductor current flow continuous
while both MOSFETs are turned off. This dead-time
prevents current from flowing unimpeded through both
MOSFETs and is typically 30ns. The diode conducts
twice during each switching cycle. Although the average
current through this diode is small, the diode must be
able to handle the peak current.
Micrel, Inc. MIC2174/MIC2174C
September 2010 17 M9999-091310-C
SWOUTD(avg) f30ns2II ×××= (26)
The reverse voltage requirement of the diode is:
HSDDIODE(rrm) V V =
The power dissipated by the Schottky diode is:
F D(avg)DIODE VI P ×= (27)
where, VF = forward voltage at the peak diode current.
The external Schottky diode is not necessary for the
circuit operation since the low-side MOSFET contains a
parasitic body diode. The external diode will improve
efficiency and decrease the high frequency noise. If the
MOSFET body diode is used, then it must be rated to
handle the peak and average current. The body diode
has a relatively slow reverse recovery time and a
relatively high forward voltage drop. The power lost in
the diode is proportional to the forward voltage drop of
the diode. As the high-side MOSFET starts to turn on,
the body diode becomes a short circuit for the reverse
recovery period, dissipating additional power. The diode
recovery and the circuit inductance will cause ringing
during the high-side MOSFET turn-on.
An external Schottky diode conducts at a lower forward
voltage preventing the body diode in the MOSFET from
turning on. The lower forward voltage drop dissipates
less power than the body diode. The lack of a reverse
recovery mechanism in a Schottky diode causes less
ringing and less power loss. Depending upon the circuit
components and operating conditions, an external
Schottky diode will give a 1/2% to 1% improvement in
efficiency.
Snubber Design
A snubber is used to damp out high frequency ringing
caused by parasitic inductance and capacitance in the
buck converter circuit. Figure 5 shows a simplified
schematic of the buck converter. Stray capacitance
consists mostly of the two MOSFETs’ output
capacitance (COSS). The stray inductance consists
mostly package inductance and trace inductance. The
arrows show the resonant current path when the high
side MOSFET turns on. This ringing causes stress on
the semiconductors in the circuit as well as increased
EMI.
Q1
Q2 COUT
CIN
LSTRAY1 LSTRAY2 L
LSTRAY3
LSTRAY4
Sync_buck
Controller
VDC
COSS1
COSS2
+
–
Figure 5. Output Parasitics
One method of reducing the ringing is to use a resistor
and capacitor to lower the Q of the resonant circuit, as
shown in Figure 6. Capacitor CS is used to block DC and
minimize the power dissipation in the resistor. This
capacitor value should be between two and ten times the
parasitic capacitance of the MOSFET COSS. A capacitor
that is too small will have high impedance and prevent
the resistor from damping the ringing. A capacitor that is
too large causes unnecessary power dissipation in the
resistor, which lowers efficiency.
CS
RS
RDS
LSTRAY1 LSTRAY2
LSTRAY3
LSTRAY4
COSS2
Figure 6. Snubber Circuit
The snubber components should be placed as close as
possible to the low-side MOSFET and/or external
Schottky diode since it contributes to most of the stray
capacitance. Placing the snubber too far from the FET or
using trace that is too long or thin will add inductance to
the snubber and diminishes its effectiveness.
Micrel, Inc. MIC2174/MIC2174C
September 2010 18 M9999-091310-C
A proper snubber design requires the parasitic
inductance and capacitance be known. A method of
determining these values and calculating the damping
resistor value is outlined below.
1. Measure the ringing frequency at the switch node
which is determined by parasitic LP and CP. Define
this frequency as f1.
2. Add a capacitor CS (such as two times as big as the
COSS of the FET) from the switch node-to-ground
and measure the new ringing frequency. Define this
new (lower) frequency as f2. LP and CP can now be
solved using the values of f1, f2 and CS.
3. Add a resistor RS in series with C
S to generate
critical damping.
Step 1: First measure the ringing frequency on the
switch node voltage when the high-side MOSFET turns
on. This ringing is characterized by the equation:
PP
1CL2
1
f×π
= (28)
where CP and LP are the parasitic capacitance and
inductance.
Step 2: Add a capacitor, CS, in parallel with the
synchronous MOSFET, Q2. The capacitor value should
be approximately two times the COSS of Q2. Measure the
frequency of the switch node ringing, f2:
)CpCs(Lp2
1
f2+×π
= (29)
Define f’ as:
2
1
'
f
f
f=
Combining the equations for f1, f2 and f’ to derive CP, the
parasitic capacitance:
1)f(
C
C2'
S
P−
= (30)
LP is solved by re-arranging the equation for f1:
()
2
1P
2
P)f(C2
1
L××π
= (31)
Step 3: Calculate the damping resistor.
Critical damping occurs at Q = 1:
1
L
C
RQ
P
P
S=×= (32)
Solving for RS
p
P
SC
L
R= (33)
Figure 6 shows the snubber in the circuit and the
damped switch node waveform. The snubber capacitor,
CS, is charged and discharged each switching cycle. The
energy stored in CS is dissipated by the snubber resistor,
RS, two times per switching period. This power is
calculated in Equation 34:
2
INSSWSNUBBER VCfP ××= (34)
Ripple Injection
The VFB ripple required for proper operation of the
MIC2174/MIC2174C gm amplifier and error comparator
is 20mV to 100mV. However, the output voltage ripple is
generally designed as 1% to 2% of the output voltage.
For a low output voltage, such as a 1V output, the output
voltage ripple is only 10mV to 20mV, and the FB voltage
ripple is less than 20mV. If the FB voltage ripple is so
small that the gm amplifier and error comparator can’t
sense it, then the MIC2174/MIC2174C will lose control
and the output voltage will not be regulated. In order to
have some amount of VFB voltage ripple, a ripple
injection method is applied for low output voltage ripple
applications.
The applications are divided into three situations
according to the amount of the FB voltage ripple:
1. Enough ripple at the FB voltage due to the large
ESR of the output capacitors.
As shown in Figure 7a, the converter is stable without
any ripple injection. The FB voltage ripple is:
(pp)
LCFB(pp) IESR
R2R1
R2
VOUT ××
+
= (35)
where IL(pp) is the peak-to-peak value of the inductor
current ripple.
Micrel, Inc. MIC2174/MIC2174C
September 2010 19 M9999-091310-C
2. Inadequate ripple at the FB voltage due to the small
ESR of the output capacitors.
The output voltage ripple is fed into the FB pin
through a feedforward capacitor Cff in this situation,
as shown in Figure 7b. The typical Cff value is
between 1nF and 100nF. With the feedforward
capacitor, the FB voltage ripple is very close to the
output voltage ripple:
(pp)
LFB(pp) IESRV×≈ (36)
3. Virtually no ripple at the FB pin voltage is due to the
very low ESR of the output capacitors.
Figure 7a. Enough Ripple at FB
Figure 7b. Inadequate Ripple at FB
Figure 7c. Invisible Ripple at FB
In this situation, the output voltage ripple is less than
20mV. Therefore, additional ripple is injected into the FB
pin from the switching node LX via a resistor Rinj and a
capacitor Cinj, as shown in Figure 7c. The injected ripple
is:
τ×
××××=
SW
divHSDFB(pp) f
1
D)-(1DKVV (37)
R1//R2R
R1//R2
K
inj
div +
= (38)
where
VHSD = Power stage input voltage at HSD pin
D = Duty Cycle
fSW = switching frequency
τ = (R1//R2//Rinj) × Cff
In the equations (37) and (38), it is assumed that the
time constant associated with Cff must be much greater
than the switching period:
1
T
f
1
SW
<<=
×
ττ
If the voltage divider resistors R1 and R2 are in the k
range, a Cff of 1nF to 100nF can easily satisfy the large
time constant consumption. Also, a 100nF injection
capacitor Cinj is used in order to be considered as short
for a wide range of the frequencies.
The process of sizing the ripple injection resistor and
capacitors is:
Step 1. Select Cff to feed all output ripples into the
feedback pin and make sure the large time constant
assumption is satisfied. Typical choice of Cff is 1nF to
100nF if R1 and R2 are in k range.
Step 2. Select Rinj according to the expected feedback
voltage ripple. According to Equation 37:
D)(1D
f
V
V
KSW
HSD
FB(pp)
div −×
τ×
×= (39)
Then the value of Rinj is obtained as:
1)
K
1
((R1//R2)R
div
inj −×= (40)
Micrel, Inc. MIC2174/MIC2174C
September 2010 20 M9999-091310-C
Step 3. Select Cinj as 100nF, which could be considered
as short for a wide range of the frequencies.
Once R1 is selected, R2 can be calculated using:
Setting Output Voltage
REFOUT
REF
VV
R1V
R2 −
×
= (42)
The MIC2174/MIC2174C requires two resistors to set
the output voltage as shown in Figure 8.
In addition to the external ripple injection added at the
FB pin, internal ripple injection is added at the inverting
input of the comparator inside the MIC2174, as shown in
Figure 9. The inverting input voltage VINJ is clamped to
1.2V. For applications with high VHSD and high VOUT, the
swing of VINJ will be clamped. The clamped VINJ reduces
the line regulation because it is reflected back as a DC
error on the FB terminal. Therefore, the maximum output
voltage of MIC2174 should be limited to 5.5V for up to
28V VHSD and 3.6V for VHSD higher than 28V. If a higher
output voltage is required, use the MIC2176 instead.
Figure 8. Voltage-Divider Configuration
The output voltage is determined by the equation:
)
R2
R1
(1VV REFOUT +×= (41)
Figure 9. Internal Ripple Injection
where, VREF = 0.8V. A typical value of R1 can be
between 3k and 10k. If R1 is too large, it may allow
noise to be introduced into the voltage feedback loop. If
R1 is too small, it will decrease the efficiency of the
power supply, especially at light loads.
Micrel, Inc. MIC2174/MIC2174C
September 2010 21 M9999-091310-C
PCB Layout Guidelines
Warning!!! To minimize EMI and output noise, follow
these layout recommendations.
PCB Layout is critical to achieve reliable, stable and
efficient performance. A ground plane is required to
control EMI and minimize the inductance in power,
signal and return paths.
The following guidelines should be followed to insure
proper operation of the MIC2174/MIC2174C converter.
IC
• The 2.2µF ceramic capacitor, which connects to the
VIN terminal, must be located right at the IC. The VIN
terminal is very noise sensitive and placement of the
capacitor is very critical. Use wide traces to connect
to the IN and PGND pins.
• Place the IC and MOSFETs close to the point of
load (POL).
• Use fat traces to route the input and output power
lines.
• Signal and power grounds should be kept separate
and connected at only one location.
Input Capacitor
• Place the HSD input capacitor next.
• Place the HSD input capacitors on the same side of
the board and as close to the MOSFETs as
possible.
• Keep both the HSD and PGND connections short.
• Place several vias to the ground plane close to the
HSD input capacitor ground terminal.
• Use either X7R or X5R dielectric input capacitors.
Do not use Y5V or Z5U type capacitors.
• Do not replace the ceramic input capacitor with any
other type of capacitor. Any type of capacitor can be
placed in parallel with the input capacitor.
• If a Tantalum input capacitor is placed in parallel
with the input capacitor, it must be recommended for
switching regulator applications and the operating
voltage must be derated by 50%.
• In “Hot-Plug” applications, a Tantalum or Electrolytic
bypass capacitor must be used to limit the over-
voltage spike seen on the input supply with power is
suddenly applied.
• An additional Tantalum or Electrolytic bypass input
capacitor of 22µF or higher is required at the input
power connection.
Inductor
• Keep the inductor connection to the switch node
(LX) short.
• Do not route any digital lines underneath or close to
the inductor.
• Keep the switch node (LX) away from the feedback
(FB) pin.
• The LX pin should be connected directly to the drain
of the low-side MOSFET to accurate sense the
voltage across the low-side MOSFET.
• To minimize noise, place a ground plane underneath
the inductor.
Output Capacitor
• Use a wide trace to connect the output capacitor
ground terminal to the input capacitor ground
terminal.
• Phase margin will change as the output capacitor
value and ESR changes. Contact the factory if the
output capacitor is different from what is shown in
the BOM.
• The feedback trace should be separate from the
power trace and connected as close as possible to
the output capacitor. Sensing a long high current
load trace can degrade the DC load regulation.
Schottky Diode (Optional)
• Place the Schottky diode on the same side of the
board as the MOSFETs and HSD input capacitor.
• The connection from the Schottky diode’s Anode to
the input capacitors ground terminal must be as
short as possible.
• The diode’s cathode connection to the switch node
(LX) must be keep as short as possible.
RC Snubber
• Place the RC snubber on the same side of the board
and as close to the MOSFETs as possible.
MOSFETs
• Low-side MOSFET gate drive trace (DL pin to
MOSFET gate pin) must be short and routed over a
ground plane. The ground plane should be the
connection between the MOSFET source and PGND.
• Chose a low-side MOSFET with a high CGS/CGD ratio
and a low internal gate resistance to minimize the
effect of dv/dt inducted turn-on.
• Do not put a resistor between the LSD output and
the gate.
• Use a 4.5V VGS rated MOSFET. Its higher gate
threshold voltage is more immune to glitches than a
2.5V or 3.3V rated MOSFET. MOSFETs that are
rated for operation at less than 4.5V VGS should not
be used.
Micrel, Inc. MIC2174/MIC2174C
September 2010 22 M9999-091310-C
Evaluation Board Schematics
Figure 10. Schematic of MIC2174/MIC217 4C Evaluation Board
Micrel, Inc. MIC2174/MIC2174C
September 2010 23 M9999-091310-C
Bill of Materials
Item Part Number Manufacturer Description Qty.
C1 B41112A8336M EPCOS(1) 33µF Aluminum Capacitor, SMD, 63V 1
12105C475KAZ2A AVX(2)
C2 GRM32ER71H475KA88L Murata(3) 4.7µF Ceramic Capacitor, X7R, Size 1210, 50V 1
12106D107MAT2A AVX
C4, C5, C13 GRM32ER60J107ME20L Murata 100µF Ceramic Capacitor, X5R, Size 1210, 6.3V 3
06035C104KAT2A AVX
GRM188R71H104KA93D Murata
C3, C6, C8, C10
C1608X7R1H104K TDK(4)
0.1µF Ceramic Capacitor, X7R, Size 0603, 50V 4
0805ZC225MAT2A AVX
GRM21BR71A225KA01L Murata
C7
C2012X7R1A225K TDK
2.2µF Ceramic Capacitor, X7R, Size 0805, 10V 1
06035C102KAT2A AVX
GRM188R71H102KA01D Murata
C11
C1608X7R1H102K TDK
1nF Ceramic Capacitor, X7R, Size 0603, 50V 1
06035C103KAZ2A AVX
GRM188R71H103K Murata
C12
C1608X7R1H103K TDK
10nF Ceramic Capacitor, X7R, Size 0603, 50V 1
SD103AWS-7 Diodes Inc(5)
D1 SD103AWS Vishay(6) Small Signal Schottky Diode 1
L1 CDRH104RNP-100 Sumida(7) 10µH Inductor, 3.8A Saturation Current 1
Q1, Q2 FDS5682 Fairchild(8) 60V 7.5A N-Channel MOSFET 26.5m Rds(on) @ 4.5V 2
R1 CRCW06032R21FKEA Vishay Dale 2.21 Resistor, Size 0603, 1% 1
R2 CRCW06031R21FKEA Vishay Dale 1.21 Resistor, Size 0603, 1% 1
R3 CRCW060319K6FKEA Vishay Dale 19.6k Resistor, Size 0603, 1% 1
R4 CRCW060310K0FKEA Vishay Dale 10k Resistor, Size 0603, 1% 1
R5 CRCW06030000Z0EA Vishay Dale 0 Resistor, Size 0603, 1% 1
R6 CRCW06038K06FKEA Vishay Dale 8.06k Resistor, Size 0603, 1% 1
U1 MIC2174YMM Micrel. Inc.(9) 300kHz Buck Controller 1
Notes:
1. EPCOS: www.epcos.com.
2. AVX: www.avx.com.
3. Murata: www.murata.com.
4. TDK: www.tdk.com.
5. Diodes Inc: www.diodes.com.
6. Vishay: www.vishay.com.
7. Sumida: www.sumida.com.
8. Fairchild: www.fairchildsemi.com
9. Micrel, Inc.: www.micrel.com.
Micrel, Inc. MIC2174/MIC2174C
September 2010 24 M9999-091310-C
PCB Layout
Figure 11. MIC2174/MIC2174C Evaluation Board Top Layer
Figure 12. MIC2174/MIC2174C Evaluation Board Bottom Layer
Micrel, Inc. MIC2174/MIC2174C
September 2010 25 M9999-091310-C
PCB Layout (Continued)
Figure 13. MIC2174/MIC217 4C Evaluation Board Mid-Layer 1
Figure 14. MIC2174/MIC217 4C Evaluation Board Mid-Layer 2
Micrel, Inc. MIC2174/MIC2174C
September 2010 26 M9999-091310-C
Recommended Land Pattern
10-Pin MSOP (MM)
Micrel, Inc. MIC2174/MIC2174C
September 2010 27 M9999-091310-C
Package Information
10-Pin MSOP (MM)
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