This is information on a product in full production.
October 2015 DocID023231 Rev 3 1/13
STL6N3LLH6
N-channel 30 V, 0.021 Ω typ., 6 A STripFET™ H6
Power MOSFET in a PowerFLAT™ 2x2 package
Datasheet
-
production data
Figure 1. Internal schematic diagram
Features
•Very low on-resistance
•Very low gate charge
•High avalanche ruggedness
•Low gate drive power loss
Applications
•Switching applications
Description
This device is an N-channel Power MOSFET
developed using the STripFET™ H6 technology,
with a new trench gate structure. The resulting
Power MOSFET exhibits very low R
DS(on)
in all
packages.
1(D) 2(D) 3(G)
6(D) 5(D) 4(S)
DS
AM11269v1
PowerFLAT™ 2x2
1
2
3
6
5
4
1
2
3
Order code V
DS
R
DS(on)
max I
D
P
TOT
STL6N3LLH6 30 V 0.025Ω (V
GS=
10 V)
0.04Ω (V
GS=
4.5 V) 6 A 2.4 W
Table 1. Device summary
Order code Marking Package Packaging
STL6N3LLH6 STG1 PowerFLAT™ 2x2 Tape and reel
www.st.com
Contents STL6N3LLH6
2/13 DocID023231 Rev 3
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Elect rical char acteristi cs (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
DocID023231 Rev 3 3/13
STL6N3LLH6 Electrical ratings
13
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
V
DS
Drai n-so urce voltage 30 V
V
GS
Gate-source voltage ± 20 V
I
D(1)
1. This value is rated according to R
thj-case
Drain current (continuous) at TC = 25 °C 13 A
ID(1) Drain current (continuous) at TC = 100 °C 8.2 A
IDM(1)(2)
2. Pulse width limited by safe operating area
Drain current (pulse d) 52 A
I
D(3)
3. This value is rated according to R
thj-pcb
Drain current (continuous) at Tpcb = 25 ° C 6 A
ID(3) Drain current (continuous) at Tpcb = 100 °C 3.75 A
IDM(2)(3) Drain cur rent (pulsed) 24 A
PTOT (1) Total dissipation at Tc = 25 °C 7.8 W
PTOT(3) Total dissipation at Tpcb = 25 °C 2.4
TJOperati ng jun cti on tempe ratu re -55 to 150 °C
Tstg St orag e temp erature
Table 3. Thermal resistance
Symbol Parameter Value Unit
R
thj-pcb (1)
1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec
Thermal resis tance junction-pcb 52 ºC/W
R
thj-case
Thermal resistance junction-case max 16 ºC/W
Ele ctrical characteristic s STL6N3L LH6
4/13 DocID023231 Rev 3
2 Electrical characteristics
(T
CASE
= 25 °C unless otherwise specified).
Table 4. On/off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
Drai n-source brea kdow n
voltage I
D
= 250 µA, V
GS
= 0 V 30 V
I
DSS
Zero gate voltage drain
current
V
DS
= 30 V, V
GS
= 0 1 µA
V
DS
= 30 V, T
C
= 125°C
(V
GS
= 0) 10 µA
I
GSS
Gate body leakage current V
GS
= ±20 V, (V
DS
= 0)
±
100 nA
V
GS(th)
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA 1 V
R
DS(on)
Static d rain-source
on-resistance V
GS
= 10 V, I
D
= 3 A 0.021 0.025 Ω
V
GS
= 4.5 V, I
D
= 3 A 0.032 0.04 Ω
Table 5. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
C
iss
Input capacitance
V
DS
= 24 V, f=1 MHz,
(V
GS
= 0)
-283 -
pF
C
oss
Out put capacitance - 61 -
C
rss
Reverse transf er
capacitance -31 -
Q
g
Total gate charge V
DD
= 15 V, I
D
= 6 A
V
GS
= 4.5 V
(see Figure 14.: Gate
charge test circuit)
-3.6 -
nC
Q
gs
Gate-source charge - 1.5 -
Q
gd
Gate-drain charge - 1.1 -
Table 6. Switching times
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
Turn-on delay time V
DD
= 10 V, I
D
= 6 A,
R
G
= 4.7 Ω, V
GS
= 4.5 V
(see Figure 13.:
Switching times test
circuit for resistive load)
-4.8-
ns
t
r
Rise time - 11.2 -
t
d(off)
Turn-off delay time - 9.4 -
t
f
Fall time - 5. 4 -
DocID023231 Rev 3 5/13
STL6N 3LL H6 Electri cal chara ct er ist ics
13
Table 7. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
SD(1)
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
Forward on voltage I
SD
= 6 A, V
GS
= 0 V - 1.1 V
t
rr
Reverse recovery time I
SD
= 6 A,
di/dt = 100 A/µs,
V
DD
= 16 V, T
J
= 150 °C
- 10.6 ns
Q
rr
Reverse recovery charge - 2.8 nC
I
RRM
Reverse recovery current - 0.5 A
Ele ctrical characteristic s STL6N3L LH6
6/13 DocID023231 Rev 3
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance
I
D
10
1
0.1 1V
DS
(V)
10
(A)
Operation in this area is
Limited by max R
DS(on)
10ms
1ms
Tj=150°C
Tc=25°C
Single
pulse
1s
0.1
AM15374v1
10 -4 10-2
10-3 10-1 t (s)
p
10 -2
10 -1
K
Single pulse
0.01
0.02
0.05
0.1
0.2
δ=0.5
Zthj-pcb=K*Rthj-c
10 -5
AM15375v1
I
D
15
10
5
0
01V
DS
(V)
3
(A)
2
20
25
2V
3V
4V
V
GS
=6, 7, 8, 9, 10V
30
5V
4
AM15361v1
I
D
30
10
0
03 V
GS
(V)
(A)
1
20
2
V
DS
=2V
645 7
AM15369v1
V
GS
6
4
2
0
02Q
g
(nC)
(V)
8
46
10
V
DD
=15V
I
D
=6A
AM15358v1
R
DS(on)
15
10
5
008
I
D
(A)
(mΩ)
4
20
25
2610
V
GS
= 10 V
30
35
40
AM15372v1
DocID023231 Rev 3 7/13
STL6N 3LL H6 Electri cal chara ct er ist ics
13
Figure 8. Capacitance variations Figure 9. Normalized on-resistance vs
temperature
Figure 10. Normalized gate threshold voltage vs
temperature Figure 11. Normalized V
(BR)DSS
vs temperature
Figure 12. Source -drain diode forward
characteristics
C
100
1010 V
DS
(V)
(pF)
20
Ciss
Coss
Crss
10
f= 1 MHz
AM15370v1
R
DS(on)
1.2
1
0.4
00
-55 -5 T
J
(°C)
(norm)
-30 70
20 45 95
0.2
0.6
0.8
1.4
1.6
120
I
D
= 3 A
V
GS
= 10 V
145
1.8
AM15360v1
V
GS(th)
0.6
0.4
0.2
0
-55 -5 T
J
(°C)
(norm)
-30
0.8
70
20 45 95 120
I
D
=250 µA
145
1
1.2
AM15368v1
V(BR)DSS
-55 -5 T
J
(°C)
-30 70
20 45 95
0.8
0.85
0.9
0.95
1
1.1
1.15
1.05
I
D
= 250 μA
120
AM15364v1
V
SD
04I
SD
(A)
(V)
210
68
0.2
0.3
0.4
0.5
0.6
0.7
T
J
=-55°C
T
J
=150°C
T
J
=25°C
0.8
0.9
1
AM15365v1
Test circuits STL6N3LLH6
8/13 DocID023231 Rev 3
3 Test circuits
Figure 13. Switching times test circuit for
resistive load Figure 14. Gate charge test circuit
Figure 15. Test circuit for inductive load
switching and diode recovery times Figure 16. Unclamped inductive load tes t circuit
Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform
AM01468v1
VGS
PW
VD
RG
RL
D.U.T.
2200
μF
3.3
μFVDD
AM01469v1
VDD
47kΩ 1kΩ
47kΩ
2.7kΩ
1kΩ
12V
Vi=20V=VGMAX
2200
mF
PW
IG=CONST
100Ω
100nF
D.U.T.
VG
AM01470v1
A
D
D.U.T.
S
B
G
25 Ω
AA
BB
RG
G
FAST
DIODE
D
S
L=100μH
μF
3.3 1000
μFVDD
AM01471v1
Vi
Pw
VD
ID
D.U.T.
L
2200
μF
3.3
μFVDD
AM01472v1
V(BR)DSS
VDD
VDD
VD
IDM
ID
AM01473v1
VDS
ton
tdoff
toff
tf
tr
90%
10%
10%
0
0
90%
90%
10%
VGS
td(on)
DocID023231 Rev 3 9/13
STL6N3LLH6 Package information
13
4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
Package information STL6N3LLH6
10/13 DocID023231 Rev 3
Figure 19. PowerFLAT™ 2 x 2 package outline
8368575_REV_C8368575_REV_C
DocID023231 Rev 3 11/13
STL6N3LLH6 Package information
13
Table 9. PowerFLAT™ 2 x 2 recommended footprint (dimensions in millimeters)
Table 8. PowerFLAT™ 2 x 2 package mechanical data
Dim. mm.
Min. Typ. Max.
A 0.70 0.75 0.80
A1 0.00 0.02 0.05
A3 0.20
b 0.25 0.30 0.35
D 1.90 2.00 2.10
E 1.90 2.00 2.10
D2 0.90 1.00 1.10
E2 0.80 0.90 1.00
e 0.55 0.65 0.75
K 0.15 0.25 0.35
K1 0.20 0.30 0.40
K2 0.25 0.35 0.45
L 0.20 0.25 0.30
L1 0.65 0.75 0.85
Footprint
Revision history STL6N3LLH6
12/13 DocID023231 Rev 3
5 Revision history
Table 10. Document revision history
Date Revision Changes
25-May-2012 1First release
11-Oct-2012 2
– Added Section 2.1: Electrical characteristics (curves).
–R
DS(on)
values (typ. and max.) updated
– Typical values updated in Table 5, 6 and 7
– Minor text changes.
21-Oct-2015 3
– Updated title and description in cover page.
– Datasheet promoted from preliminary data to production data.
– Updated Table 2, Table 4, Table 5 and Table 7.
– Updated Figure 6 and Figure 7.
– Minor text changes.
DocID023231 Rev 3 13/13
STL6N3LLH6
13