1
LTC1821
APPLICATIO S
U
DESCRIPTIO
U
FEATURES
TYPICAL APPLICATIO
U
16-Bit, Ultra Precise,
Fast Settling V
OUT
DAC
The LTC
®
1821 is a parallel input 16-bit multiplying voltage
output DAC that operates from analog supply voltages of
±5V up to ±15V. INL and DNL are accurate to 1LSB over the
industrial temperature range in both unipolar 0V to 10V and
bipolar ±10V modes. Precise 16-bit bipolar ±10V outputs are
achieved with on-chip 4-quadrant multiplication resistors.
The LTC1821 is available in a 36-lead SSOP package and is
specified over the industrial temperature range.
The device includes an internal deglitcher circuit that reduces
the glitch impulse to less than 2nV•s (typ). The LTC1821
settles to 1LBS in 2µs with a full-scale 10V step. The
combination of fast, precise settling and ultra low glitch make
the LTC1821 ideal for precision industrial control applica-
tions.
The asynchronous CLR pin resets the LTC1821 to zero scale
and resets the LTC1821-1 to midscale.
■
Process Control and Industrial Automation
■
Precision Instrumentation
■
Direct Digital Waveform Generation
■
Software-Controlled Gain Adjustment
■
Automatic Test Equipment
, LTC and LT are registered trademarks of Linear Technology Corporation.
LTC1821/LTC1821-1
Integral Nonlinearity
16-Bit, 4-Quadrant Multiplying DAC with a
Minimum of External Components
DIGITAL INPUT CODE
0
INTEGRAL NONLINEARITY (LSB)
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0 16384 32768
1821 TA02
49152 65535
V
REF
= 10V
V
OUT
= ±10V BIPOLAR
V
CC
LTC1821-1
R
FB
I
OUT
R
FB
R
OFS
R
OFS
5V
LD
LD
10 9
3
2
24 23 7
2
6
15pF
17 16
20
13
15
V
–
V
+
R1 R
COM
8
REF
11 12 14
0.1µF
122
V
OUT
15pF
V
OUT
=
1821 TA01
DGNDNC AGNDSAGNDF
–
+
LT
®
1468
WR
3 TO 6,
25 TO 36
WR
CLR
CLR
16-BIT DAC
R1 R2
16
DATA
INPUTS
0.1µF
15V
–15V
0.1µF
–
+
21
DNC*
19
DNC*
18
*DO NOT CONNECT
DNC*
V
REF
–V
REF
V
REF
–V
REF
■
2µs Settling to 0.0015% for 10V Step
■
1LSB Max DNL and INL Over Industrial
Temperature Range
■
On-Chip 4-Quadrant Resistors Allow Precise 0V to
10V, 0V to –10V or ±10V Outputs
■
Low Glitch Impulse: 2nV•s
■
Low Noise: 13nV/√Hz
■
36-Lead SSOP Package
■
Power-On Reset
■
Asynchronous Clear Pin
LTC1821: Reset to Zero Scale
LTC1821-1: Reset to Midscale
2
LTC1821
V
CC
to AGNDF, AGNDS ............................... – 0.3V to 7V
V
CC
to DGND .............................................. –0.3V to 7V
Total Supply Voltage (V
+
to V
–
) ............................... 36V
AGNDF, AGNDS to DGND ............................. V
CC
+ 0.3V
DGND to AGNDF, AGNDS ............................. V
CC
+ 0.3V
REF, R
COM
to AGNDF, AGNDS, DGND .................. ±15V
R
OFS
, R
FB
, R1, to AGNDF, AGNDS, DGND ............ ±15V
Digital Inputs to DGND ............... –0.3V to (V
CC
+ 0.3V)
I
OUT
to AGNDF, AGNDS............... –0.3V to (V
CC
+ 0.3V)
Maximum Junction Temperature .......................... 150°C
Operating Temperature Range
LTC1821C/LTC1821-1C.......................... 0°C to 70°C
LTC1821I/LTC1821-1I ....................... –40°C to 85°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
(Note 1) ORDER PART
NUMBER
LTC1821ACGW
LTC1821BCGW
LTC1821-1ACGW
LTC1821-1BCGW
LTC1821AIGW
LTC1821BIGW
LTC1821-1AIGW
LTC1821-1BIGW
T
JMAX
= 125°C, θ
JA
= 80°C/W
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
TOP VIEW
GW PACKAGE
36-LEAD PLASTIC SSOP WIDE
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
WR
LD
NC
DNC*
V
–
DNC*
DGND
V
CC
D3
D2
D1
D0
CLR
REF
R
COM
R1
R
OFS
R
FB
V
OUT
I
OUT
V
+
AGNDS
AGNDF
DNC*
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = TMIN to TMAX,
V+ = 15V, V– = –15V, VCC = 5V, VREF = 10V, AGNDF = AGNDS = DGND = 0V.
*DO NOT CONNECT
LTC1821B/-1B LTC1821A/-1A
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Accuracy
Resolution ●16 16 Bits
Monotonicity ●16 16 Bits
INL Integral Nonlinearity T
A
= 25°C (Note 2) ±2±0.25 ±1LSB
T
MIN
to T
MAX
●±2±0.35 ±1LSB
DNL Differential Nonlinearity T
A
= 25°C±1±0.2 ±1LSB
T
MIN
to T
MAX
●±1±0.2 ±1LSB
GE Gain Error Unipolar Mode
T
A
= 25°C (Note 3) ±16 ±5±16 LSB
T
MIN
to T
MAX
●±24 ±8±16 LSB
Bipolar Mode
T
A
= 25°C (Note 3) ±16 ±2±16 LSB
T
MIN
to T
MAX
●±24 ±5±16 LSB
Gain Temperature Coefficient ∆Gain/∆Temperature (Note 4) ●1 3 1 3 ppm/°C
Unipolar Zero-Scale Error T
A
= 25°C±3±0.25 ±2LSB
T
MIN
to T
MAX
●±6±0.50 ±4LSB
Bipolar Zero Error T
A
= 25°C±12 ±2±8LSB
T
MIN
to T
MAX
●±16 ±3±10 LSB
PSRR Power Supply Rejection Ratio V
CC
= 5V ±10% ● 2 0.7 2 LSB/V
V
+
, V
–
= ±4.5V to ±16.5V ●±2±0.1 ±2 LSB/V
ABSOLUTE MAXIMUM RATINGS
W
WW
U
PACKAGE/ORDER INFORMATION
W
UU
ELECTRICAL CHARACTERISTICS
Consult factory for parts specified with wider operating temperature ranges.
3
LTC1821
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = TMIN to TMAX,
V+ = 15V, V– = –15V, VCC = 5V, VREF = 10V, AGNDF = AGNDS = DGND = 0V.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Reference Input
R
REF
DAC Input Resistance (Unipolar) (Note 6) ● 4.5 6 10 kΩ
R1/R2 R1/R2 Resistance (Bipolar) (Notes 6, 11) ●91220 kΩ
R
OFS
, R
FB
Feedback and Offset Resistances (Note 6) ●91220 kΩ
AC Performance (Note 4)
Output Voltage Settling Time ∆V
OUT
= 10V (Notes 7, 8) 2 µs
Midscale Glitch Impulse (Note 10) 2 nV•s
Digital-Feedthrough (Note 9) 2 nV•s
Multiplying Feedthrough Error V
REF
= ±10V, 10kHz Sine Wave (Note 7) 1 mV
P-P
Multiplying Bandwidth Code = Full Scale (Note 7) 600 kHz
Output Noise Voltage Density 1kHz to 100kHz (Note 7)
Code = Zero Scale 13 nV/√Hz
Code = Full Scale 20 nV/√Hz
Output Noise Voltage 0.1Hz to 10Hz (Note 7)
Code = Zero Scale 0.45 µV
RMS
Code = Full Scale 1 µV
RMS
1/f Noise Corner (Note 7) 30 Hz
Analog Outputs (Note 4)
V
OUT
DAC Output Swing R
L
= 2k, V
+
= 15V, V
–
= –15V ●±12.6 V
R
L
= 2k, V
+
= 5V, V
–
= –5V ●±2.6 V
DAC Output Load Regulation V
+
= 15V, V
–
= –15V, ±5mA Load ●0.02 0.2 LSB/mA
I
SC
Short-Circuit Current V
OUT
= 0V, V
+
= 15V, V
–
= –15V ●12 40 mA
SR Slew Rate R
L
= 2k, V
+
= 15V, V
–
= –15V 20 V/µs
R
L
= 2k, V
+
= 5V, V
–
= –5V 14 V/µs
Digital Inputs
V
IH
Digital Input High Voltage ●2.4 V
V
IL
Digital Input Low Voltage ●0.8 V
I
IN
Digital Input Current ●0.001 ±1µA
C
IN
Digital Input Capacitance (Note 4 ) V
IN
= 0V ●8pF
Timing Characteristics
t
DS
Data to WR Setup Time ●60 20 ns
t
DH
Data to WR Hold Time ●0–12 ns
t
WR
WR Pulse Width ●60 25 ns
t
LD
LD Pulse Width ●110 55 ns
t
CLR
Clear Pulse Width ●60 40 ns
t
LWD
WR to LD Delay Time ●0ns
Power Supply
I
CC
Supply Current, V
CC
Digital Inputs = 0V or V
CC
●1.5 10 µA
I
S
Supply Current, V
+
, V
–
±15V ●4.5 7.0 mA
±5V ●4.0 6.8 mA
V
CC
Supply Voltage ●4.5 5 5.5 V
V
+
Supply Voltage ●4.5 16.5 V
V
–
Supply Voltage ●–16.5 –4.5 V
4
LTC1821
Note 8: To 0.0015% for a full-scale change, measured from the rising
edge of LD.
Note 9: REF
= 0V. DAC register contents changed from all 0s to all 1s or all
1s to all 0s. LD low and WR high.
Note 10: Midscale transition code: 0111 1111 1111 1111 to
1000 0000 0000 0000. Unipolar mode, C
FEEDBACK
= 33pF.
Note 11: R1 and R2 are measured between R1 and R
COM
, REF and R
COM
.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: ±1LSB = ±0.0015% of full scale = ±15.3ppm of full scale.
Note 3: Using internal feedback resistor.
Note 4: Guaranteed by design, not subject to test.
Note 5: I
OUT
with DAC register loaded to all 0s.
Note 6: Typical temperature coefficient is 100ppm/°C.
Note 7: Measured in unipolar mode.
ELECTRICAL CHARACTERISTICS
TYPICAL PERFOR A CE CHARACTERISTICS
UW
TIME (µs)
0
OUTPUT VOLTAGE (mV)
–10
0
10
0.6 1.0
1821 G01
–20
–30
–40 0.2 0.4 0.8
20
30
40 C
FEEDBACK
= 30pF
V
REF
= 10V
1nV-s TYPICAL
FREQUENCY (Hz)
–90
SIGNAL/(NOISE + DISTORTION) (dB)
–70
–50
–40
10 1k 10k 100k
1821 G03
–110 100
–60
–80
–100
V
CC
= 5V
C
FEEDBACK
= 30pF
REFERENCE = 6V
RMS
500kHz FILTER
80kHz FILTER
30kHz FILTER
LD PULSE
5V/DIV
GATED
SETTLING
WAVEFORM
500µV/DIV
500ns/DIV 1821 G02
V
REF
= –10V
C
FEEDBACK
= 20pF
0V TO 10V STEP
FREQUENCY (Hz)
–90
SIGNAL/(NOISE + DISTORTION) (dB)
–70
–50
–40
10 1k 10k 100k
1821 G04
–110 100
–60
–80
–100
V
CC
= 5V USING AN LT1468
C
FEEDBACK
= 15pF
REFERENCE = 6V
RMS
500kHz FILTER
80kHz FILTER 30kHz
FILTER
FREQUENCY (Hz)
–90
SIGNAL/(NOISE + DISTORTION) (dB)
–70
–50
–40
10 1k 10k 100k
1821 G05
–110 100
–60
–80
–100
V
CC
= 5V USING AN LT1468
C
FEEDBACK
= 15pF
REFERENCE = 6V
RMS
500kHz FILTER
80kHz FILTER
30kHz FILTER
INTPUT VOLTAGE (V)
0
SUPPLY CURRENT (mA)
3
4
5
4
1821 G06
2
1
01235
V
CC
= 5V
ALL DIGITAL INPUTS
TIED TOGETHER
Midscale Glitch Impulse
Unipolar Multiplying Mode
Signal-to-(Noise + Distortion)
vs Frequency
Full-Scale Setting Waveform
Bipolar Multiplying Mode
Signal-to-(Noise + Distortion)
vs Frequency, Code = All Zeros
Bipolar Multiplying Mode
Signal-to-(Noise + Distortion)
vs Frequency, Code = All Ones VCC Supply Current vs Digital
Input Voltage
5
LTC1821
TYPICAL PERFOR A CE CHARACTERISTICS
UW
SUPPLY VOLTAGE (V)
0
0
LOGIC THRESHOLD (V)
0.5
1.0
1.5
2.0
3.0
1234
1821 G07
576
2.5
DIGITAL INPUT CODE
0
–1.0
INTEGRAL NONLINEARITY (LSB)
–0.8
–0.4
–0.2
0
1.0
0.4
16384 32768
1821 G08
–0.6
0.6
0.8
0.2
49152 65535
DIGITAL INPUT CODE
0
–1.0
DIFFERENTIAL NONLINEARITY (LSB)
–0.8
–0.4
–0.2
0
1.0
0.4
16384 32768
1821 G09
–0.6
0.6
0.8
0.2
49152 65535
REFERENCE VOLTAGE (V)
–10
INTEGRAL NONLINEARITY (LSB)
0.2
0.6
1.0
6
1821 G10
–0.2
–0.6
0
0.4
0.8
–0.4
–0.8
–1.0 –6 –2 2
–8 8
–4 0410
REFERENCE VOLTAGE (V)
–10
INTEGRAL NONLINEARITY (LSB)
0.2
0.6
1.0
6
1821 G11
–0.2
–0.6
0
0.4
0.8
–0.4
–0.8
–1.0 –6 –2 2
–8 8
–4 0410
REFERENCE VOLTAGE (V)
–10
DIFFERENTIAL NONLINEARITY (LSB)
0.2
0.6
1.0
6
1821 G12
–0.2
–0.6
0
0.4
0.8
–0.4
–0.8
–1.0 –6 –2 2
–8 8
–4 0410
REFERENCE VOLTAGE (V)
–10
DIFFERENTIAL NONLINEARITY (LSB)
0.2
0.6
1.0
6
1821 G13
–0.2
–0.6
0
0.4
0.8
–0.4
–0.8
–1.0 –6 –2 2
–8 8
–4 0410
SUPPLY VOLTAGE (V)
–1.0
INTEGRAL NONLINEARITY (LSB)
–0.8
–0.4
–0.2
0
1.0
0.4
245
1821 G14
–0.6
0.6
0.8
0.2
367
V
REF
= 10V
V
REF
= 10V
V
REF
= 2.5V
V
REF
= 2.5V
SUPPLY VOLTAGE (V)
INTEGRAL NONLINEARITY (LSB)
–2.0
–1.0
– 0.5
0
2.0
1.0
245
1821 G15
–1.5
1.5
0.5
367
V
REF
= 10V
V
REF
= 10V
V
REF
= 2.5V
V
REF
= 2.5V
Logic Threshold vs VCC Supply
Voltage Integral Nonlinearity (INL) Differential Nonlinearity (DNL)
Integral Nonlinearity vs Reference
Voltage in Unipolar Mode Integral Nonlinearity vs Reference
Voltage in Bipolar Mode Differential Nonlinearity vs
Reference Voltage in Unipolar Mode
Differential Nonlinearity vs
Reference Voltage in Bipolar Mode Integral Nonlinearity vs VCC Supply
Voltage in Unipolar Mode Integral Nonlinearity vs VCC Supply
Voltage in Bipolar Mode
6
LTC1821
TYPICAL PERFOR A CE CHARACTERISTICS
UW
SUPPLY VOLTAGE (V)
–1.0
DIFFERENTIAL NONLINEARITY (LSB)
–0.8
–0.4
–0.2
0
1.0
0.4
245
1821 G16
–0.6
0.6
0.8
0.2
367
V
REF
= 10V
V
REF
= 2.5V
V
REF
= 10V
V
REF
= 2.5V
SUPPLY VOLTAGE (V)
–1.0
DIFFERENTIAL NONLINEARITY (LSB)
–0.8
–0.4
–0.2
0
1.0
0.4
245
1821 G17
–0.6
0.6
0.8
0.2
367
V
REF
= 10V
V
REF
= 10V
V
REF
= 2.5V
V
REF
= 2.5V
Differential Nonlinearity vs VCC
Supply Voltage in Unipolar Mode Differential Nonlinearity vs VCC
Supply Voltage in Bipolar Mode
Unipolar Multiplying Mode Frequency
Response vs Digital Code Bipolar Multiplying Mode Frequency
Response vs Digital Code Bipolar Multiplying Mode Frequency
Response vs Digital Code
FREQUENCY (Hz)
–100
–120
ATTENUATION (dB)
–80
–40
0
100 10k 100k 10M
1821 G18
1k 1M
–20
–60
D15 ON
D14 ON
D13 ON
D12 ON
ALL BITS ON
D9 ON
D1 ON
D0 ON
D11 ON
D10 ON
D8 ON
D7 ON
D6 ON
D5 ON
D4 ON
D3 ON
D2 ON
ALL BITS OFF
30pF
8 9 10 11 14
13
11617
12
LTC1821 V
OUT
V
REF
FREQUENCY (Hz)
–100
ATTENUATION (dB)
–80
–40
0
10
*DAC ZERO VOLTAGE OUTPUT LIMITED BY BIPOLAR
ZERO ERROR TO –96dB TYPICAL (–78dB MAX, A GRADE)
1k 10k 10M1M
1821 G19
100 100k
–20
–60
D15 AND D14 ON
D15 AND D13 ON
D15 AND D12 ON
D15 AND D11 ON
D15 AND D10 ON
D15 AND D9 ON
D15 AND D8 ON
D15 AND D7 ON
D15 AND D6 ON
D15 AND D5 ON
D15 AND D4 ON
D15 AND D3 ON
D15 AND D2 ON
ALL BITS ON
D15 ON*
D15 AND D0 ON
D15 AND D1 ON
CODES FROM
MIDSCALE
TO FULL SCALE
15pF
12pF
–
+
12pF
VREF
VOUT
8910 11 14
13
17161
12
LT1468
LTC1821
2
3
6
FREQUENCY (Hz)
–100
ATTENUATION (dB)
–80
–40
0
10 1k 10k 10M1M
1821 G20
100 100k
–20
–60
D14 ON
D14 AND D13 ON
D14 TO D12 ON
D14 TO D11 ON
D14 TO D10 ON
D14 TO D9 ON
D14 TO D8 ON
D14 TO D7 ON
D14 TO D6 ON
D14 TO D5 ON
D14 TO D4 ON
D14 TO D3 ON
D14 TO D2 ON
D14 TO D1 ON
ALL BITS OFF
*DAC ZERO VOLTAGE OUTPUT LIMITED BY BIPOLAR
ZERO ERROR TO –96dB TYPICAL (–78dB MAX, A GRADE)
D14 TO D0 ON
D15 ON
*
CODES FROM
MIDSCALE
TO ZERO SCALE
15pF
12pF
–
+
12pF
V
REF
V
OUT
8910 11 14
13
17161
12
LT1468
LTC1821
2
3
6
7
LTC1821
I
OUT
(Pin 14): DAC Current Output. Normally tied through
a 22pF feedback capacitor in unipolar mode (15pF in
bipolar mode) to V
OUT
.
V
+
(Pin 15): Amplifier Positive Supply. Range is 4.5V to
16.5V.
AGNDS (Pin 16): Analog Ground Sense. Connect to
analog ground.
AGNDF (Pin 17): Analog Ground Force. Connect to
analog ground.
DNC (Pin 18, 19, 21): Connected internally. Do not
connect external circuitry to these pins.
V
–
(Pin 20): Amplifier Negative Supply. Range is –4.5V
to –16.5V.
NC (Pin 22): No Connection.
LD (Pin 23): DAC Digital Input Load Control Input. When
LD is taken to a logic high, data is loaded from the input
register into the DAC register, updating the DAC output.
WR (Pin 24): DAC Digital Write Control Input. When WR
is taken to a logic low, data is written from the digital input
pins into the 16-bit wide input reigster.
D15 (Pins 25): MSB or Digital Input Data Bit 15.
D14 (Pin 26): Digital Input Data Bit 14.
D13 (Pin 27): Digital Input Data Bit 13.
D12 (Pin 28): Digital Input Data Bit 12.
D11 (Pin 29): Digital Input Data Bit 11.
D10 (Pin 30): Digital Input Data Bit 10.
D9 (Pin 31): Digital Input Data Bit 9.
D8 (Pin 32): Digital Input Data Bit 8.
D7 (Pin 33): Digital Input Data Bit 7.
D6 (Pin 34): Digital Input Data Bit 6.
D5 (Pin 35): Digital Input Data Bit 5.
D4 (Pin 36): Digital Input Data Bit 4.
DGND (Pin 1): Digital Ground. Connect to analog ground.
V
CC
(Pin 2): Positive Supply Input. 4.5V ≤ V
CC
≥ 5.5V.
Requires a bypass capacitor to ground.
D3 (Pin 3): Digital Input Data Bit 3.
D2 (Pin 4): Digital Input Data Bit 2.
D1 (Pin 5): Digital Input Data Bit 1.
D0 (Pin 6): LSB or Digital Input Data Bit 0.
CLR (Pin 7): Digital Clear Control Function for the DAC.
When CLR is taken to a logic low, it sets the DAC output
and all internal registers to: zero code for the LTC1821 and
midscale code for the LTC1821-1.
REF (Pin 8): Reference Input and 4-Quadrant Resistor R2.
Typically ±10V, accepts up to ±15V. In 2-quadrant mode,
tie this pin to the external reference signal. In 4-quadrant
mode, this pin is driven by external inverting reference
amplifier.
R
COM
(Pin 9): Center Tap Point of the Two 4-Quadrant
Resistors R1 and R2. Normally tied to the inverting input
of an external amplifier in 4-quadrant operation. Other-
wise this pin is shorted to the REF pin. See Figures 1
and 2.
R1 (Pin 10): 4-Quadrant Resistor R1. In 2-quadrant
operation, short this pin to the REF pin. In 4-quadrant
mode, tie this pin to the external reference signal.
R
OFS
(Pin 11): Bipolar Offset Resistor. Typically swings
±10V, accepts up to ±15V. For 2-quadrant operation, tie
this pin to R
FB
and for 4-quadrant operation, tie this pin to
R1.
R
FB
(Pin12): Feedback Resistor. Normally connected to
V
OUT
. Typically swings ±10V. The voltage at this pin
swings 0 to V
REF
in unipolar mode and ±V
REF
in bipolar
mode.
V
OUT
(Pin 13): DAC Voltage Output. Normally connected
to R
FB
and to I
OUT
through a 22pF feedback capacitor in
unipolar mode (15pF in bipolar mode). Typically swings
±10V.
PIN FUNCTIONS
UUU
8
LTC1821
Table 1
CONTROL INPUTS
CLR WR LD REGISTER OPERATION
0 X X Reset Input and DAC Register to All 0s for LTC1821 and Midscale for LTC1821-1 (Asynchronous Operation)
1 0 0 Write Input Register with All 16 Data Bits
1 1 1 Load DAC Register with the Contents of the Input Register
1 0 1 Input and DAC Register Are Transparent
1 CLK = LD and WR Tied Together. The 16 Data Bits Are Written Into the Input Register on the Falling Edge of the CLK and Then
Loaded Into the DAC Register on the Rising Edge of the CLK
1 1 0 No Register Operation
TRUTH TABLE
96k 12k 12k
96k
48k
96k
48k
96k
DECODER
D15
(MSB) D13
D14
D15
D12 D11 D0
(LSB)
LOAD
V
CC
REF R
FB
V
OUT
I
OUT
DNC*
CLR
7
DGND
*CONNECTED INTERNALLY.
DO NOT CONNECT EXTERNAL
CIRCUITRY TO THESE PINS
1
1821 BD
DAC REGISTER
48k 48k 48k 48k 48k 48k 48k
12k
23
2
R1 10
R
COM
9
8
LD
24
25
D14
26
D4
36
D3
3
D2
4
D0
6
D1
5
WR
18
NC
22
13
DNC*
19
DNC*
21
V
+
15
14
V
–
20
AGNDS
16
AGNDF
17
12
R
OFS
11
• • •
12k
WR INPUT REGISTER
• • • •
RST
RST
–
+
BLOCK DIAGRA
W
9
LTC1821
Description
The LTC1821 is a 16-bit voltage output DAC with a full
parallel 16-bit digital interface. The device can operate
from 5V and ±15 supplies and provides both unipolar 0V
to – 10V or 0V to 10V and bipolar ±10V output ranges from
a 10V or –10V reference input. Additionally, the power
supplies for the LTC1821 can go as low as 4.5V and ±4.5V.
In this case for a 2.5V or –2.5V reference, the output range
is 0V to –2.5V, 0V to 2.5V and ±2.5V. The LTC1821 has
three additional precision resistors on chip for bipolar
operation. Refer to the block diagram regarding the fol-
lowing description.
The 16-bit DAC consists of a precision R-2R ladder for the
13 LSBs. The three MSBs are decoded into seven seg-
ments of resistor value R. Each of these segments and the
R-2R ladder carries an equally weighted current of one
eighth of full scale. The feedback resistor R
FB
and
4-quadrant resistor R
OFS
have a value of R/4. 4-quadrant
resistors R1 and R2 have a magnitude of R/4. R1 and R2
together with an external op amp (see Figure 2) inverts the
reference input voltage and applies it to the 16-bit DAC
input REF, in 4-quadrant operation. The REF pin presents
a constant input impedance of R/8 in unipolar mode and
R/12 in bipolar mode.
The LTC1821 contains an onboard precision high speed
amplifier. This amplifier together with the feedback resis-
tor (R
FB
) form a precision current-to-voltage converter for
the DAC’s current output. The amplifier has very low noise,
offset, input bias current and settles in less than 2µs to
0.0015% for a 10V step. It can sink and source 22mA
(±15V) typically and can drive a 300pF capacitive load. An
added feature of these devices, especially for waveform
generation, is a proprietary deglitcher that reduces glitch
impulse to below 2nV-s over the DAC output voltage range.
Digital Section
The LTC1821 has a 16-bit wide full parallel data bus input.
The device is double-buffered with two 16-bit registers.
The double-buffered feature permits the update of several
DACs simultaneously. The input register is loaded directly
from a 16-bit microprocessor bus when the WR pin is
brought to a logic low level. The second register (DAC
register) is updated with the data from the input register
when the LD signal is brought to a logic high. Updating the
DAC register updates the DAC output with the new data. To
make both registers transparent in flowthrough mode, tie
WR low and LD high. However, this defeats the deglitcher
operation and output glitch impulse may increase. The
deglitcher is activated on the rising edge of the LD pin. The
APPLICATIONS INFORMATION
WUUU
DATA
LD
CLR
1821 TD
t
WR
t
DS
t
LD
t
DH
t
LWD
WR
t
CLR
TI I G DIAGRA
UWW
10
LTC1821
versatility of the interface also allows the use of the input
and DAC registers in a master slave or edge-
triggered
configuration. This mode of operation occurs when WR
and LD are tied together. The asynchronous clear pin
resets the LTC1821 to zero scale and the LTC1821-1
to
midscale. CLR resets both the input and DAC registers.
These devices also have a power-on reset. Table 1 shows
the truth table for the LTC1821.
Figure 1. Unipolar Operation (2-Quadrant Multiplication) VOUT = 0V to –VREF
APPLICATIONS INFORMATION
WUUU
V
CC
LTC1821
R
FB
R
FB
R
OFS
R
OFS
5V
LD
LD
10 9
24 23 718
2
13
15
20
117 16
R1 R
COM
8
REF
11 12
0.1µF
0.1µF
15V
–15V
14
I
OUT
V
OUT
22pF
V
OUT
=
0V TO
–V
REF
1821 F01
AGNDF AGNDS
DGND
WR
25 TO 36,
3 TO 6
WR
CLR DNC* DNC*
CLR
V
REF
–
+
16-BIT DAC
R1 R2
16
DATA
INPUTS
0.1µF
Unipolar Binary Code Table
DIGITAL INPUT
BINARY NUMBER
IN DAC REGISTER
–V
REF
(65,535/65,536)
–V
REF
(32,768/65,536) = –V
REF
/2
–V
REF
(1/65,536)
0V
LSB
1111 1111 1111
0000 0000 0000
0000 0000 0001
0000 0000 0000
ANALOG OUTPUT
VOUT
MSB
1111
1000
0000
0000
19
DNC*
21
NC
22
V
–
V
+
*DO NOT CONNECT
Unipolar Mode
(2-Quadrant Multiplying, V
OUT
= 0V to –V
REF
)
The LTC1821 can be used to provide 2-quadrant multiply-
ing operation as shown in Figure 1. With a fixed –10V
reference, the circuit shown gives a precision unipolar 0V
to 10V output swing.
11
LTC1821
Figure 2. Bipolar Operation (4-Quadrant Multiplication) VOUT = –VREF to VREF
Bipolar Mode
(4-Quadrant Multiplying, V
OUT
= –V
REF
to V
REF
)
The LTC1821 contains on chip all the 4-quadrant resistors
necessary for bipolar operation. 4-quadrant multiplying
APPLICATIONS INFORMATION
WUUU
operation can be achieved with a minimum of external
components—a capacitor and a single op amp, as shown
in Figure 2. With a fixed 10V reference, the circuit shown
gives a precision bipolar –10V to 10V output swing.
V
CC
LTC1821
R
FB
R
FB
R
OFS
R
OFS
5V
LD
LD
10 9
24 23 718
2
13
15
20
117 16
R1 R
COM
8
6
3
2
REF
11 12
0.1µF
0.1µF
15V
–15V
14
I
OUT
V
OUT
22pF
V
OUT
=
–V
REF
TO V
REF
1821 F02
AGNDF AGNDS
DGND
WR
25 TO 36,
3 TO 6
WR
CLR DNC* DNC*
CLR
V
REF
–
+
16-BIT DAC
R1 R2
16
DATA
INPUTS
0.1µF
19
DNC*
21
NC
22
V
–
V
+
–
+
LT1001
Bipolar Offset Binary Code Table
DIGITAL INPUT
BINARY NUMBER
IN DAC REGISTER
V
REF
(32,767/32,768)
V
REF
(1/32,768)
0V
–V
REF
(1/32,768)
–V
REF
LSB
1111 1111 1111
0000 0000 0001
0000 0000 0000
1111 1111 1111
0000 0000 0000
ANALOG OUTPUT
V
OUT
MSB
1111
1000
1000
0111
0000
*DO NOT CONNECT
12
LTC1821
Precision Voltage Reference Considerations
Because of the extremely high accuracy of the 16-bit
LTC1821, careful thought should be given to the selection
of a precision voltage reference. As shown in the section
describing the basic operation of the LTC1821, the output
voltage of the DAC circuit is directly affected by the voltage
reference; thus, any voltage reference error will appear as
a DAC output voltage error.
There are three primary error sources to consider when
selecting a precision voltage reference for 16-bit applica-
tions: output voltage initial tolerance, output voltage tem-
perature coefficient (TC), and output voltage noise.
Initial reference output voltage tolerance, if uncorrected,
generates a full-scale error term. Choosing a reference
with low output voltage initial tolerance, like the LT1236
(±0.05%), minimizes the gain error due to the reference;
however, a calibration sequence that corrects for system
zero- and full-scale error is always recommended.
A reference’s output voltage temperature coefficient af-
fects not only the full-scale error, but can also affect the
circuit’s INL and DNL performance. If a reference is
chosen with a loose output voltage temperature coeffi-
cient, then the DAC output voltage along its transfer
characteristic will be very dependent on ambient condi-
tions. Minimizing the error due to reference temperature
coefficient can be achieved by choosing a precision refer-
ence with a low output voltage temperature coefficient
and/or tightly controlling the ambient temperature of the
circuit to minimize temperature gradients.
As precision DAC applications move to 16-bit and higher
performance, reference output voltage noise may contrib-
ute a dominant share of the system’s noise floor. This in
turn can degrade system dynamic range and signal-to-
noise ratio. Care should be exercised in selecting a voltage
Table 2. Partial List of LTC Precision References Recommended
for Use with the LTC1821, with Relevant Specifications
INITIAL TEMPERATURE 0.1Hz to 10Hz
REFERENCE TOLERANCE DRIFT NOISE
LT1019A-5, ±0.05% 5ppm/°C12µV
P-P
LT1019A-10
LT1236A-5, ±0.05% 5ppm/°C3µV
P-P
LT1236A-10
LT1460A-5, ±0.075% 10ppm/°C20µV
P-P
LT1460A-10
LT1790A-2.5 ±0.05% 10ppm/°C12µV
P-P
APPLICATIONS INFORMATION
WUUU
reference with as low an output noise voltage as practical
for the system resolution desired. Precision voltage refer-
ences, like the LT1236, produce low output noise in the
0.1Hz to 10Hz region, well below the 16-bit LSB level in 5V
or 10V full-scale systems. However, as the circuit band-
widths increase, filtering the output of the reference may
be required to minimize output noise.
Grounding
As with any high resolution converter, clean grounding is
important. A low impedance analog ground plane and star
grounding should be used. AGNDF and AGNDS must be
tied to the star ground with as low a resistance as possible.
When it is not possible to locate star ground close to
AGNDF and AGNDS, separate traces should be used to
route these pins to the star ground. This minimizes the
voltage drop from these pins to ground due to the code
dependent current flowing into the ground plane. If the
resistance of these separate circuit board traces exceeds
1Ω, the circuit of Figure␣ 3 eliminates this code dependent
voltage drop error for high resistance traces.
To calculate PC track resistance in squares, divide the
length of the PC track by the width and multiply this result
by the sheet resistance of copper foil. For 1 oz copper
(≈1.4 mils thick), the sheet resistance is 0.045Ω per
square.
13
LTC1821
Figure 3. Driving AGNDF and AGNDS with a Force/Sense Amplifier
APPLICATIONS INFORMATION
WUUU
15V
0.1µF
0.1µF
–15V
1000pF
VCC
LTC1821
RFB
RFB
ROFS
ROFS
5V
10 92
R1 RCOM
8
REF
11 12
0.1µF
14
22pF
VOUT =
0V TO –10V
VOUT
1821 F03
–
+
–
+
LT1001
ALTERNATE AMPLIFIER FOR OPTIMUM SETTLING TIME PERFORMANCE
16-BIT DAC
R1 R2
IOUT
25 TO 36,
3 TO 6
16
DATA
INPUTS
LD
WR
CLR
19
DGND
13
20
V–
V+15
3
6
6
17
17
16
16
ERA82.004
2
LT1236A-10
2 6 10V
15V 4
LD
24 23 718
WR CLR DNC* DNC*
19
DNC*
21
NC AGNDF
AGNDS
22
–
+
LT1468 3
ERA82.004
2
200Ω200Ω
*DO NOT CONNECT
AGNDS
AGNDF
14
LTC1821
17-Bit Sign Magnitude Output Voltage DAC with Bipolar Zero Error of 140µV (0.92LSB at 17 Bits)
V
CC
15pF
V
–
V
+
0.1µF
0.1µF
LTC1821
R
FB
R
FB
R
OFS
R
OFS
5V
LD
10
3
LTC203AC
21
64
2
15V
141516
92
6
3
2
16
117
R1 R
COM
8
REF
11 12 14
0.1µF
I
OUT
22pF
V
OUT
1821 TA03
DGND AGNDF AGNDS
–
+
LT1468
25 TO 36,
3 TO 6
SIGN
BIT
WR
CLR
–
+
16-BIT DAC
R1 R2
16
DATA
INPUTS
LT1236A-10
LD
24 23 718
WR CLR DNC* DNC*
19
DNC*
21
NC
22
13
15
20
0.1µF
–15V
15V
V
OUT
0.1µF
V
–
V
+
*DO NOT CONNECT
TYPICAL APPLICATION
U
15
LTC1821
Dimensions in inches (millimeters) unless otherwise noted.
GW Package
36-Lead Plastic SSOP (Wide 0.300)
(LTC DWG # 05-08-1642)
GW36 SSOP 1098
0° – 8° TYP
0.231 – 0.3175
(0.0091 – 0.0125) 0.610 – 1.016
(0.024 – 0.040)
7.417 – 7.595**
(0.292 – 0.299)
× 45°
0.254 – 0.406
(0.010 – 0.016)
2.286 – 2.387
(0.090 – 0.094)
0.127 – 0.305
(0.005 – 0.0115)
2.463 – 2.641
(0.097 – 0.104)
0.800
(0.0315)
BSC
0.304 – 0.431
(0.012 – 0.017)
15.290 – 15.544*
(0.602 – 0.612)
1 2 3 4 5 6 7 8 9 101112131415161718
10.160 – 10.414
(0.400 – 0.410)
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.152mm (0.006") PER SIDE
*
NOTE: DIMENSIONS ARE IN MILLIMETERS
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE
**
PACKAGE DESCRIPTION
U
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
16
LTC1821
LINEAR TECHNOLOGY CORPORATION 2000
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear-tech.com
1821f LT/TP 0401 4K • PRINTED IN USA
PART NUMBER DESCRIPTION COMMENTS
ADCs LTC1417 Low Power 400ksps, 14-Bit ADC 20mW, Single or ±5V, Serial I/O
LTC1418 14-Bit, 200ksps, Single 5V ADC 15mW, Serial/Parallel ±10V
LTC1604/LTC1608 16-Bit, 333ksps/500ksps, ±5V ADC 90dB SINAD, 100dB THD, ±2.5V Inputs
LTC1605/LTC1606 16-Bit, 100ksps/250ksps, Single 5V ADC ±10V Inputs, 55mW/75mW, Byte or Parallel I/O
LTC1609 16-Bit, 200ksps, Single 5V ADC ±10V Inputs, 65mW, Serial I/O
LTC2400 24-Bit, Micropower ∆Σ ADC in SO-8 0.3ppm Noise, 4ppm INL, 10ppm Total Unadjusted Error, 200µA
LTC2410 24-Bit, Fully Differential, No Latency ∆Σ ADC 0.16ppm Noise, 2ppm INL, 10ppm Total Unadjusted Error, 200µA
DACs LTC1591/LTC1597 Parallel 14-/16-Bit Current Output DACs On-Chip 4-Quadrant Resistors
LTC1595/LTC1596 Serial 16-Bit Current Output DACs in SO-8/S16 Low Glitch, ±1LSB Maximum INL, DNL
LTC1599 Parallel 2 Byte 16-Bit Current Output DAC On-Chip 4-Quadrant Resistors
LTC1650 Serial 16-Bit ±5V Voltage Output DAC Low Noise and Low Glitch Rail-to-Rail V
OUT
LTC1654 Dual 14-Bit Rail-to-Rail V
OUT
DAC Programmable Speed/Power, 3.5µs/750µA, 8µs/450µA
LTC1655/LTC1655L Serial 5V/3V 16-Bit Voltage Output DAC in SO-8 Low Power, Deglitched, Rail-to-Rail V
OUT
LTC1657/LTC1657L Parallel 5V/3V 16-Bit Voltage Output DAC Low Power, Deglitched, Rail-to-Rail V
OUT
LTC1658 Serial 14-Bit Voltage Output DAC Low Power, 8-Lead MSOP Rail-to-Rail V
OUT
Op Amps LT1001 Precision Operational Amplifier Low Offset, Low Drift
LT1468 90MHz, 22V/µs, 16-Bit Accurate Op Amp Precise, 1µs Settling to 0.0015%
References LT1019 Bandgap Reference ±0.05% Initial Tolerance, 5ppm/°C
LT1236 Precision Buried Zener Reference ±0.05% Initial Tolerance, Low Noise 3µV
P-P
LT1460 Micropower Bandgap Reference ±0.075% Initial Tolerance, 10ppm/°C
LT1790 SOT-23 Micropower, Low Dropout Reference ±0.05% Initial Tolerance, 10ppm/°C
RELATED PARTS
