Page 1 of 4
Document No. 70-0217-01 │www. pse mi.com ©2006 Peregrine Semiconductor Corp. All rights reserved.
Contact sales@psemi.com for full version of datasheet
The PE42612 SP4T RF UltraCMOS™ Flip
Chip Switch is desig ned specif ically to add ress
the need s of the ant enna swit ch module
market for GSM Handsets. On-chip CMOS
de code logic is used to facilitate two-pin, low
voltage CMOS control inp uts . High E SD
tolerance of 1500 V at all ports, no blocking
capacitor requirements and on-chip SAW filter
over-voltage protection devices make this the
ultimate in integration and ease of use.
The PE42612 is manufactured on Peregrine’s
Ul tr aCM OS™ pr oc es s, a pat en te d v ar iati o n of
silicon -on-insulato r (SOI ) technology on a
sapphire substrate, offering the performance
of GaAs with the econom y an d i nte gr ation of
conventional CMOS.
Product Brief
SP4T UltraCMOS™ 2.6 V Switch
100 – 3000 MH z
Product Description
Figure 1. Functional Diagram
PE42612 Flip Chip
Features
• Two pin CMOS logic control inputs
• Supports 1.8 V Control Logic
• Low TX insertion loss: 0.55 dB at
900 MH z, 0.70 dB at 190 0 MHz
• Isolation of 39 dB at 900 MHz, 31 dB at
1900 MHz
• Low har m o ni cs 2fo = -82 dBc and
3fo = -74 dBc at 35 dBm input power
• 1500 V HBM ESD tolerance
• Bu ilt in CMOS decoder/driver
• RX SAW over voltage protection circuit
• No blocking capacitors required
Figure 2. Die Top View
RX1
RX2
TX1
TX2
CMOS
Control/Driver
and ESD
V1 V2
1
RX1
2
GND
3
RX2
V1
4
V2
5
VDD
6
GND
7
9
GND
8
TX2
11
N/C
12
ANT
10
TX1
Product Brief
PE42612
Page 2 of 4
©2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0217-01 │ UltraCMOS™ RFIC Solutions
Contact sales@psemi.com for full version of datasheet
Table 2. Opera ti ng Ranges Table 3. Absolute Max imum Rati ngs
Table 1. PE42612 Electrical Specifications: Temp = 25°C, VDD = 2.6 V
Parameter Condition Min Typ Max Unit
Operational Frequency 100 3000 MHz
Insertion Loss
ANT - TX - 850 / 900 MHz
ANT - TX - 1800 / 1900 MHz
ANT - RX - 850 / 900 MHz
ANT - RX - 1800 / 1900 MHz
0.55
0.7
0.85
1.05
0.65
0.8
1.0
1.2
dB
dB
dB
dB
Isolation
TX - RX - 850 / 900 MHz (TX ON)
TX - RX - 1800 / 1900 MHz (TX ON)
TX1 - TX2 - 850 / 900 MHz (TX1 ON)
TX1 - TX2 - 1800 / 1900 M Hz (TX1 ON )
37
29
33
26
39
31
35
28
dB
dB
dB
dB
Return Loss 850 / 90 0 MHz
1800 / 19 00 MH z 18
14 20
16 dB
dB
2nd Harmonic1,2 35 dBm TX Input Power - 850 / 900 MHz
33 dBm TX Input Powe r - 1800 / 1900 MH z -82
-89 -78
-82 dBc
dBc
3rd Harmonic1,2 35 dBm TX Input Power - 850 / 900 MHz
33 dBm TX Input Powe r - 1800 / 1900 MH z -74
-68 -69
-65 dBc
dBc
Switching time (10-90%) (90-10%) RF 2 3 µs
Notes: 1. Measured in Pulsed Wave Mode.
2. Assumes RF inpu t duty cycle o f 50% and 4620 µs , me as ured per 3G PP TS 45.00 5
Parameter Symbol Min Typ Max Units
Temperature range TOP -40 +85 °C
VDD Supply Voltage VDD 2.4 2.6 2.95 V
IDD Power Supply Curren t
(VDD = 2.6 V) IDD 11 25 µA
TX input power (VSWR ≤ 3:1)
824-915 MHz +35 dBm
+33
RX input power
(VSWR ≤1:1) PIN +20 dBm
Control Voltage High VIH 1.40 V
Control Voltage Low VIL 0.40 V
PIN
TX input power (VSWR ≤ 3:1)
1710-1910 MHz
Control Line Current 1 µA
Symbol Parameter/Conditions Min Max Units
VDD Power supply voltage -0.3 4.0 V
VI Voltage on any DC input -0.3 VDD+
0.3 V
TST Storage temperature range -65 +150 °C
TOP Operating temperature range -40 +85 °C
PIN
TX input power (50 Ω)3,4
824-915 MHz +38
dBm
TX input power (50 Ω)3,4
1710-1910 MHz +36
RX input power (50 Ω) +23
PIN (∞:1 )
TX input pow er (VSWR = (∞:1)3,4
824-915 MHz +35
dBm
TX input pow er (VSWR = (∞:1)3,4
1710-1910 MHz +33
VESD
ESD Voltage (HBM, MIL_STD
883 Method 30 15 . 7) 1500 V
ESD Voltage (MM, JEDEC,
JESD22-A114-B) 100 V
Note: 3. Assumes RF input duty cycle of 50% and 4620 µs.
4. VDD within operating range specified in Table 4.
Absolut e M ax i m um Ratings are those v alues lis ted in
the above table. E xceeding t hes e values may c aus e
permanent device dam age. Functional oper ation
should be restric ted to the limits in the DC Electric al
Specif ications table. Exposur e to absolut e maximum
rati ngs for extended periods m ay affect dev ic e
reliability.
Product Brief
PE42612
Page 3 of 4
Document No. 70-0217-01 │www. pse mi.com ©2006 Peregrine Semiconductor Corp. All rights reserved.
Contact sales@psemi.com for full version of datasheet
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Latc h-Up Avoidance
Unlike conventional CMOS devic es, UltraCMOS™
devices are immune to latch-up.
Table 5. Truth Table
Table 6. Ordering Information
Table 4 . Pin Descriptions
Figure 3. Pin Confi guration (Ball -S ide Up)
Order Code Die ID Description Package Shippin g Met hod
PE42612-90 (Unitive) C9817_1 PE42612-DIE-D Film Frame Wafer (Gross Die / Wafer Quantity)
PE42612-91 (FCI) C9817_1 PE42612-DIE-D Film Frame Wafer (Gross Die / Wafer Quantity)
PE42612-00 C9817_1 PE42612-DIE-1H Evaluation Kit 1 / Box
PE42612
Die
7 6 45
10 11 112
9 2
8 3
GND
TX2
GND
GND
RX1
RX2
V1
VDD V2
N/C ANT
TX1
Pin No. Pin Name Description
15 RX1 RF I/O – RX1
2 GND Ground
35 RX2 RF I/O – RX2
4 V1 Swi tch control input, CMOS lo gic level
5 V2 Swi tch control input, CMOS lo gic level
6 VDD Supply
7 GND Ground
85 TX2 RF I/O - TX2
9 GND Ground
105 TX1 RF I/O - TX1
11 N/C
No Connect – Pin to be connected to an
electrically isolated low capacitance pad
125 ANT RF Common – Antenna Input
Note: 5. Blocking capacitors need ed only when non-zero D C
voltage present.
Path V2 V1
ANT - RX1 0 0
ANT - RX2 0 1
ANT - TX1 1 0
ANT - TX2 1 1
Product Brief
PE42612
Page 4 of 4
©2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0217-01 │ UltraCMOS™ RFIC Solutions
Contact sales@psemi.com for full version of datasheet
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Tel: +33-1-4741-9173
Fax : +33-1 -4741 -917 3
For a list of representat ives in your area, please refer to our Web site at: www.psem i.com
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Advance Information
The product is in a formative or design stage. The data
sheet contains design target specif icat ions for product
development. Specifications and features may change in
any manner without notice.
Preliminary Specification
The data sheet contains pr eliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any tim e without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final data . In the event Peregrine
dec ide s to cha nge the spe c ific a tions, Pereg rine will not ify
cust omers of the intended changes by issu ing a DCN
(Document Change Notice).
The information in this data sheet is believed to be reliable.
Howeve r, Peregrine assum es no liability f or th e use of this
information. Use shall be entirely at the user’s own r isk.
No patent rights or licenses t o any circuits descr ibed in this
data sheet are implied or granted t o any third party.
Peregrine’s pr oducts are not designed or intended f or use in
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Peregr ine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
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Semiconductor Corp.
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