DG4051E, DG4052E, DG4053E
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S16-0623-Rev. A, 11-Apr-16 1Document Number: 69685
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Low Capacitance, Low Charge Injection, 4- / 8-Channel,
Triple SPDT, ± 5 V / 12 V / 5 V / 3 V Analog Multiplexers
DESCRIPTION
The DG4051E, DG4052E, and DG4053E are high precision
CMOS analog multiplexers. The DG4051E is an 8-channel
multiplexer, the DG4052E is a dual 4-channel multiplexer,
and the DG4053E is a triple 2-channel multiplexer or triple
SPDT.
The DG4051E, DG4052E, and DG4053E feature low
leakage, parasitic capacitance, and low charge injection
of 0.3 pC over the full voltage range. These devices are ideal
for high precision signal switching and multiplexing.
Designed to operate from a 3 V to 16 V single supply or from
a ± 3 V to ± 8 V dual supplies, the DG4051E, DG4052E, and
DG4053E are fully specified at 3 V, 5 V, 12 V and ± 5 V. All
control logic inputs have guaranteed 2 V logic high limit
when operating from 5 V or ± 5 V supplies and 1.4 V when
operating from a 3 V supply.
All switches conduct equally well in both directions, offering
rail to rail analog signal switching and can be used both as
multiplexers as well as de-multiplexers.
The DG4051E, DG4052E, and DG4053E operating
temperature is specified from -40 °C to +125 °C and
are available in 16 pin TSSOP and the ultra compact
1.8 mm x 2.6 mm miniQFN16 packages.
BENEFITS
Wide operation voltage range
Low charge injection
Low parasitic capacitance
Compact package option
FEATURES
3 V to 16 V single supply or ± 3 to ± 8 V dual
supply operation
Low parasitic capacitance:
CD(ON): 8.5 pF / typ. (DG4053E)
CS(OFF): 2.0 pF / typ. (DG4053E)
Less than 0.3 pC charge injection over the full signal swing
range
Low leakage: < 50 pA, typ.
Fast switching tON: 35 ns, typ.
3 V logic compatible for control
Bi-directional rail to rail signal switching
Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
APPLICATIONS
Automatic test equipment
Process control and automation
Data acquisition systems
Meters and instruments
Medical and healthcare systems
Communication systems
Audio and video signal routing
Relay replacement
Battery powered systems
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
ENABLE = LO, all switches are controlled by addr pins.
ENABLE = HI, all switches are off.
X0
A
X3
11
12
13
14
X2
C
B
X1
V+
9
10
16
15
X
X7
X5
V-
X4
X6
ENABLE
GND
3
4
5
6
1
2
7
8
Top View
DG4051E
TSSOP16
Top View
DG4052E
TSSOP16
Y
Y1
X
Y0
Y2
X0
A
X3
11
12
13
14
X2
B
X1
V+
9
10
16
15
V-
ENABLE
GND
3
4
5
6
1
2
7
8
Logic
Logic
ENABLE
DG4053E
TSSOP16
C
Top View
Y
Z0
Y1
X
Y0
Z1
X0
A
11
12
13
14
Z
B
X1
V+
9
10
16
15
V-
ENABLE
GND
3
4
5
6
1
2
7
8
DG4051E, DG4052E, DG4053E
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S16-0623-Rev. A, 11-Apr-16 2Document Number: 69685
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
Note
a. -40 °C to +85 °C datasheet limits apply.
TRUTH TABLE
ENABLE
INPUT
SELECT INPUTS ON SWITCHES
C B A DG4051E DG4052E DG4053E
H X X X All switches open All switches open All switches open
L L L L X to X0 X to X0, Y to Y0 X to X0, Y to Y0, Z to Z0
L L L H X to X1 X to X1, Y to Y1 X to X1, Y to Y0, Z to Z0
L L H L X to X2 X to X2, Y to Y2 X to X0, Y to Y1, Z to Z0
L L H H X to X3 X to X3, Y to Y3 X to X1, Y to Y1, Z to Z0
L H L L X to X4 X to X0, Y to Y0 X to X0, Y to Y0, Z to Z1
L H L H X to X5 X to X1, Y to Y1 X to X1, Y to Y0, Z to Z1
L H H L X to X6 X to X2, Y to Y2 X to X0, Y to Y1, Z to Z1
L H H H X to X7 X to X3, Y to Y3 X to X1, Y to Y1, Z to Z1
ORDERING INFORMATION
TEMPERATURE RANGE CONFIGURATION PACKAGE PART NUMBER MIN. ORDER / PACKAGING QUANTITY
-40 °C to +125 °C a
Lead (Pb)-Free
DG4051E
16-pin TSSOP DG4051EEQ-T1-GE3 Tape and reel 3000 units
16-pin SOIC DG4051EEY-T1-GE3 Tape and reel 2500 units
16-pin miniQFN DG4051EEN-T1-GE4 Tape and reel 3000 units
DG4052E
16-pin TSSOP DG4052EEQ-T1-GE3 Tape and reel 3000 units
16-pin SOIC DG4052EEY-T1-GE3 Tape and reel 2500 units
16-pin miniQFN DG4052EEN-T1-GE4 Tape and reel 3000 units
DG4053E
16-pin TSSOP DG4053EEQ-T1-GE3 Tape and reel 3000 units
16-pin SOIC DG4053EEY-T1-GE3 Tape and reel 2500 units
16-pin miniQFN DG4053EEN-T1-GE4 Tape and reel 3000 units
Pin 1
Device Marking: Fxx for DG4051E
(miniQFN16) Gxx for DG4052E
Hxx for DG4053E
xx = Date/Lot Traceability Code
Exx
X
X7
X5
X0
A
X3
1
2
3
4
7
8
9
10
11
12
58
7
6
1314
X4
16
V-
X2
C
X6
ENABLE
B
X1
GND
V+
Top View
DG4051E
mQFN-16
Top View
DG4052E
mQFN-16
Logic
Y
Y3
Y1
X
X3
X0
1
2
3
4
8
9
10
11
12
586
13
14
Y0
16
V-
X2
B
Y2
ENABLE
A
X1
GND
Logic
15
15
7
V+
Z1
Z
Z0
1
2
3
4
7
8
9
10
11
12
58
7
6
13
14
15
16
Y
Y1
Y0
GND
Top View
DG4053E
mQFN-16
V+
ENABLE
V-
A
B
C
X1
X
X0
DG4051E, DG4052E, DG4053E
www.vishay.com Vishay Siliconix
S16-0623-Rev. A, 11-Apr-16 3Document Number: 69685
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Notes
a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 5.6 mW/°C above 70 °C.
d. Derate 6.6 mW/°C above 70 °C.
e. Derate 8.0 mW/°C above 70 °C.
f. Manual soldering with iron is not recommended for leadless components. The miniQFN-16 is a leadless package. The end of the lead
terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper lip
cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER LIMIT UNIT
V+ to V- -0.3 to +18
V
GND to V- -18
Digital Inputs a, VS, VD(V-) - 0.3 to (V+) + 0.3
or 30 mA, whichever occurs first
Continuous Current (any terminal) 30 mA
Peak Current, S or D (pulsed 1 ms, 10 % duty cycle) 100
Storage Temperature -65 to +150 °C
Power Dissipation b
16-pin TSSOP c450
mW16-pin miniQFN d, f 525
16-pin narrow SOIC e640
Thermal Resistance b
16-pin TSSOP c178
°C/W16-pin miniQFN d, f 152
16-pin narrow SOIC e125
ESD Human Body Model (HBM); per ANSI / ESDA / JEDEC® JS-001 2500 V
Latch Up Current, per JESD78D 400 mA
SPECIFICATIONS FOR DUAL SUPPLIES
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE SPECIFIED
V+ = 5 V, V- = -5 V
VIN(A, B, C, and enable) = 2 V, 0.8 V a
TEMP. b TYP.
c
-40 °C to +125 °C -40 °C to +85 °C
UNIT
MIN. dMAX. dMIN. dMAX. d
Analog Switch
Analog Signal Range eVANALOG Full - -5 5 -5 5 V
On-Resistance RON IS = 1 mA, VD = -3 V, 0 V, 3 V Room 68 - 78 - 78
Full - - 106 - 97
On-Resistance Match RON IS = 1 mA, VD = ± 3 V Room 0.91 - 6 - 6
Full - - 6 - 6
On-Resistance
Flatness RFLATNESS IS = 1 mA, VD = -3 V, 0 V, 3 V Room 10 - 17 - 17
Full - - 20 - 19
Switch Off
Leakage Current
IS(off) V+ = 5.5 V, V- = -5.5 V,
VD = ± 4.5 V, VS = 4.5 V
Room ± 0.05 -1 1 -1 1
nA
Full - -50 50 -5 5
ID(off)
Room ± 0.05 -1 1 -1 1
Full - -50 50 -5 5
Channel On
Leakage Current ID(on) V+ = 5.5 V, V- = -5.5 V,
VS = VD = ± 4.5 V
Room ± 0.05 -1 1 -1 1
Full - -50 50 -5 5
Digital Control
Input Current, VIN Low IIL VIN(A, B, C, and enable) under test = 0.6 V Full 0.02 -1 1 -1 1 μA
Input Current, VIN High IIH VIN(A, B, C, and enable) under test = 2 V Full 0.02 -1 1 -1 1
Input Capacitance eCIN f = 1 MHz Room 3.4 - - - - pF
DG4051E, DG4052E, DG4053E
www.vishay.com Vishay Siliconix
S16-0623-Rev. A, 11-Apr-16 4Document Number: 69685
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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Dynamic Characteristics
Off Isolation eOIRR
RL = 50 , CL = 1 pF
f = 100 kHz Room -106 - - - -
dB
f = 10 MHz Room -68 - - - -
f = 100 MHz Room -49 - - - -
Channel-to-Channel
Crosstalk eXTALK
f = 100 kHz Room -105 - - - -
f = 10 MHz Room -62 - - - -
f = 100 MHz Room -51 - - - -
Bandwidth, 3 dB BW RL = 50
DG4051E Room 308 - - - -
MHzDG4052E Room 353 - - - -
DG4053E Room 930 - - - -
Transition Time tTRANS
RL = 300 , CL = 35 pF
see Fig. 1, 2, 3
Room 72 - 112 - 112
ns
Full - - 139 - 131
Enable Turn-On Time tON
Room 35 - 75 - 75
Full - - 86 - 80
Enable Turn-Off Time tOFF
Room 48 - 88 - 88
Full - - 97 - 95
Break-Before-Make
Time Delay tD
Room - 1 - 1 -
Full - - - - -
Charge Injection eQV
g = 0 V, Rg = 0 , CL = 1 nF Room 0.38 - - - - pC
Source Off
Capacitance eCS(off) f = 1 MHz
DG4051E Room 2.2 - - - -
pF
DG4052E Room 2.1 - - - -
DG4053E Room 2 - - - -
Drain Off
Capacitance eCD(off) f = 1 MHz
DG4051E Room 9.2 - - - -
DG4052E Room 4.8 - - - -
DG4053E Room 3.1 - - - -
Channel On
Capacitance eCD(on) f = 1 MHz
DG4051E Room 14.9 - - - -
DG4052E Room 10 - - - -
DG4053E Room 8.5 - - - -
Total Harmonic
Distortion eTHD Signal = 5 VRMS,
20 Hz to 20 kHz, RL = 600 Room 0.065 - - - - %
Power Supplies
Power Supply Current I+
V+ = 5 V, V- = -5 V
VIN(A, B, C, and enable) = 0 V or 5 V
Room 0.05 - 1 - 1
μA
Full - - 10 - 10
Negative Supply
Current I- Room -0.05 -1 - -1 -
Full - -10 - -10 -
Ground Current IGND
Room -0.05 -1 - -1 -
Full - -10 - -10 -
SPECIFICATIONS FOR DUAL SUPPLIES
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE SPECIFIED
V+ = 5 V, V- = -5 V
VIN(A, B, C, and enable) = 2 V, 0.8 V a
TEMP. b TYP.
c
-40 °C to +125 °C -40 °C to +85 °C
UNIT
MIN. dMAX. dMIN. dMAX. d
DG4051E, DG4052E, DG4053E
www.vishay.com Vishay Siliconix
S16-0623-Rev. A, 11-Apr-16 5Document Number: 69685
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SPECIFICATIONS FOR UNIPOLAR SUPPLIES
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE SPECIFIED
V+ = 12 V, V- = 0 V
VIN(A, B, C, and enable) = 2 V, 0.8 V a
TEMP. b TYP.
c
-40 °C to +125 °C -40 °C to +85 °C
UNIT
MIN. dMAX. dMIN. dMAX. d
Analog Switch
Analog Signal Range eVANALOG Full - 0 12 0 12 V
On-Resistance RON IS = 1 mA, VD = 0.7 V, 11.3 V Room 85 - 103 - 103
Full - - 133 - 125
On-Resistance Match RON IS = 1 mA, VD = 11.3 V Room 1.24 - 8 - 8
Full - - 8 - 8
On-Resistance
Flatness RFLATNESS IS = 1 mA, VD = 0.7 V, 11.3 V Room 27 - 37 - 37
Full - - 44 - 43
Switch Off
Leakage Current
IS(off) V+ = 13.2 V, V- = 0 V
VD = 1 V / 12.2 V, VS = 12.2 V / 1 V
Room ± 0.05 -1 1 -1 1
nA
Full - -50 50 -5 5
ID(off)
Room ± 0.05 -1 1 -1 1
Full - -50 50 -5 5
Channel On
Leakage Current ID(on) V+ = 13.2 V, V- = 0 V
VD = VS = 1 V / 12.2 V
Room ± 0.05 -1 1 -1 1
Full - -50 50 -5 5
Digital Control
Input Current,
VIN Low ILVIN(A, B, C, and enable)
under test = 0.8 V Full 0.02 -1 1 -1 1
μA
Input Current,
VIN High IHVIN(A, B, C, and enable)
under test = 2 V Full 0.02 -1 1 -1 1
Dynamic Characteristics
Transition Time tTRANS
RL = 300 , CL = 35 pF
see Fig. 1, 2, 3
Room 43 - 83 - 83
ns
Full - - 95 - 90
Enable Turn-On Time tON
Room 22 - 62 - 62
Full - - 71 - 67
Enable Turn-Off Time tOFF
Room 47 - 87 - 87
Full - - 94 - 93
Break-Before-Make
Time Delay tD
Room 25 1 - 1 -
Full - - - - -
Charge Injection eQV
g = 0 V, Rg = 0 , CL = 1 nF Full - - - - - pC
Off Isolation eOIRR RL = 50 , CL = 1 pF
f = 100 kHz
Room - - - - -
dB
Channel-to-Channel
Crosstalk eXTALK Room - - - - -
Source Off
Capacitance eCS(off) f = 1 MHz
DG4051E Room - - - - -
pF
DG4052E Room - - - - -
DG4053E Room - - - - -
Drain Off
Capacitance eCD(off) f = 1 MHz
DG4051E Room - - - - -
DG4052E Room - - - - -
DG4053E Room - - - - -
Channel On
Capacitance eCD(on) f = 1 MHz
DG4051E Room - - - - -
DG4052E Room - - - - -
DG4053E Room - - - - -
Power Supplies
Power Supply Current I+
VIN(A, B, C, and enable) = 0 V or 5 V
Room 0.05 - 1 - 1
μA
Full - - 10 - 10
Negative Supply
Current I- Room -0.05 -1 - -1 -
Full - -10 - -10 -
Ground Current IGND
Room -0.05 -1 - -1 -
Full - -10 - -10 -
DG4051E, DG4052E, DG4053E
www.vishay.com Vishay Siliconix
S16-0623-Rev. A, 11-Apr-16 6Document Number: 69685
For technical questions, contact: analogswitchtechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SPECIFICATIONS FOR UNIPOLAR SUPPLIES
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE SPECIFIED
V+ = 5 V, V- = 0 V
VIN(A, B, C, and enable) = 2 V, 0.8 V a
TEMP. b TYP.
c
-40 °C to +125 °C -40 °C to +85 °C
UNIT
MIN. dMAX. dMIN. dMAX. d
Analog Switch
Analog Signal Range eVANALOG Full - 0 5 0 5 V
On-Resistance RON IS = 1 mA, VD = 0 V, 3.5 V Room 125 - 147 - 147
Full - - 176 - 168
On-Resistance Match RON IS = 1 mA, VD = 3.5 V Room 1.3 - 8 - 8
Full - - 8 - 8
On-Resistance
Flatness RFLATNESS IS = 1 mA, VD = 0 V, 3 V Room 21 - 31 - 31
Full - - 25 - 29
Switch Off
Leakage Current
IS(off) V+ = 5.5 V, V- = 0 V
VD = 1 V / 4.5 V, VS = 4.5 V / 1 V
Room ± 0.03 -1 1 -1 1
nA
Full - -50 50 -5 5
ID(off)
Room ± 0.03 -1 1 -1 1
Full - -50 50 -5 5
Channel On
Leakage Current ID(on) V+ = 5.5 V, V- = 0 V
VD = VS = 1 V / 4.5 V
Room ± 0.03 -1 1 -1 1
Full - -50 50 -5 5
Digital Control
Input Current,
VIN Low ILVIN(A, B, C, and enable)
under test = 0.6 V Full 0.02 -1 1 -1 1
μA
Input Current,
VIN High IHVIN(A, B, C, and enable)
under test = 2 V Full 0.02 -1 1 -1 1
Dynamic Characteristics
Transition Time tTRANS
RL = 300 , CL = 35 pF
see Fig. 1, 2, 3
Room 95 - 135 - 135
ns
Full - - 169 - 148
Enable Turn-On Time tON
Room 56 - 96 - 96
Full - - 117 - 107
Enable Turn-Off Time tOFF
Room 55 - 95 - 95
Full - - 110 - 103
Break-Before-Make
Time Delay tD
Room - 12 - 12 -
Full - - - - -
Charge Injection eQV
g = 0 V, Rg = 0 , CL = 1 nF Full 0.32 - - - - pC
Off Isolation eOIRR RL = 50 , CL = 1 pF
f = 100 kHz
Room -86 - - - -
dB
Channel-to-Channel
Crosstalk eXTALK Room -105 - - - -
Source Off
Capacitance eCS(off) f = 1 MHz
DG4051E Room 2.4 - - - -
pF
DG4052E Room 2.4 - - - -
DG4053E Room 2.3 - - - -
Drain Off
Capacitance eCD(off) f = 1 MHz
DG4051E Room 10.1 - - - -
DG4052E Room 5.3 - - - -
DG4053E Room 3.4 - - - -
Channel On
Capacitance eCD(on) f = 1 MHz
DG4051E Room 15.9 - - - -
DG4052E Room 10.6 - - - -
DG4053E Room 8.9 - - - -
Power Supplies
Power Supply Current I+
VIN(A, B, C, and enable) = 0 V or 5 V
Room 0.05 - 1 - 1
μA
Full - - 10 - 10
Negative Supply
Current I- Room -0.05 -1 - -1 -
Full - -10 - -10 -
Ground Current IGND
Room -0.05 -1 - -1 -
Full - -10 - -10 -
DG4051E, DG4052E, DG4053E
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S16-0623-Rev. A, 11-Apr-16 7Document Number: 69685
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Notes
a. VIN = input voltage to perform proper function.
b. Room = 25 °C, full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet.
e. Guaranteed by design, not subject to production test.
SPECIFICATIONS FOR UNIPOLAR SUPPLIES
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE SPECIFIED
V+ = 3 V, V- = 0 V
VIN(A, B, C, and enable) = 1.4 V, 0.6 V a
TEMP. b TYP.
c
-40 °C to +125 °C -40 °C to +85 °C
UNIT
MIN. dMAX. dMIN. dMAX. d
Analog Switch
Analog Signal Range eVANALOG Full - 0 3 0 3 V
On-Resistance RON IS = 1 mA, VD = 1.5 V Room 221 - - - -
Full - - - - -
Switch Off
Leakage Current
IS(off) V+ = 3.3 V, V- = 0 V
VD = 0.3 V / 3 V, VS = 3 V / 0.3 V
Room ± 0.02 -1 1 -1 1
nA
Full - -50 50 -5 5
ID(off)
Room ± 0.02 -1 1 -1 1
Full - -50 50 -5 5
Channel On
Leakage Current ID(on) V+ = 3.3 V, V- = 0 V
VD = VS = 0.3 V / 3 V
Room ± 0.02 -1 1 -1 1
Full - -50 50 -5 5
Digital Control
Input Current, VIN Low ILVIN(A, B, C, and enable)
under test = 0.6 V Full 0.02 -1 1 -1 1
μA
Input Current, VIN High IHVIN(A, B, C, and enable)
under test = 1.4 V Full 0.02 -1 1 -1 1
Dynamic Characteristics
Transition Time tTRANS
RL = 300 , CL = 35 pF
see Fig. 1, 2, 3
Room 200 - - - -
ns
Full - - - - -
Enable Turn-On Time tON
Room 130 - - - -
Full - - - - -
Enable Turn-Off Time tOFF
Room 78 - - - -
Full - - - - -
Break-Before-Make
Time Delay tD
Room 130 - - - -
Full - - - - -
Charge Injection eQV
g = 0 V, Rg = 0 , CL = 1 nF Room 0.34 - - - - pC
Off Isolation eOIRR RL = 50 , CL = 1 pF
f = 100 kHz
Room -88 - - - -
dB
Channel-to-Channel
Crosstalk eXTALK Room -105 - - - -
Source Off
Capacitance eCS(off) f = 1 MHz
DG4051E Room 2.6 - - - -
pF
DG4052E Room 2.6 - - - -
DG4053E Room 2.5 - - - -
Drain Off Capacitance
e
CD(off) f = 1 MHz
DG4051E Room 10.7 - - - -
DG4052E Room 5.7 - - - -
DG4053E Room 3.6 - - - -
Channel On
Capacitance eCD(on) f = 1 MHz
DG4051E Room 16.4 - - - -
DG4052E Room 10.9 - - - -
DG4053E Room 9.1 - - - -
Power Supplies
Power Supply Current I+
VIN(A, B, C, and enable) = 0 V or 3 V
Room 0.05 - 1 - 1
μA
Full - - 10 - 10
Negative Supply
Current I- Room -0.05 -1 - -1 -
Full - -10 - -10 -
Ground Current IGND
Room -0.05 -1 - -1 -
Full - -10 - -10 -
DG4051E, DG4052E, DG4053E
www.vishay.com Vishay Siliconix
S16-0623-Rev. A, 11-Apr-16 8Document Number: 69685
For technical questions, contact: analogswitchtechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
On-Resistance vs. Analog Voltage (Single Supply)
On-Resistance vs. Analog Voltage (Temperature)
On-Resistance vs. Analog Voltage (Temperature)
On-Resistance vs. Analog Voltage (Dual Supply)
On-Resistance vs. Analog Voltage (Temperature)
Supply Current vs. Input Switching Frequency
0
50
100
150
200
250
300
350
400
024681012141618
RON - On-Resistance ()
VD- Analog Voltage (V)
V+ = +3.0 V, V- = 0 V
V+ = +5.0 V, V- = 0 V
V+ = +12.0 V, V- =0 V
V+ = +16.0 V, V- = 0 V
TA= 25 °C
IS= -1 mA
0
25
50
75
100
125
150
175
200
225
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
RON - On-Resistance ()
VD- Analog Voltage (V)
+125
°
C
+85
°
C
+25
°
C
-40
°
C
V+ = +5 V
v- = 0 V
IS= 1 mA
0
20
40
60
80
100
120
140
-5 -4 -3 -2 -1 0 1 2 3 4 5
RON - On-Resistance ()
VD- Analog Voltage (V)
+125
°
C
+85
°
C
+25 °C-40 °C
V+ = +5 V
v- = -5 V
IS= 1 mA
0
20
40
60
80
100
120
140
-10-8-6-4-20246810
RON - On-Resistance ()
VD- Analog Voltage (V)
V+ = +5.0 V, V- = -5.0 V
V+ = +8.0 V, V- = -8.0 V
TA= 25 °C
IS= -1 mA
0
20
40
60
80
100
120
140
0123456789101112
RON - On-Resistance ()
VD- Analog Voltage (V)
+125 °C+85 °C
+25 °C-40 °C
V+ = +12 V
v- = 0 V
IS= 1 mA
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
10 000
10 100 1000 10K 100K 1M 10M
Supply Current (μA)
Input Switching Frequency (Hz)
I+
I-
IGND
V+ = +5 V
V- = -5 V
DG4051E, DG4052E, DG4053E
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Leakage Current vs. Temperature
Switching Time vs. Temperature (Single Supply)
DG4051E Insertion Loss, Off-Isolation,
Crosstalk vs. Frequency
Leakage Current vs. Temperature
Switching Time vs. Temperature (Dual Supply)
DG4052E Insertion Loss, Off-Isolation,
Crosstalk vs. Frequency
1
10
100
1000
10 000
100 000
-60 -40 -20 0 20 40 60 80 100 120 140
Leakage Current (pA)
Temperature (°C)
ID(OFF), VD= 4.5 V, VS= -4.5 V
V+ = +5.5 V
V- = -5.5 V ID(ON), VD= 4.5 V
IS(OFF), VD= 4.5 V, VS= -4.5 V
0
25
50
75
100
125
150
175
200
-60 -10 40 90 140
tON(EN), tOFF(EN) - Switching Time (ns)
Temperature (°C)
V+ = +3 V, V- = 0 V, tON
V+ = +5 V, V- = 0 V, tON
V+ = +16 V, V- = 0 V, tON
V+ = +3 V, V- = 0 V, tOFF
V+ = +5 V, V- = 0 V, tOFF
V+ = +16 V, V- = 0 V, tOFF
V+ = +12 V, V- = 0 V, tON
V+ = +12 V, V- = 0 V, tOFF
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
100K 1M 10M 100M 1G
Loss, OIRR, XTALK (dB)
Frequency (Hz)
Loss
DG4051E
V+ = +5 V
V- = -5 V
RL= 50
OIRR
X
TALK
1
10
100
1000
10 000
100 000
-60 -40 -20 0 20 40 60 80 100 120 140
Leakage Current (pA)
Temperature (°C)
ID(OFF), VD= 12.2 V, VS= 1.0 V
V+ = +13.2 V
V- = -0 V ID(ON), VD= 12.2 V
IS(OFF), VD= 12.2 V, VS= 1.0 V
0
10
20
30
40
50
60
70
80
-60 -10 40 90 140
tON(EN), tOFF(EN) - Switching Time (ns)
Temperature (°C)
V+ = +5 V, V- = 5 V, tON
V+ = +5 V, V- = -5 V, tOFF
V+ = +8 V, V- = -8 V, tON
V+ = +8 V, V- = -8 V, tOFF
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
100K 1M 10M 100M 1G
Loss, OIRR, XTALK (dB)
Frequency (Hz)
Loss
DG4052E
V+ = +5 V
V- = -5 V
RL= 50
OIRR
X
TALK
DG4051E, DG4052E, DG4053E
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
DG4053E Insertion Loss, Off-Isolation,
Crosstalk vs. Frequency
DG4051E Charge Injection vs. Analog Voltage
DG4052E Charge Injection vs. Analog Voltage
Switching Threshold vs. V+ Supply Voltage
DG4053E Charge Injection vs. Analog Voltage
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
100K 1M 10M 100M 1G
Loss, OIRR, XTALK (dB)
Frequency (Hz)
Loss
DG4053E
V+ = +5 V
V- = -5 V
RL= 50
OIRR
X
TALK
-1.0
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-6-5-4-3-2-10123456
QINJ - Charge Injection (pC)
VS- Analog Voltage (V)
V+ = 5 V
V- = 0 V
V+ = 5 V
V- = -5 V
V+ = 3 V
V- = 0 V
-1.0
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-6-5-4-3-2-10123456
QINJ - Charge Injection (pC)
VS- Analog Voltage (V)
V+ = 5 V
V- = 0 V
V+ = 5 V
V- = -5 V
V+ = 3 V
V- = 0 V
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
0 2 4 6 8 10 12 14 16 18 20
VT- Switching Threshold (V)
V+ - Supply Voltage (V)
VIH = -40 °C
VIL = 125 °C
-40 °C to +125 °C
-1.0
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6
QINJ - Charge Injection (pC)
VS- Analog Voltage (V)
V+ = 5 V
V- = 0 V
V+ = 5 V
V- = -5 V
V+ = 3 V
V- = 0 V
DG4051E, DG4052E, DG4053E
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SCHEMATIC DIAGRAM (Typical Channel)
TEST CIRCUITS
Fig. 1 - Transition Time
EN
A, B
X0, Y0, Z0
X, Y, Z
V+
Xn, Yn, Zn
V-
Decode/
drive
Level
shift
V-
V+
C
GND Body
snatcher
V-
V-
V-
A
B
C
ENABLE
GND
V-
V+
V
O
50 Ω
300 Ω 35 pF
X
X0
X7
X1 - X6
DG4051E
V
X0
V
X7
A
B
ENABLE
GND
V-
V+
V
O
50 Ω
300 Ω 35 pF
X or Y
X0 or Y0
X3 or Y3
X1 - X2 or
Y1 - Y2
DG4052E
V
X0
or V
Y0
V
X3
or V
Y3
A or B
or C
ENABLE
GND
V-
V+
V
O
50 Ω
300 Ω 35 pF
X or Y or Z
X0 or Y0
or Z0
X1 or Y1 or Z1
DG4053E
V
X0
or V
Y0
or V
Z0
V
X1
or V
Y1
or V
Z1
0 V
V+
50 %
90 %
tTRANS
X0 or Y0 or Z0 ON X7 ON (DG4051E)
or
X3 or Y3 ON (DG4052E)
or
X1 or Y1 or Z1 ON
(DG4053E)
V
O
V
A,B,C
V
X0
or V
Y0
or V
Z0
V
X1
or V
Y1
or V
Z1
V
X3
or V
Y3
V
X7
tTRANS
90 %
DG4051E, DG4052E, DG4053E
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TEST CIRCUITS
Fig. 2 - Enable Switching Time
A
B
C
ENABLE
GND
V-
V+
V
O
50 Ω 300 Ω 35 pF
X
X0
X1 - X7
DG4051E
A
B
ENABLE
GND
V-
V+
V
O
50 Ω 300 Ω 35 pF
X or Y
X0 or Y0
X1 - X3 or
Y1 - Y3
DG4052E
A or B
or C
ENABLE
GND
V-
V+
V
O
50 Ω 300 Ω 35 pF
X or Y or Z
X0 or Y0
or Z0
X1 or Y1 or Z1
DG4053E
0 V
V+
50 %
90 %
t
OFF
X0 or Y0 or Z0 ON X7 ON (DG4051E)
or
X3 or Y3 ON (DG4052E)
or
X1 or Y1 or Z1 ON
(DG4053E)
V
O
V
ENABLE
V
X0
or V
Y0
or V
Z0
V+
0 V
V+
V+
t
ON
90 %
DG4051E, DG4052E, DG4053E
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TEST CIRCUITS
Fig. 3 - Break-Before-Make
Fig. 4 - Charge Injection
A
B
C
ENABLE
GND
V-
V+
V
O
50 Ω
300 Ω 35 pF
X
X0 - X7
DG4051E
A
B
ENABLE
GND
V-
V+
V
O
50 Ω
300 Ω 35 pF
X or Y
X0 - X3 or
Y0- Y3
DG4052E
A or B
or C
ENABLE
GND
V-
V+
V
O
50 Ω
300 Ω 35 pF
X or Y or Z
X0, X1 or Y0,
Y1 or Z0, Z1
DG4053E
0 V
V+
50 %
80 %
t
D
V
O
V
A,B,C
V
X0
or V
Y0
or V
Z0
V+
V+
V+
0 V
A
B
C
ENABLE
GND
V-
V+
VO
1 nF
X or Y or Z
Xx or Yx or Zx
0 V
V+
VO
VENABLE
Rg
Channel
Select
V
g
ON
OFF OFF
ΔVO
tr < 5 ns
tf < 5 ns
DG4051E, DG4052E, DG4053E
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TEST CIRCUITS
Fig. 5 - Insertion Loss
Fig. 6 - Crosstalk
Fig. 7 - Off Isolation
Fig. 8 - Source, Drain Capacitance
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?69685.
A
B
C
ENABLE
GND
V-
V+
VOUT
X or Y or Z
X0 or Y0 or Z0
Vg
Rg = 50 Ω
50 Ω
VIN
Network Analyzer
Insertion Loss = 20 log VOUT
VIN
A
B
C
ENABLE
GND
V-
V+
VOUT
X or Y or Z
X0 or Y0 or Z0
V
g
Rg = 50 Ω
50 Ω
VIN
Network Analyzer
Crosstalk = 20 log VOUT
VIN
50 Ω Xx or Yx or Zx
A
B
C
ENABLE
GND
V-
V+
VOUT
X or Y or Z
X0 or Y0 or Z0
Vg
Rg = 50 Ω
50 Ω
VIN
Network Analyzer
Off Isolation = 20 log VOUT
VIN
V+
A
B
C
ENABLE
GND
V-
V+
X or Y or Z
X0 or Y0 or Z0
|
to
|
Xx or Yx or Zx Impedance
Analyzer
Channel
Select
Package Information
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Revision: 09-May-16 1Document Number: 64694
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Thin miniQFN16 Case Outline
Notes
(1) Use millimeters as the primary measurement.
(2) Dimensioning and tolerances conform to ASME Y14.5M. - 1994.
(3) N is the number of terminals. Nd and Ne is the number of terminals in each D and E site respectively.
(4) Dimensions b applies to plated terminal and is measured between 0.15 mm and 0.30 mm from terminal tip.
(5) The pin 1 identifier must be existed on the top surface of the package by using identification mark or other feature of package body.
(6) Package warpage max. 0.05 mm.
DIMENSIONS MILLIMETERS (1) INCHES
MIN. NOM. MAX. MIN. NOM. MAX.
A 0.50 0.55 0.60 0.020 0.022 0.024
A1 0 - 0.05 0 - 0.002
A3 0.15 ref. 0.006 ref.
b 0.15 0.20 0.25 0.006 0.008 0.010
D 2.50 2.60 2.70 0.098 0.102 0.106
e 0.40 BSC 0.016 BSC
E1.70
1.80 1.90 0.067 0.071 0.075
L 0.35 0.40 0.45 0.014 0.016 0.018
L1 0.45 0.50 0.55 0.018 0.020 0.022
N (3) 16 16
Nd (3) 44
Ne (3) 44
ECN: T16-0226-Rev. B, 09-May-16
DWG: 6023
0.10 C
0.10
A
A3
C
0.10 C
0.10 C
Side view
Top view Bottom view
C
AB
13
12 11 10
D
E
9
8
7
6
5
8
7
6
5
13
14
15
16 L1
1234
Pin #1 identier (5)
Seating
plane
Terminal tip (4)
16 x b
0.10
0.05
C
C
M
M
AB
1211109
4
15 x L
321
e
14
15
16
All Leads
0.101 mm
0.004 IN
E
HC
D
e B A1 LĬ
4312 8756
131416 15 91012 11
Package Information
Vishay Siliconix
Document Number: 71194
02-Jul-01 www.vishay.com
1
SOIC (NARROW): 16ĆLEAD
JEDEC Part Number: MS-012
MILLIMETERS INCHES
Dim Min Max Min Max
A1.35 1.75 0.053 0.069
A10.10 0.20 0.004 0.008
B0.38 0.51 0.015 0.020
C0.18 0.23 0.007 0.009
D9.80 10.00 0.385 0.393
E3.80 4.00 0.149 0.157
e1.27 BS C 0.050 BSC
H5.80 6.20 0.228 0.244
L0.50 0.93 0.020 0.037
Ĭ0_8_0_8_
ECN: S-03946—Rev. F, 09-Jul-01
DWG: 5300
Vishay Siliconix
Package Information
Document Number: 74417
23-Oct-06
www.vishay.com
1
Symbols
DIMENSIONS IN MILLIMETERS
Min Nom Max
A - 1.10 1.20
A1 0.05 0.10 0.15
A2 - 1.00 1.05
B 0.22 0.28 0.38
C - 0.127 -
D 4.90 5.00 5.10
E 6.10 6.40 6.70
E1 4.30 4.40 4.50
e-0.65-
L 0.50 0.60 0.70
L1 0.90 1.00 1.10
y--0.10
θ10°3°6°
ECN: S-61920-Rev. D, 23-Oct-06
DWG: 5624
TSSOP: 16-LEAD
PAD Pattern
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RECOMMENDED MINIMUM PAD FOR TSSOP-16
0.281
(7.15)
Recommended Minimum Pads
Dimensions in inches (mm)
0.171
(4.35)
0.055
(1.40)
0.012
(0.30)
0.026
(0.65)
0.014
(0.35)
0.193
(4.90)
Document Number: 66557 www.vishay.com
Revision: 05-Mar-10 1
PAD Pattern
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR MINI QFN 16L
1
0.400
(0.0157)
0.225
(0.0089)
0.463
(0.0182)
0.562
(0.0221)
2.900
(0.1142)
1.200
(0.0472)
2.100
(0.0827)
Mounting Footprint
Dimensions in mm (inch)
Application Note 826
Vishay Siliconix
www.vishay.com Document Number: 72608
24 Revision: 21-Jan-08
APPLICATION NOTE
RECOMMENDED MINIMUM PADS FOR SO-16
RECOMMENDED MINIMUM PADS FOR SO-16
0.246
(6.248)
Recommended Minimum Pads
Dimensions in Inches/(mm)
0.152
(3.861)
0.047
(1.194)
0.028
(0.711)
0.050
(1.270)
0.022
(0.559)
0.372
(9.449)
Return to Index
Return to Index
Legal Disclaimer Notice
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Revision: 08-Feb-17 1Document Number: 91000
Disclaimer
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