DC-DC CONVERTERS Non-isolated DDR/QDR Memory Bus Termination Module 1
NEW Product
File Name: PTHxx050Y.pdf Rev (02): 19 Dec 2005
2YEAR WARRANTY
All specifications are typical at nominal input, VREF =1.25 V, full load at 25 °C
unless otherwise stated. Cin, Co1 and Co2 =typical value SPECIFICATIONS
The PTHxx050Y are a new series of non-isolated dc-dc converters designed
specifically for bus termination in DDR and QDR memory applications. Operating from
either a 3.3 Vdc, 5 Vdc or 12 Vdc input, the modules generate a
VTT
output that will
source or sink up to 6 A of current to accurately track their
VREF
input.
VTT
is the
required bus termination supply voltage, and
VREF
is the reference voltage for the
memory and chipset bus receiver comparators.
VREF
is usually set to half the
VDDQ
power supply voltage. The PTHxx050Y series employs an actively switched
synchronous rectifier output to provide state of the art stepdown switching conversion.
The products are small in size and are an ideal choice where space, performance and
high efficiency are desired.
•VTT bus termination output (output tracks the system VREF)
•6Aoutput current (8 A Peak)
•3.3 Vdc, 5 Vdc or 12 Vdc input voltage
•DDR and QDR compatible
•ON/OFF inhibit (for VTT standby)
•Under-voltage lockout
•Operating temperature range: -40 ºC to +85 ºC
•Efficiencies up to 88%
•Output overcurrent protection (non-latching, auto-reset)
•Point-of-Load-Alliance (POLA) compatible
•Available RoHS compliant
PTHxx050Y
3.3/5/12 Vin Single Output
OUTPUT SPECIFICATIONS
Output current All models
(over ∆VREF range) Continuous (See Note 1) ±6 A
Repetitive pulse (See Note 2) ±8 A
Tracking range for VREF 0.55-1.8 V
Tracking tolerance to VREF
(VTT - VREF)-10 mV to +10mV
(over line, load
and temperature)
Ripple and noise 20 MHz bandwidth 20 mV pk-pk
Load transient response 80 µs settling time
(See Note 5) Overshoot/undershoot 25 mV typ.
Output capacitance:
Non-ceramic values PTH03050Y 470 µF typ., 3,300 µF max.
(See Notes 5 and 6) PTH05050Y 470 µF typ., 3,300 µF max.
PTH12050Y 940 µF typ., 3,300 µF max.
Ceramic values PTH03050Y 200 µF typ., 300 µF max.
(See Note 5) PTH05050Y 200 µF typ., 300 µF max.
PTH12050Y 400 µF typ., 600 µF max.
(See Note 7) ESR (non-ceramic) 4 mΩmin
INPUT SPECIFICATIONS
Input current No load 10 mA
Input voltage range PTH03050Y 2.95-3.65 Vdc
PTH05050Y 4.5-5.5 Vdc
PTH12050Y 10.8-13.2 Vdc
Undervoltage lockout:
PTH03050Y Vin increasing 2.45 V typ., 2.80 V max.
Vin decreasing 2.20 V min., 2.40 V typ.
PTH05050Y Vin increasing 4.30 V typ., 4.45 V max.
Vin decreasing 3.40 V min., 3.70 V typ.
PTH12050Y Vin increasing 9.5 V typ., 10.4 V max.
Vin decreasing 8.80 V min., 9.0 V typ.
INPUT SPECIFICATIONS CONTD.
Input capacitance PTH03050Y and PTH05050Y 470 µF
(See Note 4) PTH12050Y 560 µF
Remote ON/OFF Active high
GENERAL SPECIFICATIONS
Efficiency PTH03050Y 88% typ.
Io = 4 A PTH05050Y 87% typ.
PTH12050Y 84% typ.
Insulation voltage Non-isolated
Switching frequency PTH03050Y 550- 650 kHz
PTH05050Y 550-650 kHz
PTH12050Y 200-300 kHz
Approvals and EN60950
standards UL/cUL60950
Material flammability UL94V-0
Dimensions (L xWxH) 22.10 x 12.57 x 8.50 mm
0.870 x 0.495 x 0.335 in
Weight 2.9 g (0.10 oz)
MTBF Telcordia SR-332 6,000,000 hours
ENVIRONMENTAL SPECIFICATIONS
Thermal performance Operating ambient, -40 ºC to +85 ºC
(See Note 2) temperature
Non-operating -40 ºC to +125 ºC
MSL (‘Z’ suffix only) JEDEC J-STD-020C Level 3
PROTECTION
Overcurrent threshold All models 12 A typ.
(auto reset)
File Name: PTHxx050Y.pdf Rev (02): 19 Dec 2005
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
DC-DC CONVERTERS Non-isolated DDR/QDR Memory Bus Termination Module 2
NEW Product
NNootteess
1Rating is conditional on the module being directly soldered to a 4 layer
PCB with 1 oz. copper. See the SOA curves or contact the factory for
appropriate derating. The PTH03050Y and PTH05050Y require no
derating up to 85 °C operating temperature and natural convection
airflow.
2Up to 10 ms pulse period at 10% maximum duty.
3This control pin has an internal pull-up to the input voltage Vin. If it is left
open-circuit the module will operate when input power is applied. A small
low-leakage (<100 nA) MOSFET is recommended for control. For further
information, consult Application Note 178.
4An input capacitor is required for proper operation. The capacitor must
be rated for a minimum of 300 mA rms (750 mA rms for 12 V input) of
ripple current.
5The typical value of external output capacitance value ensures that VTT
meets the specified transient performance requirements for the memory
bus terminations. Lower values of capacitance may be possible when the
measured peak change in output current is consistently less than 3 A.
Test conditions were 15 A/µs load step, -1.5 A to +1.5 A.
Part Number System with Options
PTHxx050Y
3.3/5/12 Vin Single Output
OUTPUT INPUT VTT OUTPUT OUTPUT EFFICIENCY MODEL
POWER VOLTAGE RANGE CURRENT CURRENT (TYP.) NUMBER (9,10)
(MAX.) (MIN.) (MAX.)
10.8 W 2.95-3.65 Vdc 0.55-1.8Vdc 0 A ±6 A 88% PTH03050Y
10.8 W 4.5-5.5 Vdc 0.55-1.8Vdc 0 A ±6 A 87% PTH05050Y
10.8 W 10.8-13.2 Vdc 0.55-1.8Vdc 0 A ±6 A 84% PTH12050Y
PTH05050YAST
Product Family
Point of Load Alliance
Compatible
Output Current
05 = 6 A
Packaging Options
No Suffix = Trays
T = Tape and Reel (8)
Input Voltage
03 = 3.3 V, 05 = 5 V
and 12 = 12 V
Mechanical Package
Always 0 Pin Option
A = Through-Hole Std. Pin Length (0.140”)
A = Surface-Mount Tin/Lead Solder Ball
Output Voltage Code
Y = DDR Module
Mounting Option (9)
D = Horizontal Through-Hole (Matte Sn)
H = Horizontal Through-Hole (Sn/Pb)
S = Surface-Mount (63/37 Sn/Pb
pin solder material)
Z = Surface-Mount (96.5/3.0/0.5 Sn/Ag/Cu
pin solder material)
6This is the calculated maximum. The minimum ESR limitation will often
result in a lower value. Consult Application Note 178 for further details.
7This is the typical ESR for all the electrolytic (non-ceramic) output
capacitance. Use 7 mΩas the minimum when using max ESR values to
calculate.
8Tape and reel packaging only available on the surface-mount versions.
9To order Pb-free (RoHS compatible) surface-mount parts replace the
mounting option ‘S’ with ‘Z’, e.g. PTHxx050YAZ. To order Pb-free (RoHS
compatible) through-hole parts replace the mounting option ‘H’ with ‘D’,
e.g. PTHxx050YAD.
10 NOTICE: Some models do not support all options. Please contact your
local Artesyn representative or use the on-line model number search tool at
http://www.artesyn.com/powergroup/products.htm to find a suitable
alternative.
International Safety Standard Approvals
UL/cUL CAN/CSA-C22.2 No. 60950
File No. E174104
TÜV Product Service (EN60950) Certificate No. B 04 06 38572 044
CB Report and Certificate to IEC60950, Certificate No. US/8292/UL
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
DC-DC CONVERTERS Non-isolated DDR/QDR Memory Bus Termination Module 3
NEW Product
File Name: PTHxx050Y.pdf Rev (02): 19 Dec 2005
PTHxx050Y
3.3/5/12 Vin Single Output
EFFICIENCY (%)
OUTPUT CURRENT (A)
50
60
70
80
90
100
0123456
3.3V
5.0V
12.0V
Vin
Nat conv
20
30
40
50
60
70
80
90
0123456
OUTPUT CURRENT (C)
AMBIENT TEMPERATURE (ºC)
Figure 3 - Efficiency vs Load Current
VREF = 1.25 V (See Note B)
Figure 1 - Safe Operating Area
Vin = 3.3 V, VREF = 1.25 V, Iout = 6 A (See Note A)
NNootteess
AThe SOA curves represent the conditions at which internal components
are within the Artesyn derating guidelines.
BCharacteristic data has been developed from actual products tested at
25 °C. This data is considered typical data for the converter.
45
1
2
3
6
PTHxx050Y
(Top View)
GND
Vin
Standby
V
DDQ
1k
1k
1%
1%
C
in
(Required)
BSS138
(Optional)
++
Co
1
Low-ESR
(Required)
Co
2
Ceramic
(Optional)
Co
n
hf-Ceramic
SSTL-2
Data/
Address/
Bus
V
TT
Termination Island
V
TT
V
REF
Q
1
Figure 4 - Standard Application
Nat conv
100 LFM
200 LFM
0
1
2
3
4
5
6
010 20 30 40 50 60 70 80
OUTPUT CURRENT (A)
AMBIENT TEMPERATURE (ºC)
8
Figure 2 - Safe Operating Area
Vin = 12V, VREF = 1.25 V, Iout = 6 A (See Note A)
File Name: PTHxx050Y.pdf Rev (02): 19 Dec 2005
Please consult our website for the following items: 4 Application Note www.artesyn.com
Datasheet © Artesyn Technologies
®
2005
The information and specifications contained in this datasheet are believed to be correct at time of publication. However, Artesyn Technologies accepts no responsibility for consequences arising
from printing errors or inaccuracies. The information and specifications contained or described herein are subject to change in any manner at any time without notice. No rights under any patent
accompany the sale of any such product(s) or information contained herein.
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
DC-DC CONVERTERS Non-isolated DDR/QDR Memory Bus Termination Module 4
NEW Product
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places ±0.030 (±0.76)
3 Places ±0.010 (±0.25)
TOP VIEW
SIDE VIEW
0.870 (22.10)
6
35
4
1
2
MAX.
0.335 (8.50) Host Board
0.495
(12.57)
ø
0.040 (1.02)
6 Places
0.750 (19.06)
0.125
(3.18)
0.125
(3.18)
0.125
(3.18)
(1.52)
0.060
(9.52)
0.375
(1.52)
0.060
(3.55)
0.140
Lowest Component
0.010 min. (0.25)
Bottom side Clearance
0.070 (1.78)
(Standoff Shoulder)
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places ±0.030 (±0.76)
3 Places ±0.010 (±0.25)
0.870 (22.10)
0.495
TOP VIEW SIDE VIEW
4
16Solder Ball
ø
0.040 (1.02)
6 Places
0.750 (19.06)
(1.52)
0.060 (1.52)
0.060
(12.57)
3
(3.18)
0.125 5
2
(3.18)
0.125
0.125
(3.18) 0.375
(9.52)
*After solder reflow
on customer board
0.335 (8.50)
max.*
Host Board
Lowest Component
0.010 min. (0.25)
Bottom side Clearance
Figure 5 - Plated Through-Hole Mechanical Drawing
Figure 6 - Surface-Mount Mechanical Drawing
PTHxx050Y
3.3/5/12 Vin Single Output
*Denotes negative logic:
Open = Normal operation
Ground = Function active
PIN CONNECTIONS
PIN NO. FUNCTION
1 Ground
2V
REF
3V
in
4 Inhibit*
5 N/C
6V
TT
