Key Features
• Small package
Laydown: 21.0 x 12.7 x 8.2 mm (0.827 x 0.5 x 0.323 in)
SIP: 20.8 x 7.6 x 15.6 mm (0.82 x 0.3 x 0.612 in)
• 0.6 V - 5.0 V output voltage range
• High efficiency, typ. 97.1% at 5Vin, 3.3Vout half load
• Configuration and Monitoring via PMBus
• Synchonization & phase spreading
• Voltage Tracking & Voltage margining
• MTBF 21.2 Mh
General Characteristics
• Fully regulated
• For narrow board pitch applications (15 mm/0.6 in)
• Non-Linear Response for reduction of decoupling cap.
• Input under voltage shutdown
• Over temperature protection
• Output short-circuit & Output over voltage protection
• Remote control & Power Good
• Voltage setting via pin-strap or PMBus
• Advanced Configurable via Graphical
Used Interface
• ISO 9001/14001 certified supplier
• Highly automated manufacturing ensures quality
Safety Approvals
Design for Environment
Meets requirements in high-
temperature lead-free soldering
processes.
Ericsson Internal
TABLE OF CONTENTS
1 (1)
Prepared (also subject responsible if other)
No.
SEC/S Stella Song 001 52-EN/LZT 146 434 Uen
Approved
Checked
Date
Rev
Reference
2012-10-30 C D
Contents
Ordering Infor mat ion ............................................................. 2
General Information ............................................................. 2
Safety Specification ............................................................. 3
Absolute Maximum Ratings ............................................................. 4
Electrical Specification
12A/ 0.6-5V Lay Down version and Power Good option BMR4620002 (TH)
BMR4621002 (SMD)
BMR4620006 (TH)
BMR4621006 (S MD) ............................ 5
12A/ 0.6-5V Singl e in Line version (SIP) BMR4622002 ...................................... 13
EMC Specification ........................................................... 21
Operating Information ........................................................... 21
Thermal Cons ideration ........................................................... 30
Connections ........................................................... 31
Mechanical Information ........................................................... 40
Soldering Information ........................................................... 43
Delivery Information ........................................................... 44
Product Qualification Specification ........................................................... 46
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
Ordering Information
Product program
Output
BMR 462
0.6-5.0 V, 12 A / 60 W
Product number and Packaging
BMR 462 n1n2n3n4/n5n6n7n8
Options
n1
n2
n3
n4
/
n5
n6
n7
n8
Mounting ο /
Mechanical ο
/
Digital interface ο
ο
/
Configuration file
/
ο
ο
ο
Packaging
/
ο
Options
Description
n1
n2
n3 n4
n5 n6 n7
n8
0
1
2
0
1
02
06*
001
002
B
C
Through hole mount version (TH)
Surface mount version (SMD)
Single in line (SIP)
Standard mechanical option
5.5mm pin length (for SIP)
PMBus and analog pin strap, with
Voltage Tracking Pin (Pin 4A)
PMBus and analog pin strap, with Power
Good Pin (Pin 4A)
Standard configuration
Negative logic
Antistatic tray of 100 products (SIP only)
Antistatic tape & reel of 200 products
(Sample delivery avalable in lower
quantities. Not for SIP)
Example: Product number BMR 462 0002/001C equals a through-hole
mounted, open frame, PMBus and analog pin strap, voltage tracking pin at
4A, positive RC logic, standard configuration variant, package tape&reel
Note*: Only available on Lay-down series.
General Information
Reliability
The failure rate (
λ
) and mean time between failures
(MTBF= 1/λ) is calculated at max output power and an
operating ambient temperature (TA) of +40°C. Ericsson
Power Modules uses Telcordia SR-332 Issue 2 Method 1
to calculate the mean steady-state failure rate and standard
deviation (σ).
Telcordia SR-332 Issue 2 also provides techniques to
estimate the upper confidence levels of failure rates based
on the mean and standard deviation.
Mean steady-state failure rate, λ
Std. deviation, σ
47 nFailures/h 12.4 nFailures/h
MTBF (mean value) for the BMR 462 series = 21.2 Mh.
MTBF at 90% confidence level = 15.9 Mh
Compatibility with RoHS requirements
The products are compatible with the relevant clauses and
requirements of the RoHS directive 2002/95/EC and have a
maximum concentration value of 0.1% by weight in
homogeneous materials for lead, mercury, hexavalent
chromium, PBB and PBDE and of 0.01% by weight in
homogeneous materials for cadmium.
Exemptions in the RoHS directive utilized in Ericsson
Power Modules products are found in the Statement of
Compliance document.
Ericsson Power Modules fulfills and will continuously fulfill
all its obligations under regulation (EC) No 1907/2006
concerning the registration, evaluation, authorization and
restriction of chemicals (REACH) as they enter into force
and is through product materials declarations preparing for
the obligations to communicate information on substances
in the products.
Quality Statement
The products are designed and manufactured in an
industrial environment where quality systems and methods
like ISO 9000, Six Sigma, and SPC are intensively in use to
boost the continuous improvements strategy. Infant
mortality or early failures in the products are screened out
and they are subjected to an ATE-based final test.
Conservative design rules, design reviews and product
qualifications, plus the high competence of an engaged
work force, contribute to the high quality of the products.
Warranty
Warranty period and conditions are defined in Ericsson
Power Modules General Terms and Conditions of Sale.
Limitation of Liability
Ericsson Power Modules does not make any other
warranties, expressed or implied including any warranty of
merchantability or fitness for a particular purpose
(including, but not limited to, use in life support
applications, where malfunctions of product can cause
injury to a person’s health or life).
© Ericsson AB 2014
The information and specifications in this technical
specification is believed to be correct at the time of
publication. However, no liability is accepted for
inaccuracies, printing errors or for any consequences
thereof. Ericsson AB reserves the right to change the
contents of this technical specification at any time without
prior notice.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
2
Safety Specifi cati o n
General inf ormation
Ericsson Power Modules DC/DC converters and DC/DC
regulators are designed in accordance with safety
standards IEC/EN/UL 60950-1 Safety of Information
Technology E quipment.
IEC/EN/UL 60950-1 contains requirements to prevent injury
or damage due to the following hazards:
• Electrical shock
• Energy hazards
• Fire
• Mechanical and heat hazards
• Radiation hazards
• Chemical hazards
On-board DC/DC converters and DC/DC regulators are
defined as component power supplies. As components
they cannot fully comply with the provisions of any safety
requirements without “Conditions of Acceptability”.
Clearance between conductors and between conductive
parts of the component power supply and conductors on
the board in the final product must meet the applicable
safety requirements. Certain conditions of acceptability
apply for component power supplies with limited stand-off
(see Mechanical Information for further information). It is
the responsibility of the installer to ensure that the final
product housing these components complies with the
requirements of all applicable safety standards and
regulations for the final product.
Component power supplies for general use should comply
with the requirements in IEC 60950-1, EN 60950-1 and
UL 60950-1 Safety of Informat i on Technology E qui pment.
There are other more product related standards, e.g.
IEEE 802.3 CSMA/CD (Ethernet) Access Method, and
ETS-300132-2 Power s upply interface at the input to
telecommunications equipment, operated by direct current
(dc), but all of these standards are based on
IEC/EN/UL 60950-1 with regards to safety.
Ericsson Power Modules DC/DC converters and DC/DC
regulators are UL 60950-1 recognized and certified in
accordance with EN 60950-1.
The flammability rating for all construction parts of the
products meet requirements for V-0 class material
according to IEC 60695-11-10, Fire hazard testing, tes t
flames – 50 W horizontal and vertical flame test methods.
The products should be installed in the end-use equipment,
in accordance with the requirements of the ultimate
application. Normally the output of the DC/DC converter is
considered as SELV (Safety Extra Low Voltage) and the
input source must be isolated by minimum Double or
Reinforced Insulation from the primary circuit (AC mains) in
accordance with IEC/EN/UL 60950-1.
Isolated DC/DC converters
It is recommended that a slow blow fuse is to be used at
the input of each DC/DC converter. If an input filter is used
in the circuit the fuse should be placed in front of the input
filter.
In the rare event of a component problem that imposes a
short circuit on the input source, this fuse will provide the
following functions:
• Isolate the fault from the input power source so as
not to affect the operation of other parts of the
system.
• Protect the distribution wiring from excessive
current and power loss thus preventing hazardous
overheating.
The galvanic isolation is verified in an electric strength test.
The test voltage (Viso) between input and output is
1500 Vdc or 2250 Vdc (refer to product specification).
24 V DC systems
The input voltage to the DC/DC converter is SELV (Safety
Extra Low Voltage) and the output remains SELV under
normal and abnormal operating conditions.
48 and 60 V DC systems
If the input voltage to the DC/DC converter is 75 Vdc or
less, then the output remains SELV (Safety Extra Low
Voltage) under normal and abnormal operating conditions.
Single fault testing in the input power supply circuit should
be performed with the DC/DC converter connected to
demonstrate that the input voltage does not exceed
75 Vdc.
If the input power source circuit is a DC power system, the
source may be treated as a TNV-2 circuit and testing has
demonstrated compliance with SELV limits in accordance
with IEC/EN/UL60950-1.
Non-isolated DC/DC regulators
The input voltage to the DC/DC regulator is SELV (Safety
Extra Low Voltage) and the output remains SELV under
normal and abnormal operating conditions.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
3
Ericsson Internal
PRODUCT SPECIFICATION
1 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Absolute Maximum Ratings
Characteristics min typ max Unit
TP1 Operating temperature (see Thermal Consideration section) -40 120 °C
TS Storage temperature -40 125 °C
VI Input voltage (See Operating Information Section for input and output voltage relations) -0.3 16 V
Logic I/O voltage CTRL, SA0, SA1, SALERT, SCL, SDA, VSET, SYNC, GCB, PG -0.3 6.5 V
Ground voltage differential -S, PREF, GND -0.3 0.3 V
Analog pin voltage VO, +S, VTRK -0.3 6.5 V
Stress in excess of Absolute Maximum Ratings may cause permanent damage. Absolute Maximum Ratings, sometimes referred to as no destruction limits, are
normally tested with one parameter at a time exceeding the limits in the Electrical Specification. If exposed to stress above these limits, function and performance
may degrade in an unspecified manner.
Configuration File
This product is designed with a digital control circuit. The control circuit uses a configuration file which determines the functionality and performance of the product.
The Electrical Specification table shows parameter values of functionality and performance with the default configuration file, unless otherwise specified. The default
configuration file is designed to fit most application need with focus on high efficiency. If different characteristics are required it is possible to change the
configuration file to optimize certain performance characteristics. In this Technical specification examples are included to show the possibilities with digital control.
See Operating Information section for information about trade offs when optimizing certain key performance characteristics.
Fundamental Circuit Diagram
Ci=22 μF Co =100 μF
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
4
Ericsson Internal
PRODUCT SPECIFICATION
2 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Electrical Specification
BMR 462 0002, BMR 462 1002, BMR 462 0006, BMR 462 1 006
T
P1
= -30 to +95°C, V
I
= 4.5 to 14 V, V
I
> V
O
+ 1.0 V
Typical values given at: TP1 = +25°C, VI = 12.0 V, max IO, unless otherwise specified under Conditions.
Default configuration file, 190 10-CDA 102 0207/001.
External CIN = 470 µF/10 mΩ, COUT = 470 µF/10 mΩ. See Operating Information section for selection of capacitor types.
Sense pins are connected to the output pins.
Characteristics Conditions min typ max Unit
VI
Input voltage rise time
monotonic
2.4
V/ms
VO
Output voltage without pin strap
1.2
V
Output voltage adjustment range
0.60
5.0
V
Output voltage adjustment including
margining 0.54 5.5 V
Output voltage set-point resolution ±0.025 % VO
Output voltage accuracy Including line, load, temp.
See Note 15 -1 1 %
Internal resistance +S/-S to VOUT/GND
4.7
Ω
Line regulation
VO = 0.6 V 2
mV
VO = 1.0 V 2
VO = 3.3V
2
VO = 5.0 V
3
Load regulation; IO = 0 - 100%
VO = 0.6 V
3
mV
VO = 1.0 V
2
VO = 3.3V
2
VO = 5.0 V
2
VOac
Output ripple & noise
CO=470 μF (minimum external
capacitance). See Note 12
VO = 0.6 V
20
mVp-p
VO = 1.0 V
30
VO = 3.3V 60
VO = 5.0 V 100
IO
Output current
See Note 17
0.001
12
A
IS Static input current at max IO
VO = 0.6 V 0.76
A
VO = 1.0 V
1.17
VO = 3.3V
3.53
VO = 5.0 V
4.1
Ilim
Current limit threshold
14
20
A
Isc Short circuit
current
RMS, hiccup mode,
See Note 3
VO = 0.6 V
8
A
VO = 1.0 V
6
VO = 3.3V
5
VO = 5.0 V
4
η Efficiency
50% of max IO
VO = 0.6 V
82.6
%
VO = 1.0 V
88.5
VO = 3.3V
94.7
VO = 5.0 V 95.7
max IO
VO = 0.6 V 78.5
%
VO = 1.0 V
85.4
VO = 3.3V
93.6
VO = 5.0 V
94.9
Pd Power dissipation at max IO
VO = 0.6 V
2.05
W
VO = 1.0 V
2.11
VO =3.3V
2.66
VO = 5.0 V 3.15
Pli
Input idling
power
(no load)
Default configuration:
Continues Conduction
Mode, CCM
VO = 0.6 V
0.33
W
VO = 1.0 V
0.35
VO = 3.3V
0.56
VO = 5.0 V
0.99
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
5
Ericsson Internal
PRODUCT SPECIFICATION
3 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Characteristics Conditions min typ max Unit
PCTRL Input standby
power
Turned off with
CTRL-pin
Default configuration:
Monitoring enabled,
Precise timing enabled
180 mW
Ci Internal input capacitance 22 μF
Co Internal output capacitance 100 μF
COUT
Total external output capacitance
See Note 10
300
7 500
μ
F
ESR range of capacitors
(per single capacitor)
See Note 10 5 30 mΩ
Vtr1
Load transient
peak voltage
deviation
Load step
25-75-25% of
max IO
Default configuration
di/dt = 2 A/μs
CO=470 μF (minimum
external capacitance)
see Note 13
VO = 0.6 V 55
mV
VO = 1.0 V 65
VO = 3.3 V 110
VO = 5.0 V 190
ttr1
Load transient
recovery time,
Note 5
Load step
25-75-25% of
max IO
Default configuration
di/dt = 2 A/μs
CO=470 μF (minimum
external capacitance)
see Note 13
VO = 0.6 V 230
μs
VO = 1.0 V 210
VO = 3.3 V 200
VO =5.0 V 200
fs
Switching frequency
320
kHz
Switching frequency range
PMBus configurable
200-640
kHz
Switching frequency set-point accuracy
±5
%
Control Circuit PWM Duty Cycle
5
95
%
Minimum Sync Pulse Width
150
ns
Synchronization Frequency Tolerance
External clock source
-13
13
%
Input Under Voltage
Lockout,
UVLO
UVLO threshold
3.85
V
UVLO threshold range
PMBus configurable
3.85-14
V
Set point accuracy
-150
150
mV
UVLO hysteresis
0.35
V
UVLO hysteresis range PMBus configurable 0-10.15 V
Delay 2.5 μs
Fault response
See Note 3
Automatic restart, 70 ms
Input Over Voltage
Protection,
IOVP
IOVP threshold
16
V
IOVP threshold range
PMBus configurable
4.2-16
V
Set point accuracy
-150
150
mV
IOVP hysteresis
1
V
IOVP hysteresis range
PMBus configurable
0-11.8
V
Delay
2.5
μs
Fault response
See Note 3
Automatic restart, 70 ms
Power Good, PG,
See Note 2
PG threshold 90 % VO
PG hysteresis 5 % VO
PG delay
10
ms
PG delay range
PMBus configurable
0-500
s
Output voltage
Over/Under Voltage
Protection,
OVP/UVP
UVP threshold
85
% VO
UVP threshold range
PMBus configurable
0-100
% VO
UVP hysteresis
5
% VO
OVP threshold
115
% VO
OVP threshold range
PMBus configurable
100-115
% VO
UVP/OVP response time
25
μs
UVP/OVP
response time range
PMBus configurable 5-60 μs
Fault response
See Note 3
Automatic restart, 70 ms
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
6
Ericsson Internal
PRODUCT SPECIFICATION
4 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Characteristics Conditions min typ max Unit
Over Current
Protection,
OCP
OCP threshold
18
A
OCP threshold range
PMBus configurable
0-18
A
Protection delay,
See Note 4
5
T
sw
Protection delay range
PMBus configurable
1-32
T
sw
Fault response
See Note 3
Automatic restart, 70 ms
Over Temperature
Protection,
OTP at P1
See Note 9
OTP threshold
120
°
C
OTP threshold range PMBus configurable -40…+120 °
C
OTP hysteresis
15
°C
OTP hysteresis range
PMBus configurable
0-160
°
C
Fault response
See Note 3
Automatic restart, 240 ms
VIL
Logic input low threshold
SYNC, SA0, SA1, SCL, SDA,
GCB, CTRL, VSET
0.8
V
VIH
Logic input high threshold
2
V
IIL
Logic input low sink current
CTRL
0.6
mA
VOL Logic output low
SYNC, SCL, SDA, SALERT,
GCB, PG
0.4 V
VOH Logic output high 2.25 V
I
OL
Logic output low sink current 4 mA
IOH
Logic output high source current
2
mA
tset
Setup time, SMBus
See Note 1
300
ns
thold
Hold time, SMBus
See Note 1
250
ns
tfree
Bus free time, SMBus
See Note 1
2
ms
Cp
Internal capacitance on logic pins
10
pF
Boot-up time
See Note 11
35
ms
Output Voltage
Delay Time
See Note 6
Delay duration
10
ms
Delay duration range
PMBus configurable
2-500000
Delay accuracy
turn-on
Default configuration:
CTRL controlled
Precise timing enabled
±0.25 ms
PMBus controlled
Precise timing disabled
-0.25/+4 ms
Delay accuracy
turn-off
-0.25/+4 ms
Output Voltage
Ramp Time
See Note 14
Ramp duration
10
ms
Ramp duration range PMBus configurable 0-200
Ramp time accuracy 100 µs
VTRK Input Bias Current
VVTRK = 5.5 V
110
200
µA
VTRK Tracking Ramp Accuracy (VO - VVTRK)
100% Tracking, see Note 8
-100
100
mV
VTRK Regulation Accuracy (VO - VVTRK)
100% Tracking
-1
1
%
Monitoring accuracy
READ_VIN vs VI
3
%
READ_VOUT vs VO
1
%
READ_IOUT vs IO
I
O
=0-12 A, T
P1
= 0 to +95°C
VI = 12 V
±1.6 A
READ_IOUT vs IO
I
O
=0-12 A, T
P1
= 0 to +95°C
VI = 4.5-14 V
±2.7 A
Note 1: See section I2C/SMBus Setup and Hold Times – Definitions.
Note 2: Monitorable over PMBus Interface.
Note 3: Automatic restart ~70 or 240 ms after fault if the fault is no longer present. Continuous restart attempts if the fault reappear after restart. See Operating Information and AN302 for
other fault response options.
Note 4: Tsw is the switching period.
Note 5: Within +/-3% of VO
Note 6: See section Soft-start Power Up.
Note 8: Tracking functionality is designed to follow a VTRK signal with slewrate < 2.4V/ms. For faster VTRK signals accuracy will depend on the regulator bandwidth.
Note 9: See section Over Temperature Protection (OTP).
Note 10: See section External Capacitors.
Note 11: See section Start-Up Procedure.
Note 12: See graph Output Ripple vs External Capacitance and Operating information section Output Ripple and Noise.
Note 13: See graph Load Transient vs. External Capacitance and Operating information section External Capacitors.
Note 14: Time for reaching 100% of nominal Vout.
Note 15: For Vout < 1.0V accuracy is +/-10 mV. For further deviations see section Output Voltage Adjust using PMBus.
Note 17: Without minimum load the monitoring function will cause an output voltage of ~0.6 V when the output is disabled. This does not apply if Low Power mode is used.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
7
Ericsson Internal
PRODUCT SPECIFICATION
5 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Typical Characteristics
Efficiency and Power Dissipation
BMR 462 0002, BMR 462 1002
BMR 462 0006, BMR 4 62 1006
Efficiency vs. Output Current, VI=5 V Power Dissipation vs. Output Current, VI=5 V
75
80
85
90
95
100
0246810 12
[A]
[%]
0.6 V
1.0 V
3.3 V
0
1
2
3
4
5
0246810 12
[A]
[W]
0.6 V
1.0 V
3.3 V
Efficiency vs. load current and output voltage:
T
P1
= +25°C. V
I
=5 V, f
sw
=320 kHz, C
O
=470 µF/10 mΩ.
Dissipated power vs. load current and output voltage:
T
P1
= +25°C. V
I
=5 V, f
sw
=320 kHz, C
O
=470 µF/10 mΩ.
Efficiency vs. Output Current, VI=12 V
Power Dissipation vs. Output Current, VI=12 V
75
80
85
90
95
100
0246810 12
[A]
[%]
0,6 V
1,0 V
3,3 V
5,0 V
0
1
2
3
4
5
0246810 12
[A]
[W]
0,6 V
1,0 V
3,3 V
5,0 V
Efficiency vs. load current and output voltage at
TP1 = +25°C. VI=12 V, fsw=320 kHz, CO=470 µF/10 mΩ.
Dissipated power vs. load current and output voltage:
TP1 = +25°C. VI=12 V, fsw=320 kHz, CO=470 µF/10 mΩ.
Efficienc y vs. Output Current and
Switch Frequency
Power Dissipation vs. Output Current and
Swit ch Frequency
70
75
80
85
90
95
0 2 4 6 8 10 12
[A]
[%]
200
kHz
320
kHz
480
kHz
640
kHz
0
1
2
3
4
5
0246810 12
[A]
[W]
200
kHz
320
kHz
480
kHz
640
kHz
Efficiency vs. load current and switch frequency at
TP1 = +25°C. VI=12 V, VO=1.0 V, CO=470 µF/10 mΩ
Default configuration except changed frequency.
Dissipated power vs. load current and switch frequency at
TP1 = +25°C. VI=12 V, VO=1.0 V, CO=470 µF/10 mΩ
Default configuration except changed frequency.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
8
Ericsson Internal
PRODUCT SPECIFICATION
6 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Typical Characteristics
Load Transient
BMR 462 0002, BMR 462 1002
BMR 462 0006, BMR 4 62 1006
Load Transient vs. External Capacitance, VO=1.0 V Load Transient vs. External Capacitance, VO=3.3 V
0
50
100
150
200
0 1 2 3 4 5
[mF]
[mV]
Default
PID/NLR
Opt. PID, No
NLR
Default PID,
Opt. NLR
Opt.
PID/NLR
0
50
100
150
200
0 1 2 3 4 5
[mF]
[mV]
Default
PID/NLR
Opt. PID, No
NLR
Default PID,
Opt. NLR
Opt.
PID/NLR
Load transient peak voltage deviation vs. external capacitance.
Step-change (3-9-3 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25°C. VI=12 V, VO=1.0 V, fsw=320 kHz, di/dt=2 A/µs
Load transient peak voltage deviation vs. external capacitance.
Step-change (3-9-3 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25°C. VI=12 V, VO=3.3 V, fsw=320 kHz, di/dt=2 A/µs
Load transi ent vs. Switch Frequency
Output Load Transient Response, Default PID/NLR
30
60
90
120
150
180
200 300 400 500 600
[kHz]
[mV]
Default
PID/NLR
Opt. PID,
No NLR
Default
PID, Opt.
NLR
Opt.
PID/NLR
Load transient peak voltage deviation vs. frequency.
Step-change (3-9-3 A).
TP1 = +25°C. VI=12 V, VO=3.3 V, CO=470 µF/10 mΩ
Output voltage response to load current
step-change (3-9-3 A) at:
TP1 = +25°C, VI = 12 V, VO =3.3 V
di/dt=2 A/µs, fsw=320 kHz, CO=470 µF/10
mΩ
Top trace: output voltage (200
mV/div.).
Bottom trace: load current (5
A/div.).
Time scale: (0.1 ms/div.).
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
9
Ericsson Internal
PRODUCT SPECIFICATION
7 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Typical Characteristics
Output Current Characteristic
BMR 462 0002, BMR 462 1002
BMR 462 0006, BMR 4 62 1006
Output Current Derating, VO=0.6 V
Output Current Derating, VO=1.0 V
0
2
4
6
8
10
12
14
80 90 100 110 120
[°C]
[A]
3.0 m/s
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
0
2
4
6
8
10
12
14
80 90 100 110 120
[°C]
[A]
3.0 m/s
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
Available load current vs. ambient air temperature and airflow at
V
O
=0.6 V, V
I
= 12 V. See Thermal Consideration section.
Available load current vs. ambient air temperature and airflow at
V
O
=1.0 V, V
I
= 12 V. See Thermal Consideration section.
Output Current Derating, VO=3.3 V
Output Current Derating, VO=5.0 V
0
2
4
6
8
10
12
14
80 90 100 110 120
[°C]
[A]
3.0 m/s
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
0
2
4
6
8
10
12
14
80 90 100 110 120
[°C]
[A]
3.0 m/s
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
Available load current vs. ambient air temperature and airflow at
VO=3.3 V, VI = 12 V. See Thermal Consideration section. Available load current vs. ambient air temperature and airflow at
VO=5.0 V, VI = 12 V. See Thermal Consideration section.
Current Limit Characteri st ics, V
O
=1.0 V
Current Limit Characteri st ics, V
O
=3.3 V
0.0
0.2
0.4
0.6
0.8
1.0
1.2
12 14 16 18 20
[A]
[V]
5 V
12 V
14 V
0
1
2
3
4
12 14 16 18 20
[A]
[V]
5 V
12 V
14 V
O
utput voltage vs. load current at TP1 = +25°C. VO=1.0 V.
O
utput voltage vs. load current at TP1 = +25°C. VO=3.3 V.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
10
Ericsson Internal
PRODUCT SPECIFICATION
8 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Typical Characteristics
Output Voltage
BMR 462 0002, BMR 462 1002
BMR 462 0006, BMR 4 62 1006
Output Ripple & Noise, V
O
=1.0 V
Output Ripple & Noise, V
O
=3.3 V
Output voltage ripple at:
TP1 = +25°C, VI = 12 V, CO=470 µF
/10
mΩ
IO = 12 A
Trace: output voltage (20 mV/div.).
Time scale: (2 µs/div.).
Output voltage ripple at:
TP1 = +25°C, VI = 12 V, CO=470 µF/10
mΩ
IO = 12 A
Trace: output voltage (20 mV/div.).
Time scale: (2 µs/div.).
Output Ripple vs. Input Voltage
Output Ripple vs. Frequency
0
10
20
30
40
50
60
70
80
90
57911 13
[V]
[mV
pk-pk
]
0.6 V
1.0 V
3.3 V
5.0 V
0
20
40
60
80
100
120
140
160
200 250 300 350 400 450 500 550 600
[kHz]
[mV
pk-pk
]
0.6 V
1.0 V
3.3 V
5.0 V
Output voltage ripple Vpk-pk at: TP1 = +25°C, CO=470 µF/10 mΩ,
IO =12 A.
Output voltage ripple Vpk-pk at: TP1 = +25°C, VI = 12 V, CO=470 µF/10 mΩ,
IO = 12 A. Default configuration except changed frequency.
Output Ripple vs. External Capacitance
Load regulation, V
O
=3.3 V
0
5
10
15
20
25
30
35
40
01234
[mF]
[mV
pk-pk
]
0.6 V
1.0 V
3,3 V
5 V
3.270
3.280
3.290
3.300
3.310
3.320
3.330
0246810 12
[A]
[V]
4.5 V
5 V
12 V
14 V
Output voltage ripple V
pk-pk
at: T
P1
= +25°C, V
I
= 12 V. I
O
= 12 A. Parallel coupling
of capacitors with 470 µF/10 mΩ,
Load regulation at V
o
=3.3 V at: T
P1
= +25°C, C
O
=470 µF/10 mΩ
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
11
Ericsson Internal
PRODUCT SPECIFICATION
9 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Typical Characteristics
Start-up and shut-down
BMR 462 0002, BMR 462 1002
BMR 462 0006, BMR 4 62 1006
Start-up by input source
Shut-down by input source
Start-up enabled by connecting VI at:
TP1 = +25°C, VI = 12 V, VO = 3.3 V
CO = 470 µF/10 mΩ, IO = 12 A
Top trace: Input voltage (5 V/div.).
Bottom trace: Output voltage (2 V/div.).
Time scale: (20 ms/div.).
Shut-down enabled by disconnecting VI
at:
TP1 = +25°C, VI = 12 V, VO = 3.3 V
CO = 470 µF/10 mΩ, IO = 12 A
Top trace: Input voltage (5 V/div).
Bottom trace: Output voltage (2 V/div.).
Time scale: (2 ms/div.).
Start-up by CTRL signal
Shut-down by CTRL signal
Start-up by enabling CTRL signal at:
TP1 = +25°C, VI = 12 V, VO = 3.3 V
CO = 470 µF/10 mΩ, IO = 12 A
Top trace: output voltage (2 V/div.).
Bottom trace: CTRL signal (2 V/div.).
Time scale: (20 ms/div.).
Shut-down enabled by disconnecting V
I
at:
TP1 = +25°C, VI = 12 V, VO = 3.3 V
CO = 470 µF/10 mΩ, IO = 12 A
Top trace: output voltage (2 V/div).
Bottom trace: CTRL signal (2 V/div.).
Time scale: (2 ms/div.).
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
12
Ericsson Internal
PRODUCT SPECIFICATION
10 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Electrical Specification
BMR 462 2002 (SIP)
T
P1
= -30 to +95°C, V
I
= 4.5 to 14 V, V
I
> V
O
+ 1.0 V
Typical values given at: TP1 = +25°C, VI = 12.0 V, max IO, unless otherwise specified under Conditions.
Default configuration file, 190 10-CDA 102 0260/001.
External CIN = 470 µF/10 mΩ, COUT = 470 µF/10 mΩ. See Operating Information section for selection of capacitor types.
Sense pins are connected to the output pins.
Characteristics Conditions min typ max Unit
VI
Input voltage rise time
monotonic
2.4
V/ms
VO
Output voltage without pin strap
1.2
V
Output voltage adjustment range
0.60
5.0
V
Output voltage adjustment including
margining 0.54 5.5 V
Output voltage set-point resolution ±0.025 % VO
Output voltage accuracy Including line, load, temp.
See Note 15 -1 1 %
Internal resistance +S/-S to VOUT/GND
4.7
Ω
Line regulation
VO = 0.6 V
2
mV
VO = 1.0 V
2
VO = 3.3 V
2
VO = 5.0 V 3
Load regulation; IO = 0 - 100%
VO = 0.6 V 3
mV
VO = 1.0 V
2
VO = 3.3 V
2
VO = 5.0 V
2
VOac
Output ripple & noise
CO=470 μF (minimum external
capacitance). See Note 12
VO = 0.6 V
20
mVp-p
VO = 1.0 V
30
VO = 3.3 V
55
VO = 5.0 V
95
IO
Output current
Note 17
0.001
12
A
IS Static input current at max IO
VO = 0.6 V
0.75
A
VO = 1.0 V
1.21
VO = 3.3 V 3.55
VO = 5.0 V 4.1
Ilim Current limit threshold 14 20 A
Isc Short circuit
current
RMS, hiccup mode,
See Note 3
VO = 0.6 V
8
A
VO = 1.0 V
6
VO = 3.3 V
5
VO = 5.0 V
4
η Efficiency
50% of max IO
VO = 0.6 V
82.6
%
VO = 1.0 V
88.5
VO = 3.3 V
94.8
VO = 5.0 V
95.7
max IO
VO = 0.6 V
78.1
%
VO = 1.0 V
85.2
VO = 3.3 V 93.7
VO = 5.0 V 94.9
Pd Power dissipation at max IO
VO = 0.6 V
1.90
W
VO = 1.0 V
1.97
VO = 3.3 V
2.65
VO = 5.0 V
3.12
Pli
Input idling
power
(no load)
Default configuration:
Continues Conduction
Mode, CCM
VO = 0.6 V 0.36
W
VO = 1.0 V 0.35
VO = 3.3 V
0.54
VO = 5.0 V
0.97
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
13
Ericsson Internal
PRODUCT SPECIFICATION
11 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Characteristics Conditions min typ max Unit
PCTRL Input standby
power
Turned off with
CTRL-pin
Default configuration:
Monitoring enabled,
Precise timing enabled
180 mW
Ci Internal input capacitance 22 μF
Co Internal output capacitance 100 μF
COUT
Total external output capacitance
See Note 10
300
7 500
μ
F
ESR range of capacitors
(per single capacitor)
See Note 10 5 30 mΩ
Vtr1
Load transient
peak voltage
deviation
Load step
25-75-25% of
max IO
Default configuration
di/dt = 2 A/μs
CO=470 μF (minimum
external capacitance)
see Note 13
VO = 0.6 V 50
mV
VO = 1.0 V 60
VO = 3.3 V 105
VO = 5.0 V 190
ttr1
Load transient
recovery time,
Note 5
Load step
25-75-25% of
max IO
Default configuration
di/dt = 2 A/μs
CO=470 μF (minimum
external capacitance)
see Note 13
VO = 0.6 V 230
μs
VO = 1.0 V 205
VO = 3.3 V 195
VO = 5.0 V 200
fs
Switching frequency
320
kHz
Switching frequency range
PMBus configurable
200-640
kHz
Switching frequency set-point accuracy
±5
%
Control Circuit PWM Duty Cycle
5
95
%
Minimum Sync Pulse Width
150
ns
Synchronization Frequency Tolerance
External clock source
-13
13
%
Input Under Voltage
Lockout,
UVLO
UVLO threshold
3.85
V
UVLO threshold range
PMBus configurable
3.85-14
V
Set point accuracy
-150
150
mV
UVLO hysteresis
0.35
V
UVLO hysteresis range PMBus configurable 0-10.15 V
Delay 2.5 μs
Fault response
See Note 3
Automatic restart, 70 ms
Input Over Voltage
Protection,
IOVP
IOVP threshold
16
V
IOVP threshold range
PMBus configurable
4.2-16
V
Set point accuracy
-150
150
mV
IOVP hysteresis
1
V
IOVP hysteresis range
PMBus configurable
0-11.8
V
Delay
2.5
μs
Fault response
See Note 3
Automatic restart, 70 ms
Power Good, PG,
See Note 2
PG threshold 90 % VO
PG hysteresis 5 % VO
PG delay
10
ms
PG delay range
PMBus configurable
0-500
S
Output voltage
Over/Under Voltage
Protection,
OVP/UVP
UVP threshold
85
% VO
UVP threshold range
PMBus configurable
0-100
% VO
UVP hysteresis
5
% VO
OVP threshold
115
% VO
OVP threshold range
PMBus configurable
100-115
% VO
UVP/OVP response time
25
μs
UVP/OVP
response time range
PMBus configurable 5-60 μs
Fault response
See Note 3
Automatic restart, 70 ms
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
14
Ericsson Internal
PRODUCT SPECIFICATION
12 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Characteristics Conditions min typ max Unit
Over Current
Protection,
OCP
OCP threshold
18
A
OCP threshold range
PMBus configurable
0-18
A
Protection delay,
See Note 4
5
T
sw
Protection delay range
PMBus configurable
1-32
T
sw
Fault response
See Note 3
Automatic restart, 70 ms
Over Temperature
Protection,
OTP at P1
See Note 9
OTP threshold
120
°
C
OTP threshold range PMBus configurable -40…+120 °
C
OTP hysteresis
15
°C
OTP hysteresis range
PMBus configurable
0-160
°
C
Fault response
See Note 3
Automatic restart, 240 ms
VIL
Logic input low threshold
SYNC, SA0, SA1, SCL, SDA,
GCB, CTRL, VSET
0.8
V
VIH
Logic input high threshold
2
V
IIL
Logic input low sink current
CTRL
0.6
mA
VOL Logic output low
SYNC, SCL, SDA, SALERT,
GCB, PG
0.4 V
VOH Logic output high 2.25 V
I
OL
Logic output low sink current 4 mA
IOH
Logic output high source current
2
mA
tset
Setup time, SMBus
See Note 1
300
ns
thold
Hold time, SMBus
See Note 1
250
ns
tfree
Bus free time, SMBus
See Note 1
2
ms
Cp
Internal capacitance on logic pins
10
pF
Boot-up time
See Note 11
35
ms
Output Voltage
Delay Time
See Note 6
Delay duration
10
ms
Delay duration range
PMBus configurable
2-500000
Delay accuracy
turn-on
Default configuration:
CTRL controlled
Precise timing enabled
±0.25 ms
PMBus controlled
Precise timing disabled
-0.25/+4 ms
Delay accuracy
turn-off
-0.25/+4 ms
Output Voltage
Ramp Time
Ramp duration
10
ms
Ramp duration range PMBus configurable 0-200
Ramp time accuracy 100 µs
VTRK Input Bias Current
VVTRK = 5.5 V
110
200
µA
VTRK Tracking Ramp Accuracy (VO - VVTRK)
100% Tracking, see Note 8
-100
100
mV
VTRK Regulation Accuracy (VO - VVTRK)
100% Tracking
-1
1
%
Monitoring accuracy
READ_VIN vs VI
3
%
READ_VOUT vs VO
1
%
READ_IOUT vs IO
I
O
=0-12 A, T
P1
= 0 to +95°C
VI = 12 V
±1.6 A
READ_IOUT vs IO
I
O
=0-12 A, T
P1
= 0 to +95°C
VI = 4.5-14 V
±2.7 A
Note 1: See section I2C/SMBus Setup and Hold Times – Definitions.
Note 2: Monitorable over PMBus Interface.
Note 3: Automatic restart ~70 or 240 ms after fault if the fault is no longer present. Continuous restart attempts if the fault reappear after restart. See Operating Information and AN302 for
other fault response options.
Note 4: Tsw is the switching period.
Note 5: Within +/-3% of VO
Note 6: See section Soft-start Power Up.
Note 8: Tracking functionality is designed to follow a VTRK signal with slewrate < 2.4V/ms. For faster VTRK signals accuracy will depend on the regulator bandwidth.
Note 9: See section Over Temperature Protection (OTP).
Note 10: See section External Capacitors.
Note 11: See section Start-Up Procedure.
Note 12: See graph Output Ripple vs External Capacitance and Operating information section Output Ripple and Noise.
Note 13: See graph Load Transient vs. External Capacitance and Operating information section External Capacitors.
Note 14: Time for reaching 100% of nominal Vout.
Note 15: For Vout < 1.0V accuracy is +/-10 mV. For further deviations see section Output Voltage Adjust using PMBus.
Note 17: Without minimum load the monitoring function will cause an output voltage of ~0.6 V when the output is disabled. This does not apply if Low Power mode is used.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
15
Ericsson Internal
PRODUCT SPECIFICATION
13 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Typical Characteristics
Efficiency and Power Dissipation
BMR 462 2002 (SIP)
Efficiency vs. Output Current, VI=5 V Power Dissipati on vs. Output Current, VI=5 V
75
80
85
90
95
100
0 2 4 6 8 10 12
[A]
[%]
0.6 V
1.0 V
3.3 V
0
1
2
3
4
5
0246810 12
[A]
[W]
0.6 V
1.0 V
3.3 V
Efficiency vs. load current and output voltage:
T
P1
= +25°C. V
I
=5 V, f
sw
=320 kHz, C
O
=470 µF/10 mΩ.
Dissipated power vs. load current and output voltage:
T
P1
= +25°C. V
I
=5 V, f
sw
=320 kHz, C
O
=470 µF/10 mΩ.
Efficiency vs. Output Current, VI=12 V
Power Dissipation vs. Output Current, VI=12 V
75
80
85
90
95
100
0 2 4 6 8 10 12
[A]
[%]
0,6 V
1,0 V
3,3 V
5,0 V
0
1
2
3
4
5
0246810 12
[A]
[W]
0,6 V
1,0 V
3,3 V
5,0 V
Efficiency vs. load current and output voltage at
TP1 = +25°C. VI=12 V, fsw=320 kHz, CO=470 µF/10 mΩ.
Dissipated power vs. load current and output voltage:
TP1 = +25°C. VI=12 V, fsw=320 kHz, CO=470 µF/10 mΩ.
Efficiency vs. Output Current and
Switch Frequency
Power Dissipation vs. Output Current and
Swit ch Frequency
70
75
80
85
90
95
0 2 4 6 8 10 12
[A]
[%]
200
kHz
320
kHz
480
kHz
640
kHz
0
1
2
3
4
5
0246810 12
[A]
[W]
200
kHz
320
kHz
480
kHz
640
kHz
Efficiency vs. load current and switch frequency at
TP1 = +25°C. VI=12 V, VO=1.0 V, CO=470 µF/10 mΩ
Default configuration except changed frequency
Dissipated power vs. load current and switch frequency at
TP1 = +25°C. VI=12 V, VO=1.0 V, CO=470 µF/10 mΩ
Default configuration except changed frequency
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
16
Ericsson Internal
PRODUCT SPECIFICATION
14 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Typical Characteristics
Load Transient
BMR 462 2002 (SIP)
Load Transient vs. External Capacitance, VO= 1.0 V Load Transi ent vs. Externa l Capacitance, VO=3.3 V
0
40
80
120
160
200
0 1 2 3 4 5
[mF]
[mV]
Default
PID/NLR
Opt. PID,
No NLR
Default PID,
Opt. NLR
Opt.
PID/NLR
0
50
100
150
200
012345
[mF]
[mV]
Default
PID/NLR
Opt. PID,
No NLR
Default PID,
Opt. NLR
Opt.
PID/NLR
Load transient peak voltage deviation vs. external capacitance.
Step-change (3-9-3 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25°C. VI=12 V, VO=1.0 V, fsw=320 kHz, di/dt=2 A/µs
Load transient peak voltage deviation vs. external capacitance.
Step-change (3-9-3 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25°C. VI=12 V, VO=3.3 V, fsw=320 kHz, di/dt=2 A/µs
Load transient vs. Switch Frequency
Output Load Transient Respo nse, Default PID/NLR
0
40
80
120
160
200
200 300 400 500 600
[kHz]
[mV]
Default
PID/NLR
Opt. PID, No
NLR
Default PID,
Opt. NLR
Opt.
PID/NLR
Load transient peak voltage deviation vs. frequency.
Step-change (3-9-3 A).
TP1 = +25°C. VI=12 V, VO=3.3 V, CO=470 µF/10 mΩ
Output voltage response to load current
step-change (3-9-3 A) at:
TP1 = +25°C, VI = 12 V, VO =3.3 V
di/dt=2 A/µs, fsw=320 kHz, CO=470 µF/10
mΩ
Top trace: output voltage (200
mV/div.).
Bottom trace: load current (10
A/div.).
Time scale: (0.1 ms/div.).
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
17
Ericsson Internal
PRODUCT SPECIFICATION
15 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Typical Characteristics
Output Current Characteristic
BMR 462 2002 (SIP)
Output Current Derating, VO=0.6 V Output Current Derating, VO=1.0 V
0
2
4
6
8
10
12
14
80 90 100 110 120
[°C]
[A]
3.0 m/s
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
0
2
4
6
8
10
12
14
80 90 100 110 120
[°C]
[A]
3.0 m/s
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
Available load current vs. ambient air temperature and airflow at
V
O
=0.6 V, V
I
= 12 V. See Thermal Consideration section.
Available load current vs. ambient air temperature and airflow at
V
O
=1.0 V, V
I
= 12 V. See Thermal Consideration section.
Output Current Derating, VO=3.3 V
Output Current Derating, VO=5.0 V
0
2
4
6
8
10
12
14
80 90 100 110 120
[°C]
[A]
3.0 m/s
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
0
2
4
6
8
10
12
14
80 90 100 110 120
[°C]
[A]
3.0 m/s
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
Available load current vs. ambient air temperature and airflow at
VO=3.3 V, VI = 12 V. See Thermal Consideration section. Available load current vs. ambient air temperature and airflow at
VO=5.0 V, VI = 12 V. See Thermal Consideration section.
Current Limit Characteri st ics, VO=1.0 V
Current Limit Characteri st ics, VO=3.3 V
0.0
0.2
0.4
0.6
0.8
1.0
1.2
12 13 14 15 16 17 18 19 20
[A]
[V]
5 V
12 V
14 V
0
1
2
3
4
12 13 14 15 16 17 18 19 20
[A]
[V]
5 V
12 V
14 V
O
utput voltage vs. load current at TP1 = +25°C. VO=1.0 V.
O
utput voltage vs. load current at TP1 = +25°C. VO=3.3 V.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
18
Ericsson Internal
PRODUCT SPECIFICATION
16 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Typical Characteristics
Output Voltage
BMR 462 2002 (SIP)
Output Ripple & Noise, V
O
=1.0 V
Output Ripple & Noise, V
O
=3.3 V
Output voltage ripple at: T
P1
= +25°C,
VI = 12 V, CO=470 µF/10 mΩ
IO = 12 A
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output voltage ripple at: T
P1
= +25°C,
VI = 12 V, CO=470 µF/10 mΩ
IO = 12 A
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output Ripple vs. Input Voltage
Output Ripple vs. Frequency
0
10
20
30
40
50
60
70
80
57911 13
[V]
[mVpk-pk]
0.6 V
1.0 V
3.3 V
5.0 V
0
20
40
60
80
100
120
140
160
200 250 300 350 400 450 500 550 600 [kHz]
[mV
pk-pk
]
0.6 V
1.0 V
3.3 V
5.0 V
Output voltage ripple Vpk-pk at:
TP1 = +25°C, CO=470 µF/10 mΩ, IO = 12 A.
Output voltage ripple Vpk-pk at: TP1 = +25°C, VI = 12 V, CO=470 µF/10 mΩ,
IO = 12 A. Default configuration except changed frequency.
Output Ripple vs. External Capacitance
Load regulation, VO=3.3 V
0
5
10
15
20
25
30
35
40
01234
[mF]
[mV
pk-pk
]
0.6 V
1.0 V
3,3 V
5 V
3.270
3.280
3.290
3.300
3.310
3.320
3.330
0246810 12
[A]
[V]
4.5 V
5 V
12 V
14 V
Output voltage ripple V
pk-pk
at: T
P1
= +25°C, V
I
= 12 V. I
O
= 12 A.
Parallel coupling of capacitors with 470 µF/10 mΩ,
Load regulation at V
o
=3.3 V at: T
P1
= +25°C, C
O
=470 µF/10 mΩ
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
19
Ericsson Internal
PRODUCT SPECIFICATION
17 (18)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 2/1301-BMR 462 Uen
Approved Checked Date Rev Reference
EAB/FJB/GMF (Ksenia Harrisen) (MICRF) 2012-10-25 B
Typical Characteristics
Start-up and shut-down
BMR 462 2002 (SIP)
Start-up by input source
Shut-down by input source
Start-up enabled by connecting VI at:
TP1 = +25°C, VI = 12 V, VO = 3.3 V
CO = 470 µF/10 mΩ, IO = 12 A
Top trace: Input voltage (5 V/div.).
Bottom trace: Output voltage (2 V/div.).
Time scale: (20 ms/div.).
Shut-down enabled by disconnecting VI
at:
TP1 = +25°C, VI = 12 V, VO = 3.3 V
CO = 470 µF/10 mΩ, IO = 12 A
Top trace: Input voltage (5 V/div).
Bottom trace: Output voltage (2 V/div.).
Time scale: (2 ms/div.).
Start-up by CTRL signal
Shut-down by CTRL signal
Start-up enabled by connecting V
I
at::
TP1 = +25°C, VI = 12 V, VO = 3.3 V
CO = 470 µF/10 mΩ, IO = 12 A
Top trace: output voltage (2 V/div.).
Bottom trace: CTRL signal (2 V/div.).
Time scale: (20 ms/div.).
Shut-down enabled by disconnecting V
I
at:
TP1 = +25°C, VI = 12 V, VO = 3.3 V
CO = 470 µF/10 mΩ, IO = 12 A
Top trace: output voltage (2 V/div).
Bottom trace: CTRL signal (2 V/div.).
Time scale: (2 ms/div.).
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
20
EMC Specification
Conducted EMI measured according to test set-up below.
The fundamental switching frequency is 320 kHz at VI = 12 V,
max Io.
Conducted EMI Input terminal value (typical for default
configuration)
EMI witho ut filter
RF Current probe
1kHz – 50MHz
C1
To spectrum
analyzer
POL
Resistive
load
Battery
supply
C1 = 10uF / 600VDC
Feed- Thru RF capacitor
800mm
200mm
50mm
Conducted EMI test set-up
Layout Recommendations
The radiated EMI performance of the product will depend on
the PWB
layout and ground layer design. It is also important to
consider the stand-
off of the product. If a ground layer is used,
it should be connected to the output of the product and the
equipment ground or chassis.
A ground layer will increase the stray capacitance in the PWB
and improve the high frequency EMC performance.
Output Ripple and Noise
Output ripple and noise is measured according to figure below.
A 50 mm conductor works as a small inductor
forming together
with the two capacitances a damped filter.
Output rippl e and noise test set-up.
Operating information
Power Manageme nt Overview
This product is equipped with a PMBus interface. The product
incorporates a wide range of readable and configurable power
management features that are simple to implement
with a minimum of external components. Additionally, the
product includes protection features that continuously
safeguard the load from damage due to unexpected system
faults. A fault is also shown as an alert on the SALERT pin.
The following product parameters can continuously be
monitored by a host: Input voltage, output voltage/current,
and internal temperature. If the monitoring is not needed it can
be disabled and the product enters a low power mode reducing
the power consumption. The protection features are not
affected.
The product is delivered with a default configuration suitable
for a wide range operation in terms of input voltage, output
voltage, and load. The configuration is stored in an internal
Non-Volatile Memory (NVM). All power management functions
can be reconfigured using the PMBus interface.
Please contact
your local Ericsson Power Modules representative for design
support of custom configurations or appropriate SW tools for
design and down-load of your own configurations.
Input Voltage
The input voltage range, 4.5 - 14 V, makes the product
easy to use in intermediate bus applications when powered
by a non-regulated bus converter or a regulated bus converter.
See Ordering Information for input voltage range.
Input Under Voltage Lockout, UVLO
The product monitors the input voltage and will turn-on and
turn-off at configured levels. The default turn-on input voltage
level setting is 4.20 V, whereas the corresponding turn-
off input
voltage level is 3.85 V. Hence, the default hysteresis between
turn-on and turn-off input voltage is 0.35 V. Once an input turn-
Vout
+S
−S
GND
Ceramic
Capacitor
0.1 µF
Tantalum
Capacitor
10 µF
Load
50 mm conductor
50 mm conductor
BNC-contact to
oscilloscope
Output
Capacitor
470 µF//10 mΩ
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
21
off condition occurs, the device can respond in a number of
ways as follows:
1. Continue operating without interruption. The unit will
continue to operate as long as the input voltage can be
supported. If the input voltage continues to fall, there will
come a point where the unit will cease to operate.
2. Continue operating for a given delay period, followed by
shutdown if the fault still exists. The device will remain in
shutdown until instructed to restart.
3. Initiate an immediate shutdown until the fault has been
cleared. The user can select a specific number of retry
attempts.
The default response from a turn-
off is an immediate shutdown
of the device. The device will continuously check for the
presence of the fault condition. If the fault condition is no
longer present, the product will be re-enabled. The turn-on and
turn-off levels and response can be reconfigured using the
PMBus interface.
Remote Control
The product is equipped with a
remote control function, i.e., the
CTRL pin. The remote control
can be connected to either the
primary negative input
connection (GND) or an external
voltage (Vext), which is a 3 -
5 V
positive supply voltage in
accordance to the SMBus
Specification version 2.0.
The CTRL function allows the product to be turned on/off by an
external device like a semiconductor or mechanical switch. By
default the product will turn on when the CTRL pin is left open
and turn off when the CTRL pin is applied to GND. The CTRL
pin has an internal pull-up resistor. When the CTRL pin is left
open, the voltage generated on the CTRL pin is max 5.5 V.
If the device is to be synchronized to an external clock source,
the clock frequency must be stable prior to asserting the CTRL
pin.
The product can also be configured using the PMBus interface
to be “Always on”,
or turn on/off can be performed with PMBus
commands.
Input and Output Impedance
The impedance of both the input source and the load will
interact with the impedance of the product. It is important that
the input source has low characteristic impedance. The
performance in some applications can be enhanced by
addition of external capacitance as described under External
Decoupling Capacitors. If the input voltage source contains
significant inductance, the addition a
capacitor with low ESR at
the input of the product will ensure stable operation.
External Capacitors
Input capacitors:
The input ripple RMS current in a buck converter is equal to
Eq. 1.
( )
DDII
loadinputRMS
−= 1
,
where
load
I
is the output load current and
D
is the duty cycle.
The maximum load ripple current becomes
2
load
I
. The
ripple
current is divided into three parts, i.e., currents in the input
source, external input capacitor, and internal input capacitor.
How the current is divided depends on the impedance of the
input source, ESR and capacitance values in the capacitors. A
minimum capacitance of 300 µF with low ESR is
recommended. The ripple current rating
of the capacitors must
follow Eq. 1. For high-performance/transient applications or
wherever the input source performance is degraded, additional
low ESR ceramic type capacitors at the input is recommended.
The additional input low ESR capacitance above the minimum
level insures an optimized performance.
Output capacitors:
When powering loads with significant dynamic current
requirements, the voltage regulation at the point of load can be
improved by addition of decoupling capacitors at the load.
The most effective technique is to locate
low ESR ceramic and
electrolytic capacitors as close to the load as possible, using
several capacitors in parallel to lower the effective ESR. The
ceramic capacitors will handle high-frequency dynamic load
changes while the electrolytic capacitors are used to handle
low frequency dynamic load changes. Ceramic capacitors will
also reduce high frequency noise at the load.
It is equally important to use low resistance and low inductance
PWB layouts and cabling.
External decoupling capacitors are a part of the control loop of
the product and may affect the stability margins.
Stable operation is guaranteed for the following total
capacitance
O
C
in the output decoupling capacitor bank
where
Eq. 2.
[ ] [ ]
0750 ,300, maxmin == CCCO
µF.
The decoupling capacitor bank should consist of capacitors
which have a capacitance value larger than
min
CC ≥
and has
an
ESR
range of
Eq. 3.
[ ] [ ]
30 ,5 , maxmin == ESRESRESR
mΩ
The control loop stability margins are limited by the minimum
time constant
min
τ
of the capacitors. Hence, the time constant
of the capacitors should follow Eq. 4.
Eq. 4.
s 5.1
minminmin
µττ
==≥ ESRC
This relation can be used if your preferred capacitors have
parameters outside the above stated ranges in Eq. 2 and Eq.3.
• If the capacitors capacitance value is
min
CC <
one must
use at least
N
capacitors where
≥C
C
N
min
and
C
C
ESRESR min
min
≥
.
• If the ESR value is
max
ESRESR >
one must use at least
N
capacitors of that type where
CTRL
GND
Vext
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
22
≥
max
ESR
ESR
N
and
N
C
C
min
≥
.
• If the
ESR
value is
min
ESRESR <
the capacitance value
should be
ESR
ESR
CC
min
min
≥
.
For a total capacitance outside the above stated range or
capacitors that do not follow the stated above requirements
above a re-design of the control loop parameters will be
necessary for robust dynamic operation and stability.
See application note AN311 for further information.
Control Loop Compensation
The product is configured with a robust control loop
compensation which allows for a wide range operation of input
and output voltages and capacitive loads as defined in the
section External Decoupling Capacitors. For an application
with a specific input voltage, output voltage, and capacitive
load, the control loop can be optimized for a robust and stable
operation and with an improved load transient response. This
optimization will minimize the amount of required output
decoupling capacitors for a given load transient requirement
yielding an optimized cost and minimized board space. The
control loop parameters can be reconfigured using the PMBus
interface.
See application note AN305 for further information.
Load Transient Response Optimization
The product incorporates a Non-Linear transient Response,
NLR, loop that decreases the response time and the output
voltage deviation during a load transient. The NLR results in a
higher equivalent loop bandwidth than is possible using a
traditional linear control loop. The product is pre-configured
with appropriate NLR settings for robust and stable operation
for a wide range of input voltage and a capacitive load range
as defined in the section External Decoupling Capacitors. For
an application with a spe
cific input voltage, output voltage, and
capacitive load, the NLR configuration can be optimized for a
robust and stable operation and with an improved load
transient response. This will also reduce the amount of output
decoupling capacitors and yield a reduced cost. However, the
NLR slightly reduces the efficiency. In order to obtain maximal
energy efficiency the load transient requirement has to be met
by the standard control loop compensation and the decoupling
capacitors. The NLR settings can be reconfigured using the
PMBus interface.
See application note AN306 for further information.
Remote Sense
The product has remote sense that can be used to
compensate for voltage drops between the output and the
point of load. The sense traces should be located close to the
PWB ground layer to reduce noise susceptibility. Due to
derating of internal output capacitance the voltage drop should
be kept below
2/)5.5(
OUTDROPMAX
VV −=
. A large voltage
drop will impact the electrical performance of the regulator. If
the remote sense is not needed +S should be connected to
VOUT and −S should be connected to GND.
Output Voltage Adjust using Pin-strap Resistor
Using an external Pin-strap
resistor, RSET , the output
voltage can be set in the
range 0.6 V to 3.3 V at 28
different levels shown in the
table below. The resistor
should be applied between
the VSET pin and the PREF
pin.
R
SET
also sets the maximum output voltage, see section
“Output Voltage Range Limitation”. The resistor is sensed only
during product start-up. Changing the resistor value during
normal operation will not change the output voltage. The input
voltage must be at least 1 V larger than the output voltage in
order to deliver the correct output voltage. See Ordering
Information for output voltage range.
The following table shows recommended resistor values for
RSET. Maximum 1% tolerance resistors are required.
VOUT [V]
RSET[kΩ]
VOUT [V]
RSET[kΩ]
0.60
10
1.50
46.4
0.65
11
1.60
51.1
0.70
12.1
1.70
56.2
0.75
13.3
1.80
61.9
0.80
14.7
1.90
68.1
0.85
16.2
2.00
75
0.90
17.8
2.10
82.5
0.95
19.6
2.20
90.9
1.00
21.5
2.30
100
1.05
23.7
2.50
110
1.10
26.1
3.00
121
1.15
28.7
3.30
133
1.20
31.6
4.00
147
1.25
34.8
5.00
162
1.30
38.3
5.50
178
1.40
42.2
The output voltage and the maximum output voltage can be pin
strapped to three fixed values by connecting the VSET pin
according to the table below.
VOUT [V] VSET
0.60
Shorted to PREF
1.2
Open “high impedance”
2.5
Logic High, GND as reference
RSET
VSET
PREF
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
23
Output Voltage Adjust using PMBus
The output voltage set by pin-strap can be overridden by
configuration file or by using a PMBus command. See
Electrical Specification for adjustment range.
When setting the output voltage by configuration file or by a
PMBus command, the specified output voltage accuracy is
valid only when the set output voltage level falls within the
same bin range as the voltage level defined by the pin-strap
resistor RSET . The applicable bin ranges are defined in the
table below. Valid accuracy for voltage levels outside the
applicable bin range is two times the specified.
Example:
Nominal Vout is set to 1.10V by Rset=26.1kohm. 1.10V falls
within the bin range 0.988-1.383V, thus specified accuracy is
valid when adjusting Vout within 0.988-1.383V.
VOUT bin ranges [V]
0 – 0.988
0.988 – 1.383
1.383 – 1.975
1.975 – 2.398
2.398 – 2.963
2.963 – 3.753
3.753 – 4.938
4.938 –
Output Voltage Range Limitation
The output voltage range that is possible to set by
configuration or by the PMBus interface is limited by the pin-
strap resistor RSET. The maximum output voltage is set to
110% of the nominal output value defined by RSET,
RSETOUTMAXOUT
VV
__
1.1 ×=
. This protects the load from an over
voltage due to an accidental wrong PMBus command.
Over Voltage Protection (OVP)
The product includes over voltage limiting circuitry for
protection of the load. The default OVP limit is 15% above the
nominal output voltage. If the output voltage exceeds the OVP
limit, the product can respond in different ways:
1. Initiate an immediate shutdown until the fault has been
cleared. The user can select a specific number of retry
attempts.
2. Turn off the high-side MOSFET and turn on the low-side
MOSFET. The low-side MOSFET remains ON until the
device attempts a restart, i.e. the output voltage is pulled to
ground level (crowbar function).
The default response from an overvoltage fault is to
immediately shut down as in 2. The device will continuously
check for the presence of the fault condition, and when the
fault condition no longer exists the device will be re-enabled.
For continuous OVP when operating from an external clock for
synchronization, the only allowed response is an immediate
shutdown. The OVP limit and fault response can be
reconfigured using the PMBus interface.
Under Voltage Protection (UVP)
The product includes output under voltage limiting circuitry for
protection of the load. The default UVP limit is 15% below the
nominal output voltage. The UVP limit can be reconfigured
using the PMBus interface.
Power Good
The product provides a Power Good (PG) flag in the Status
Word register that indicates the output voltage is within a
specified tolerance of its target level and no fault condition
exists. If specified in section Connections, the product also
provides a PG signal output. The PG pin is active high and by
default open-drain but may also be configured as push-pull via
the PMBus interface.
By default, the PG signal will be asserted when the output
reaches above 90% of the nominal voltage, and de-asserted
when the output falls below 85% of the nominal voltage
. These
limits may be changed via the PMBus interface. A PG delay
period is defined as the time from when all conditions within
the product for asserting PG are met to when the PG signal is
actually asserted. The default PG delay is set to 10 ms. This
value can be reconfigured using the PMBus interface
Switching Frequency
The fundamental switching frequency is 320 kHz, which yields
optimal power efficiency. The switching frequency can be set
to any value between 200 kHz and 640 kHz using the PMBus
interface. The switching frequency will change the
efficiency/power dissipation, load transient response and
output ripple. For optimal control loop performance the control
loop must be re-designed when changing the switching
frequency.
Synchronization
Synchronization is a feature that allows multiple products to be
synchronized to a common frequency. Synchronized products
powered from the same bus eliminate beat frequencies
reflected back to the input supply, and also reduces EMI
filtering requirements. Eliminating the slow beat frequencies
(usually <10 kHz) allows the EMI filter to be designed to
attenuate only the synchronization frequency. Synchronization
can also be utilized for phase spreading, described in section
Phase Spreading.
The products
can be synchronized with an external oscillator or
one product can be configured with the SYNC pin as a SYNC
Output working as a master driving the synchronization. All
others on the same synchronization bus should be configured
with SYNC Input or SYNC Auto Detect (Default configuration)
for correct operation. When the SYNC pin is configured in auto
detect mode the product will automatically check for a clock
signal on the SYNC pin.
See application note AN309 for further information.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
24
Phase Spreading
When multiple products share a common DC input supply,
spreading of the switching clock phase between the products
can be utilized. This dramatically reduces input capacitance
requirements and efficiency losses, since the peak current
drawn from the input supply is effectively spread out over the
whole switch period. This requires that the products are
synchronized. Up to 16 different phases can be used.
The phase spreading of the product can be configured using
the PMBus interface.
See application note AN309 for further information.
Adaptive Diode Emulation
Most power converters use synchronous rectification to
optimize efficiency over a wide range of input and output
conditions. However, at light loads the synchronous MOSFET
will typically sink current and introduce additional energy
losses associated with higher peak inductor currents, resulting
in reduced efficiency. Adaptive diode emulation mode turns off
the low-side FET gate drive at low load currents to prevent the
inductor current from going negative, reducing the energy
losses and increasing overall efficiency. Diode emulation is not
available for current sharing groups. Note: the overall
bandwidth of the product may be reduced when in diode
emulation mode. It is recommended that diode emulation is
disabled prior to applying significant load steps. The diode
emulation mode can be configured using the PMBus interface.
Adaptive Frequency and Pulse Skip Control
Since switching losses contribute to the efficiency of the power
converter, reducing the switching frequency will reduce the
switching losses and increase efficiency. The product includes
an Adaptive Frequency Control mode, which effectively
reduces the observed switching frequency as the load
decreases. Adaptive frequency mode is only available while
the device is operating within Adaptive Diode Emulation Mode.
As the load current is decreased, diode emulation mode
decreases the Synch-FET on-
time to prevent negative inductor
current from flowing. As the load is decreased further, the
Switch-FET pulse width will begin to decrease while
maintaining the programmed frequency, fPROG (set by the
FREQ_SWITCH command). Once the Switch-FET pulse width
(D) reaches 50% of the nominal duty cycle, DNOM (determined
by VI and VO), the switching frequency will start to decrease
according to the following equation:
Eq. 5.
( )
MIN
NOM
MINPROG
sw
f
D
ff
Df +
−
=2
.
Disabling a minimum Synch-FET makes the product also
pulse
skip which reduces the power loss further.
It should be noted that adaptive frequency mode is not
available for current sharing groups and is not allowed when
the device is placed in auto-detect mode and a clock source is
present on the SYNC pin, or if the device is outputting a clock
signal on its SYNC pin. The adaptive frequency and pulse skip
modes can be configured using the PMBus interface.
Efficiency Optimized Dead Time Control
The product utilizes a closed loop algorithm to optimize the
dead-
time applied between the gate drive signals for the switch
and synch FETs. The algorithm constantly adjusts the
deadtime non-overlap to minimize the duty cycle, thus
maximizing efficiency. This algorithm will null out deadtime
differences due to component variation, temperature and
loading effects. The algorithm can be configured via the
PMBus interface.
Over Current Protection (OCP)
The product includes current limiting circuitry for protection at
continuous overload. The following OCP response options are
available:
1.
Initiate a shutdown and attempt to restart an infinite number
of times with a preset delay period between attempts.
2. Initiate a shutdown and attempt to restart a preset number
of times with a preset delay period
3. Continue operating for a given delay period, followed by
shutdown if the fault still exists.
4. Continue operating through the fault (this could result in
permanent damage to the product).
5. Initiate an immediate shutdown.
The default response from an over current fault is an
immediate shutdown of the device. The device will
continuously check for the presence of the fault condition, and
if the fault condition no longer exists the device will be re-
enabled.The load distribution should be designed for the
maximum output short circuit current specified. The OCP limit
and response of the product can be reconfigured using the
PMBus interface.
Start-up Procedure
The product follows a specific internal start-up procedure after
power is applied to the VIN pin:
1. Status of the address and output voltage pin-strap pins are
checked and values associated with the pin settings are
loaded.
2. Values stored in the Ericsson default non-volatile memory
are loaded. This overwrites any previously loaded values.
3. Values stored in the user non-volatile memory are loaded.
This overwrites any previously loaded values.
Once this process is completed and the start-up time has
passed (see Electrical Specification), the product is ready to
be
enabled using the CTRL pin. The product is also ready to
accept commands via the PMBus interface, which will
overwrite any values loaded during the start-up procedure.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
25
Soft-start Powe r Up
The soft-start control introduces a time-delay before allowing
the output voltage to rise. Once the boot-up time has passed
and the output has been enabled, the device requires
approximately 2 ms
before its output voltage may be allowed to
start its ramp-up process. If a soft-
start delay period less than 2
ms has been configured the device will default to a 2 ms delay
period. If a delay period greater than 2 ms is configured, the
device will wait for the configured delay period prior to starting
to ramp its output. After the delay period has expired, the
output will begin to ramp towards its target voltage according to
the configured soft-start ramp time.
The default settings for the soft-start delay period and the soft-
start ramp time is 10 ms. Hence, power-up is completed within
20 ms in default configuration using remote control. Precise
timing reduces the delay time variations and is by default
activated. The soft-start power up of the product can be
reconfigured using the PMBus interface.
VIN
CTRL
VOUT
Boot-up time
Delay
time
Ramp
time
Illustration of Power Up Procedure.
Output Voltage Sequencing
A group of products may be configured to power up in a
predetermined sequence. This feature is especially useful
when powering advanced processors, FPGAs, and ASICs that
require one supply to reach its operating voltage prior to
another. Multi-product sequencing can be achieved by
configuring the start delay and rise time of each device
through
the PMBus interface and by using the CTRL start signal.
See application note AN310 for further information.
Illustration of Output Voltage Sequencing.
Voltage Tracking
The product integrates a lossless tracking scheme that allows
its output to track a voltage that is applied to the VTRK pin with
no external components required. During ramp-up, the output
voltage follows the VTRK voltage until the preset output
voltage level is met. The product offers two modes of tracking
as follows:
1. Coincident. This mode configures the product to ramp its
output voltage at the same rate as the voltage applied to
the VTRK pin.
Illustrat i on of Coinci dent Voltage Tracki ng.
2. Ratiometric. This mode configures the product to ramp its
output voltage at a rate that is a percentage of the voltage
applied to the VTRK pin. The default setting is 50%, but a
different tracking ratio may be set by an external resistive
voltage divider or through the PMBus interface.
Illustrat i on of Ratiometric Voltage Tracking
The master device in a tracking group is defined as the device
that has the highest target output voltage within the group. This
master device will control the ramp rate of all tracking devices
and is not configured for tracking mode. All of the CTRL
pins in
the tracking group must be connected and driven by a single
logic source. It should be noted that current sharing groups
that are also configured to track another voltage do not offer
pre-bias protection; a minimum load should therefore be
enforced to avoid the output voltage from being held up by an
outside force.
See application note AN310 for further information.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
26
Voltage Margining Up/Down
The product can adjust its output higher or lower than its
nominal voltage setting in order to determine whether the load
device is capable of operating over its specified supply voltage
range. This provides a convenient method for dynamically
testing the operation of the load circuit over its supply margin
or range. It can also be used to verify the function of supply
voltage supervisors. Margin limits of the nominal output voltage
±5% are default, but the margin limits can be reconfigured
using the PMBus interface.
Pre-Bias Startup Capability
Pre-bias startup often occurs in complex digital systems when
current from another power source is fed back through a dual-
supply logic component, such as FPGAs or ASICs. The
product incorporates synchronous rectifiers, but will not sink
current during startup, or turn off, or whenever a fault shuts
down the product in a pre-bias condition. Pre-bias protection is
not offered for current sharing groups that also have voltage
tracking enabled.
Group Communication Bus
The Group Communication Bus, GCB, is used to communicate
between products. This dedicated bus provides the
communication channel between devices for features such as
sequencing, fault spreading and current sharing. The GCB bus
solves the PMBus data rate limitation. The GCB pin of all
products in an application should be connected together.
A pull-up resistor is required on the common GCB in order to
guarantee the rise time as follows:
Eq. 6
sCR
GCBGCB
µτ
1≤=
,
where
GCB
R
is the pull up resistor value and
GCB
C
is the bus
loading. The pull-up resistor should be tied to an external
supply voltage in range from 3.3 to 5 V, which should be
present prior to or during power-up.
If exploring untested compensation or deadtime configurations
,
it is recommended that 27 Ω series resistors are placed
between the GCB pin of each product and the common GCB
connection. This will avoid propagation of faults between
products potentially caused by hazardous configuration
settings. When the configurations of the products are settled
the series resistors can be removed.
The GCB is an internal bus, such that it is only connected
across the modules and not the PMBus system host. GCB
addresses are assigned on a rail level, i.e. modules within the
same current sharing group share the same GCB address.
Addressing rails across the GCB is done with a 5 bit GCB ID,
yielding a theoretical total of 32 rails that can be shared with a
single GCB bus. See application note AN307 for further
information.
Fault spreading
The product can be configured to broadcast a fault event over
the GCB bus to the other devices in the group. When a non-
destructive fault occurs and the device is configured to shut
down on a fault, the device will shut down and broadcast the
fault event over the GCB bus. The other devices on the GCB
bus will shut down together if configured to do so, and will
attempt to re-start in their prescribed order if configured to do
so.
Over Temperature Protection (OTP)
The products are protected from thermal overload by an
internal over temperature shutdown circuit. When TP1 as
defined in thermal consideration section exceeds 120°C the
product will shut down. The product will make continuous
attempts to start up and resume normal operation
automatically when the temperature has dropped >15°C below
the over temperature threshold. The specified OTP level and
hysteresis are valid for worst case operation regarding cooling
conditions, input voltage and output voltage. This means the
OTP level and hysteresis in many cases will be lower. The
OTP level, hysteresis, and fault response
of the product can be
reconfigured using the PMBus interface. The fault response
can be configured as follows:
1.
Initiate a shutdown and attempt to restart an infinite number
of times with a preset delay period between attempts
(default configuration).
2. Initiate a shutdown and attempt to restart a preset number
of times with a preset delay period between attempts.
3. Continue operating for a given delay period, followed by
shutdown if the fault still exists.
4. Continue operating through the fault (this could result in
permanent damage to the power supply).
5. Initiate an immediate shutdown.
Optimization examples
This product is designed with a digital control circuit. The
control circuit uses a configuration file which determines the
functionality and performance of the product. It is possible to
change the configuration file to optimize certain performance
characteristics. In the table below is a schematic view on how
to change different configuration parameters in order to
achieve an optimization towards a wanted performance.
↑
Increase
→
No change
↓
Decrease
Config.
parameters Switching
frequency
Control
loop
bandwidth
NLR
threshold
Diode
emulation
(DCM)
Min.
pulse
Optimized
performence
Maximize
efficiency
↓ → ↑ Enable Disable
Minimize
ripple ampl. ↑ → ↑
Enable
or
disable
Enable
or
disable
Improve
load
transient
response
↑ ↑ ↓ Disable Disable
Minimize
idle power
loss
↓ ↑ → Enable Enable
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
27
Pli
Input idling
power
(no load)
Default
configuration:
Continues
Conduction
Mode, CCM
VO = 0.6 V 0.36
W
VO = 1.0 V 0.35
VO = 3.3 V 0.54
VO = 5.0 V 0.97
DCM,
Discontinues
Conduction
Mode
(diode
emulation)
VO = 0.6 V 0.30
W
VO = 1.0 V 0.37
VO = 3.3 V 0.41
VO = 5.0 V 0.45
P
li
Input idling
power
(no load)
DCM with
Adaptive
Frequency
and Minimum
Pulse
Enabled
VO = 0.6 V 0.29
W
VO = 1.0 V 0.35
VO = 3.3 V 0.37
VO = 5.0 V 0.42
DCM with
Adaptive
Frequency
and Minimum
Pulse
Disabled
VO = 0.6 V 0.25
W
VO = 1.0 V 0.20
VO = 3.3 V 0.20
VO = 5.0 V 0.20
PCTRL
Input
standby
power
Turned off
with
CTRL-pin
Default
configuration:
Monitoring
enabled,
Precise
timing
enabled
180 mW
Monitoring
enabled,
Precise
timing
disabled
120 mW
Low power
mode:
Monitoring
disabled,
Precise
timing
disabled
85 mW
Vtr1
Load
transient
peak
voltage
deviation
Load step
25-75-25%
of max IO
Default
configuration
di/dt = 2 A/μs
CO=470 μF
VO = 0.6 V 55
mV
VO = 1.0 V 65
VO = 3.3 V 110
VO = 5.0 V 190
Optimized
PID and NLR
configuration
di/dt = 2 A/μs
CO=470 μF
VO = 0.6 V 40
mV
VO = 1.0 V 35
VO = 3.3 V 55
VO = 5.0 V 105
ttr1
Load
transient
recovery
time
Load step
25-75-25%
of max IO
Default
configuration
di/dt = 2 A/μs
CO=470 μF
VO = 0.6 V 230
us
VO = 1.0 V 210
VO = 3.3 V 200
VO = 5.0 V 200
Optimized
PID and NLR
configuration
di/dt = 2 A/μs
CO=470 μF
VO = 0.6 V 45
VO = 1.0 V 40
VO = 3.3 V 40
VO = 5.0 V 35
Efficiency vs. Output Current and Switching frequency
Efficiency vs. load current and switching frequency at
TP1 = +25°C. VI=12 V, V O=3.3V, C O=470 µF/10 mΩ
Default configuration except changed frequency
Power Dissipation vs. Output Current and Switching frequency
Dissipated power vs. load current and switching frequency at
TP1 = +25°C. VI=12 V, V O=3.3V, C O=470 µF/10 mΩ
Default configuration except changed frequency
Output Ripple vs. Switching frequency
Output voltage ripple Vpk-pk at: T P1 = +25°C, VI = 12 V, CO=470 µF/10 mΩ,
I
O
= 12 A resistive load. Default configuration except changed frequency.
70
75
80
85
90
95
0246810 12
[%]
[A]
200
kHz
320
kHz
480
kHz
640
kHz
0
1
2
3
4
5
0246810 12
[W]
[A]
200
kHz
320
kHz
480
kHz
640
kHz
0
20
40
60
80
100
120
140
160
200 250 300 350 400 450 500 550 600
[mVpk-pk]
[kHz]
0.6 V
1.0 V
3.3 V
5.0 V
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
28
Load transient vs. Switching frequency
Load transient peak voltage deviation vs. frequency.
Step-change (3-9-3 A).
TP1 = +25°C. VI=12 V, V O=3.3 V, C O=470 µF/10 mΩ
Load Transient vs. Decoupling Capacitance, VO=1.0 V
Load transient peak voltage deviation vs. decoupling capacitance.
Step-change (3-9-3 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25°C. VI=12 V, V O=1.0V, f sw =320 kHz, di/dt=2 A/µs
Load Transient vs. Decoupling Capacitance, VO=3.3 V
Load transient peak voltage deviation vs. decoupling capacitance.
Step-change (3-9-3 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25°C. VI=12 V, V O=3.3 V, f sw =320 kHz, di/dt=2 A/µs
Output Load Transient Response, Default PID/NLR
Output voltage response to load current step-
change (3-9-3 A) at:
TP1 = +25°C, V I = 12 V, VO =3.3 V
di/dt=2 A/µs, fsw =320 kHz, CO=470 µF/10 mΩ
Default PID Control Loop and NLR
Top trace: output voltage (200 mV/div.).
Bottom trace: load current (5 A/div.).
Time scale: (0.1 ms/div.).
Output Load Transient Response, Optimized PID, no NLR
Output voltage response to load current step-
change (3-9-3 A) at:
TP1 = +25°C, V I = 12 V, VO =3.3 V
di/dt=2 A/µs, fsw =320 kHz, CO=470 µF/10 mΩ
Optimized PID Control Loop and no NLR
Top trace: output voltage (200 mV/div.).
Bottom trace: load current (5 A/div.).
Time scale: (0.1 ms/div.).
Output Load Transient Response, Optimized NLR
Output voltage response to load current step-
change (3-9-3 A) at:
TP1 = +25°C, V I = 12 V, VO =3.3 V
di/dt=2 A/µs, fsw =320 kHz, CO=470 µF/10 mΩ
Default PID Control Loop and optimized NLR
Top trace: output voltage (200 mV/div.).
Bottom trace: load current (5 A/div.).
Time scale: (0.1 ms/div.).
0
40
80
120
160
200
200 300 400 500 600
[mV]
[kHz]
Default
PID/NLR
Opt. PID, No
NLR
Default PID,
Opt. NLR
Opt. PID/NLR
0
50
100
150
200
012345
[mV]
[mF]
Default
PID/NLR
Opt. PID, No
NLR
Default PID,
Opt. NLR
Opt. PID/NLR
0
50
100
150
200
012345
[mV]
[mF]
Default
PID/NLR
Opt. PID, No
NLR
Default PID,
Opt. NLR
Opt. PID/NLR
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
29
Thermal Consideration
General
The product is designed to operate in different thermal
environments and sufficient cooling must be provided to
ensure reliable operation.
Cooling is achieved mainly by conduction, from the pins to the
host board, and convection, which is dependant on the airflow
across the product. Increased airflow enhances the cooling of
the product.
The Output Current Derating graph found in the Output section
for each model provides the available output current vs.
ambient air temperature and air velocity at specified VI.
The product is tested on a 254 x 254 mm, 35 µm (1 oz), test
board mounted vertically in a wind tunnel with a cross-section
of 608 x 203 mm. The test board has 8 layers.
Proper cooling of the product can be verified by measuring the
temperature at positions P1 and P2. The temperature at these
positions should not exceed the max values provided in the
table below.
Note that the max value is the absolute maximum rating
(non destruction) and that the electrical Output data is
guaranteed up to TP1 +95°C.
See Design Note 019 for further information.
Definition of product operating temperature
The product operating temperatures are used to monitor the
temperature of the product, and proper thermal conditions can
be verified by measuring the temperature at positions P1 and
P2. The temperature at these positions (TP1, TP2 ) should not
exceed the maximum temperatures in the table below. The
number of measurement points may vary with different thermal
design and topology. Temperatures above maximum TP1 ,
measured at the reference point P1 are not allowed and may
cause permanent damage.
Position Description Max Temp.
P1
Reference point, L1,
inductor
120°C
P2
N1, control circuit
120°C
Temperature posit i ons and air flow direction.
SIP version
Temperature posit i ons and air flow direction.
Definition of reference temperature TP1
The reference temperature is used to monitor the temperature
limits of the product. Temperature above maximum TP1 ,
measured at the reference point P1 is not allowed and may
cause degradation or permanent damage to the product. TP1
is
also used to define the temperature range for normal operating
conditions. TP1 is defined by the
design and used to guarantee
safety margins, proper operation and high reliability ot the
product.
Top view
Bottom view
P1 P2
AIR
FLOW
AIR FLOW
P2
P1
Top view
Bottom view
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
30
Connections
Pin layout, top view (component placement for illust rat i on only ).
Pin Designation Function
1A
VIN
Input Voltage
2A
GND
Power Ground
3A
VOUT
Output Voltage
4A
VTRK or PG *
Voltage Tracking input or
Power Good
4B
PREF
Pin-strap reference
5A
+S
Positive sense
5B
−S
Negative sense
6A
SA0
PMBus address pinstrap
6B
GCB
Group Communication Bus
7A
SCL
PMBus Clock
7B
SDA
PMBus Data
8A
VSET
Output voltage pinstrap
8B
SYNC
Synchronization I/O
9A
SALERT
PMBus Alert
9B
CTRL
Remote Control
*
BMR 462 0002, BMR 462 1002: Pin 4A = VTRK pin.
BMR 462 0006, BMR 462 1006: Pin 4A = PG pin.
For these products the PG pin is internally tied to the VTRK input of
the products’ controll er. Ty pical ly the VTRK input bias current wil l be
equivalent to a 50 kohm pull-down resistor. This should be c ons
idered
when choosing pull-up resistor for the PG signal.
Connections (SIP version)
Pin layout, bottom view (component pl acement f or illust rat i on only ).
Pin Designation Function
1A
VIN
Input Voltage
2A
GND
Power Ground
3A
VOUT
Output voltage
4A
+S
Positive sense
4B
-S
Negative sense
5A
VSET
Output voltage pin-strap
5B
VTRK
Voltage tracking input
6A
SALERT
PMBus Alert
6B
SDA
PMBus data
7A
SCL
PMBus Clock
7B
SYNC
Synchronization I/O
8A
SA0
PMBus address pin-strap
8B
CTRL
Remote Control
9A
GCB
Group Communication Bus
9B PREF Pin-strap Reference
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
31
Unused input pins
Unused SDA, SCL and GCB pins should still have pull-up
resistors as specified.
Unused VTRK or SYNC pins should be left unconnected or
connected to the PREF pin.
Unused CTRL pin can be left open due to internal pull-up.
VSET and SA0/SA1 pins must have pinstrap resistors as
specified.
PWB layout considerations
The pinstrap resistors, RSET , and RSA0 /RSA1 should be placed
as close to the product as possible to minimize loops that may
pick up noise.
Avoid current carrying planes under the pinstrap resistors and
the PMBus signals.
The capacitor CI (or capacitors implementing it) should be
placed as close to the input pins as possible.
Capacitor CO
(or capacitors implementing it) should be placed
close to the load.
Care should be taken in the routing of the connections from
the sensed output voltage to the S+ and S– terminals. These
sensing connections should be routed as a differential pair,
preferably between ground planes which are not carrying high
currents. The routing should avoid areas of high electric or
magnetic fields.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
32
Typical Application Circuit
Standalone operation with PMBus communication. Top view of product footprint.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
33
Typical Application Circuit (SIP version)
Standalone operation with PMBus communication. Top view of product footpri nt.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
34
Ericsson Internal
PRODUCT SPECIFICATION
1 (6)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 31/1301-BMR 462
Approved Checked Date Rev Reference
EAB/FJB/GM (Ksenia Harrisen) (MICRF) 2012-09-26 B
PMBus interface
This product provides a PMBus digital interface that enables
the user to configure many aspects of the device operation as
well as to monitor the input and output voltages, output current
and device temperature. The product can be used with any
standard two-wire I2C or SMBus host device. In addition, the
product is compatible with PMBus version 1.1 and includes an
SALERT line to help mitigate bandwidth limitations related to
continuous fault monitoring. The product supports 100 kHz
bus clock frequency only. The PMBus signals, SCL, SDA and
SALERT require passive pull-up resistors as stated in the
SMBus Specification. Pull-up resistors are required to
guarantee the rise time as follows:
Eq. 7
sCR
pP
µτ
1≤=
where Rp is the pull-up resistor value and Cp is the bus
loading, the maximum allowed bus load is 400 pF. The pull-up
resistor should be tied to an external supply voltage in range
from 2.7 to 5.5 V, which should be present prior to or during
power-up. If the proper power supply is not available, voltage
dividers may be applied. Note that in this case, the resistance
in the equation above corresponds to parallel connection of
the resistors forming the voltage divider.
See application note AN304 for details on interfacing the
product with a microcontroller.
Monitoring via PMBus
It is possible to monitor a wide variety of parameters through
the PMBus interface. Fault conditions can be monitored using
the SALERT pin, which will be asserted when any number of
pre-configured fault or warning conditions occur. It is also
possible to continuously monitor one or more of the power
conversion parameters including but not limited to the
following:
• Input voltage
• Output voltage
• Output current
• Internal junction temperature
• Switching frequency
• Duty cycle
In the default configuration monitoring is enabled also when
the output voltage is disabled. This can be changed in order to
reduce standby power consumption.
Snap shot parameter capture
This product offers a special feature that enables the user to
capture parametric data during normal operation or following a
fault. The following parameters are stored:
• Input voltage
• Output voltage
• Output current
• Internal junction temperature
• Switching frequency
• Duty cycle
• Status registers
T
he Snapshot feature enables the user to read the parameters
via the PMBus interface during normal operation, although it
should be noted that reading the 22 bytes will occupy the bus
for some time. The Snapshot enables the user to store the
snapshot parameters to Flash memory in response to a
pending fault as well as to read the stored data from Flash
memory after a fault has occurred. Automatic store to Flash
memory following a fault is triggered when any fault threshold
level is exceeded, provided that the specific fault response is
to shut down. Writing to Flash memory is not allowed if the
device is configured to restart following the specific fault
condition. It should also be noted that the device supply
voltage must be maintained during the time the device is
writing data to Flash memory; a process that requires between
700-1400 μs depending on whether the data is set up for a
block write. Undesirable results may be observed if the input
voltage of the product drops below 3.0 V during this process.
Software tools for design and production
Ericsson provides software tools for configuration and
monitoring of this product via the PMBus interface.
For more information please contact your local Ericsson sales
representative.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
35
Ericsson Internal
PRODUCT SPECIFICATION
2 (6)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 31/1301-BMR 462
Approved Checked Date Rev Reference
EAB/FJB/GM (Ksenia Harrisen) (MICRF) 2012-09-26 B
PMBus addressing
The PMBus address should be configured with resistors
connected between the SA0/SA1 pins and the PREF pin, as
shown in the figure below. Recommended resistor values for
hard-wiring PMBus addresses are shown in the table. 1%
tolerance resistors are required.
Schematic of connection of address resistor.
Index RSA [kΩ] Index RSA [kΩ]
0
10
13
34.8
1
11
14
38.3
2
12.1
15
42.2
3
13.3
16
46.4
4
14.7
17
51.1
5 16.2 18 56.2
6
17.8
19
61.9
7
19.6
20
68.1
8
21.5
21
75
9
23.7
22
82.5
10
26.1
23
90.9
11
28.7
24
100
12
31.6
The PMBus address follows the equation below:
Eq. 8 PMBus Address (decimal) = 25 x (SA1 index) +
(SA0 index)
The user can theoretically configure up to 625 unique PMBus
addresses, however the PMBus address range is inherently
limited to 128. Therefore, the user should use index values 0 -
4 on the SA1 pin and the full range of index values on the SA0
pin, which will provide 125 device address combinations.
Products with no SA1 p
in have an internally defined SA1 index
as follows.
Product SA1 index
BMR 462 4
Optional PMBus Addressi ng
Alternatively the PMBus address can be defined by
connecting the SA0/SA1 pins according to the table below.
SA1 = open for products with no SA1 pin.
SA0
low open high
SA1
low 20h 21h 22h
open 23h 24h 25h
high 26h 27h Reserved
Low = Shorted to PREF
Open = High impedance
High = Logic high, GND as reference,
Logic High definitions see Electrical Specification
Reserved Addresses
Address 4Bh is allocated for production needs and can not be
used.
Addresses listed in the table below are reserved or assigned
according to the SMBus specification and may not be usable.
Refer to the SMBus specification for further information.
Address
(decimal) Comment
0 General Call Address / START byte
1 CBUS address
2 Address reserved for different bus format
3-7 Reserved for future use
8 SMBus Host
9-11 Assigned for Smart Battery
12 SMBus Alert Response Address
40 Reserved for ACCESS.bus host
44-45 Reserved by previous versions of the SMBus
specification
55 Reserved for ACCESS.bus default address
64-68
Reserved by previous versions of the SMBus
specification
72-75 Unrestricted addresses
97 SMBus Device Default Address
120-123 10-bit slave addressing
124-127 Reserved for future use
SA0
SA1
PREF
RSA1
RSA0
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
36
Ericsson Internal
PRODUCT SPECIFICATION
3 (6)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 31/1301-BMR 462
Approved Checked Date Rev Reference
EAB/FJB/GM (Ksenia Harrisen) (MICRF) 2012-09-26 B
I2C/SMBus – Timing
Setup and hold times timing diagram
The setup time, t
set
, is the time data, SDA, must be stable
before the rising edge of the clock signal, SCL. The hold time
thold, is the time dat
a, SDA, must be stable after the rising edge
of the clock signal, SCL. If these times are violated incorrect
data may be captured or meta-stability may occur and the bus
communication may fail. When configuring the product, all
standard SMBus protocols must be followed, including clock
stretching. Refer to the SMBus specification, for SMBus
electrical and timing requirements.
This product does not support the BUSY flag in the status
commands to indicate product being too busy for SMBus
response. Instead a bus-free time delay according to this
specification must occur between every SMBus transmission
(between every stop & start condition). In case of storing the
RAM content into the internal non-volatile memory an
additional delay of 20 ms has to be inserted.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
37
Ericsson Internal
PRODUCT SPECIFICATION
4 (6)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 31/1301-BMR 462
Approved Checked Date Rev Reference
EAB/FJB/GM (Ksenia Harrisen) (MICRF) 2012-09-26 B
PMBus Commands
The products are PMBus compliant. The following table lists
the implemented PMBus read commands. For more detailed
information see PMBus Power System Management Prot
ocol
Specification; Part I – General Requirements, Transport and
Electrical Interface and PMBus Power System Management
Protocol; Part II – Command Language.
Designation Cmd Impl
Standard PMBus Commands
Control Commands
PAGE
00h
No
OPERATION
01h
Yes
ON_OFF_CONFIG
02h
Yes
WRITE_PROTECT
10h
No
Output Commands
VOUT_MODE (Read Only)
20h
Yes
VOUT_COMMAND
21h
Yes
VOUT_TRIM
22h
Yes
VOUT_CAL_OFFSET
23h
Yes
VOUT_MAX
24h
Yes
VOUT_MARGIN_HIGH
25h
Yes
VOUT_MARGIN_LOW
26h
Yes
VOUT_TRANSITION_RATE
27h
Yes
VOUT_DROOP
28h
Yes
MAX_DUTY
32h
Yes
FREQUENCY_SWITCH
33h
Yes
VIN_ON
35h
No
VIN_OFF
36h
No
IOUT_CAL_GAIN
38h
Yes
IOUT_CAL_OFFSET
39h
Yes
VOUT_SCALE_LOOP
29h
No
VOUT_SCALE_MONITOR
2Ah
No
COEFFICIENTS
30h
No
Fault Limit Commands
POWER_GOOD_ON
5Eh
Yes
POWER_GOOD_OFF
5Fh
No
VOUT_OV_FAULT_LIMIT
40h
Yes
VOUT_OV_WARN_LIMIT
42h
No
VOUT_UV_WARN_LIMIT
43h
No
VOUT_UV_FAULT_LIMIT
44h
Yes
IOUT_OC_FAULT_LIMIT
46h
Yes
IOUT_OC_WARN_LIMIT
4Ah
No
IOUT_UC_FAULT_LIMIT
4Bh
Yes
Designation Cmd Impl
OT_FAULT_LIMIT
4Fh
Yes
OT_WARN_LIMIT
51h
Yes
UT_WARN_LIMIT
52h
Yes
UT_FAULT_LIMIT
53h
Yes
VIN_OV_FAULT_LIMIT
55h
Yes
VIN_OV_WARN_LIMIT
57h
Yes
VIN_UV_WARN_LIMIT
58h
Yes
VIN_UV_FAULT_LIMIT
59h
Yes
Fault Response Commands
VOUT_OV_FAULT_RESPONSE
41h
Yes
VOUT_UV_FAULT_RESPONSE
45h
Yes
OT_FAULT_RESPONSE
50h
Yes
UT_FAULT_RESPONSE
54h
Yes
VIN_OV_FAULT_RESPONSE
56h
Yes
VIN_UV_FAULT_RESPONSE
5Ah
Yes
IOUT_OC_FAULT_RESPONSE
47h
No
IOUT_UC_FAULT_RESPONSE
4Ch
No
Time setting Commands
TON_DELAY
60h
Yes
TON_RISE
61h
Yes
TOFF_DELAY
64h
Yes
TOFF_FALL
65h
Yes
TON_MAX_FAULT_LIMIT
62h
No
Status Commands (Read Only)
CLEAR_FAULTS
03h
Yes
STATUS_BYTE
78h
Yes
STATUS_WORD
79h
Yes
STATUS_VOUT
7Ah
Yes
STATUS_IOUT
7Bh
Yes
STATUS_INPUT
7Ch
Yes
STATUS_TEMPERATURE
7Dh
Yes
STATUS_CML
7Eh
Yes
STATUS_MFR_SPECIFIC 80h Yes
Monitor Commands (Read Only
READ_VIN
88h
Yes
READ_VOUT
8Bh
Yes
READ_IOUT
8Ch
Yes
READ_TEMPERATURE_1
8Dh
Yes
READ_TEMPERATURE_2
8Eh
No
READ_FAN_SPEED_1
90h
No
READ_DUTY_CYCLE
94h
Yes
READ_FREQUENCY
95h
Yes
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
38
Ericsson Internal
PRODUCT SPECIFICATION
5 (6)
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR 31/1301-BMR 462
Approved Checked Date Rev Reference
EAB/FJB/GM (Ksenia Harrisen) (MICRF) 2012-09-26 B
Designation Cmd Impl
Group Commands
INTERLEAVE
37h
Yes
PHASE_CONTROL
F0h
Yes
Identification Commands
PMBUS_REVISION 98h Yes
MFR_ID
99h
Yes
MFR_MODEL
9Ah
Yes
MFR_REVISION
9Bh
Yes
MFR_LOCATION
9Ch
Yes
MFR_DATE
9Dh
Yes
MFR_SERIAL
9Eh
Yes
Supervisory Commands
STORE_DEFAULT_ALL
11h
Yes
RESTORE_DEFAULT_ALL
12h
Yes
STORE_USER_ALL
15h
Yes
RESTORE_USER_ALL
16h
Yes
Product Specific Commands
Time Setting Commands
POWER_GOOD_DELAY D4h Yes
Fault limit Commands
IOUT_AVG_OC_FAULT_LIMIT
E7h
Yes
IOUT_AVG_UC_FAULT_LIMIT
E8h
Yes
Fault Response Commands
MFR_IOUT_OC_FAULT_RESPONSE
E5h
Yes
MFR_IOUT_UC_FAULT_RESPONSE
E6h
Yes
OVUV_CONFIG
D8h
Yes
Configuration and Control Commands
MFR_CONFIG
D0h
Yes
USER_CONFIG
D1h
Yes
MISC_CONFIG
E9h
Yes
TRACK_CONFIG
E1h
Yes
PID_TAPS
D5h
Yes
PID_TAPS_CALC
F2h
Yes
INDUCTOR D6h Yes
NLR_CONFIG
D7h
Yes
TEMPCO_CONFIG
DCh
Yes
IOUT_OMEGA_OFFSET
BEh
Yes
DEADTIME
DDh
Yes
DEADTIME_CONFIG DEh Yes
DEADTIME_MAX
BFh
Yes
SNAPSHOT
EAh
Yes
Designation Cmd Impl
SNAPSHOT_CONTROL
F3h
Yes
DEVICE_ID
E4h
Yes
USER_DATA_00
B0h
Yes
Group Commands
SEQUENCE E0h Yes
GCB_CONFIG
D3h
Yes
GCB_GROUP
E2h
Yes
ISHARE_CONFIG
D2h
Yes
PHASE_CONTROL
F0h
Yes
Supervisory Commands
PRIVATE_PASSWORD
FBh
Yes
PUBLIC_PASSWORD
FCh
Yes
UNPROTECT
FDh
Yes
SECURITY_LEVEL
FAh
Yes
Notes:
Cmd is short for Command.
Impl is short for Implemented.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
39
Mechanical Information - Hole Mount, Open Frame Version
All component placements – whether shown as physical components or symbolical outline – are for reference only and are subject to change throughout the product’s life cycle,
unless explicitly described and dimensioned in this drawing.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
40
Mechanical Information - Surface Mount Version
All component placements – whether shown as physical components or symbolical outline – are for reference only and are subject to change throughout the product’s life cycle,
unless explicitly described and dimensioned in this drawing.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
41
Mechanical Information
All component placements – whether shown as physical components or symbolical outline – are for reference only and are subject to change throughout the product’s life cycle,
unless explicitly described and dimensioned in this drawing.
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
42
Soldering Information - Surface Mounting and Hole
Mount through Pin in Paste Assembly
The product is intended for forced convection or vapor phase
reflow soldering in SnPb or Pb-free processes.
The reflow profile should be optimised to avoid excessive
heating of the product. It is recommended to have a sufficiently
extended preheat time to ensure an even temperature across
the host PWB and it is also recommended to minimize the time
in reflow.
A no-clean flux is recommended to avoid entrapment of
cleaning fluids in cavities inside the product or between the
product and the host board, since cleaning residues may affect
long time reliability and isolation voltage.
General reflow process specifications
SnPb eutectic
Pb-free
Average ramp-up (T
PRODUCT
)
3°C/s max
3°C/s max
Typical solder melting (liquidus)
temperature
TL 183°C 221°C
Minimum reflow time above T L
60 s
60 s
Minimum pin temperature
T
PIN
210°C
235°C
Peak product temperature
TPRODUCT
225°C
260°C
Average ramp-down (TPRODUCT )
6°C/s max
6°C/s max
Maximum time 25°C to peak
6 minutes
8 minutes
T
PRODUCT
maximum
T
PIN
minimum
Time
Pin
profile
Product
profile
T
L
Time in
reflow
Time in preheat
/ soak zone
Time 25°C to peak
Temperature
Minimum Pin Temperature Recommendations
Pin number 2A is chosen as reference location for the
minimum pin temperature recommendation since this will likely
be the coolest solder joint during the reflow process.
SnPb solder processes
For SnPb solder processes, a pin temperature (T
PIN
) in excess
of the solder melting temperature, (TL, 183°C for Sn63Pb37)
for more than 60 seconds and a peak temperature of 220°C is
recommended to ensure a reliable solder joint.
For dry packed products only: depending on the type of solder
paste and flux system used on the host board, up to a
recommended maximum temperature of 245°C could be used,
if the products are kept in a controlled environment (dry pack
handling and storage) prior to assembly.
Lead-free (Pb-free) solder p rocesses
For Pb-free solder processes, a pin temperature (T
PIN
) in
excess of the solder melting temperature (TL, 217 to 221°C for
SnAgCu solder alloys) for more than 60 seconds and a peak
temperature of 245°C on all solder joints is recommended to
ensure a reliable solder joint.
Maximum Product Temperature Requirements
Top of the product PWB near pin 9B is chosen as reference
location for the maximum (peak) allowed product temperature
(TPRODUCT ) since this will likely be the warmest part of the
product during the reflow process.
SnPb solder processes
For SnPb solder processes, the product is qualified for MSL 1
according to IPC/JEDEC standard J-STD-020C.
During reflow TPRODUCT must not exceed 225 °C at any time.
Pb-free solder processes
For Pb-free solder processes, the product is qualified for MSL
3
according to IPC/JEDEC standard J-STD-020C.
During reflow TPRODUCT must not exceed 260 °C at any time.
Dry Pack Information
Products intended for Pb-free reflow soldering processes are
delivered in standard moisture barrier bags according to
IPC/JEDEC standard J-STD-033 (Handling, packing, shipping
and use of moisture/reflow sensitivity surface mount devices).
Using products in high temperature Pb-free soldering
processes requires dry pack storage and handling. In case the
products have been stored in an uncontrolled environment and
no longer can be considered dry, the modules must be baked
according to J-STD-033.
Thermocoupler Attachment
Pin 2A for measurement of minimum Pin (solder
joint) temperature TPIN
Pin 9B for measurement of maximum
Product temperature TPRODUCT
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
43
Soldering Information - Hole Mounting
The hole mounted product is intended for plated through hole
mounting by wave or manual soldering. The pin temperature is
specified to maximum to 270°C for maximum 10 seconds.
A maximum preheat rate of 4°C/s and maximum preheat
temperature of 150°C is suggested. When soldering by hand,
care should be taken to avoid direct contact between the hot
soldering iron tip and the pins for more than a few seconds in
order to prevent overheating.
A no-clean flux is recommended to avoid entrapment of
cleaning fluids in cavities inside the product or between the
product and the host board. The cleaning residues may affect
long time reliability and isolation voltage.
Delivery Package Information
The products are delivered in antistatic carrier tape
(EIA 481 standard).
Carrier Tape Specifications
Material
Antistatic PS
Surface resistan ce <10
7
Ohm/square
Bakeability
The tape is not bakable
Tape width, W
44 mm [1.73 inch]
Pocket pitch, P1 24 mm [0.95 inch]
Pocket depth, K
0
12.3 mm [0.488 inch]
Reel diameter 381 mm [15 inch]
Reel capacit y 200 products /reel
Reel weight
1.3 kg/full reel
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
44
Soldering Information - Hole Mounting (SIP version)
The product is intended for plated through hole mounting by
wave or manual soldering. The pin temperature is specified to
maximum to 270°C for maximum 10 seconds.
A maximum preheat rate of 4°C/s and maximum preheat
temperature of 150°C is suggested. When soldering by hand,
care should be taken to avoid direct contact between the hot
soldering iron tip and the pins for more than a few seconds in
order to prevent overheating.
A no-clean flux is recommended to avoid entrapment of
cleaning fluids in cavities inside the product or between the
product and the host board. The cleaning residues may affect
long time reliability and isolation voltage.
Delivery Package Information (SIP version)
The products are delivered in antistatic/static dissipative trays
Tray Specifications
Material
Antistatic Polyethylene foam
Surface resistan ce
105< Ohms/square <1011
Bakability The trays are not bakeable
Tray thickness
15 mm [ 0.591 inch]
Box capacity 100 products, 2 full trays/box)
Tray weight
35 g empty tray, 290 g full tray
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
45
Product Qualification Specification
Characteristics
External visual inspection IPC-A-610
Change of temperature
(Temperature cycling) IEC 60068-2-14 Na
Temperature range
Number of cycles
Dwell/transfer time
-40 to 100°C
1000
15 min/0-1 min
Cold (in operation) IEC 60068-2-1 Ad
Temperature T
A
Duration
-45°C
72 h
Damp heat IEC 60068-2-67 Cy
Temperature
Humidity
Duration
85°C
85 % RH
1000 hours
Dry heat IEC 60068-2-2 Bd Temperature
Duration
125°C
1000 h
Electrostatic discharge
susceptibility
IEC 61340-3-1, JESD 22-A114
IEC 61340-3-2, JESD 22-A115
Human body model (HBM)
Machine Model (MM)
Class 2, 2000 V
Class 3, 200 V
Immersion in cleaning solvents IEC 60068-2-45 XA, method 2
Water
Glycol ether
55°C
35°C
Mechanical shock IEC 60068-2-27 Ea
Peak acceleration
Duration
100 g
6 ms
Moisture reflow sensitivity 1 J-STD-020C Level 1 (SnPb-eutectic)
Level 3 (Pb Free)
225°C
260°C
Operational life test MIL-STD-202G, method 108A Duration 1000 h
Resistance to soldering heat 2 IEC 60068-2-20 Tb, method 1A
Solder temperature
Duration
270°C
10-13 s
Robustness of terminations
IEC 60068-2-21 Test Ua1
IEC 60068-2-21 Test Ue1
Through hole mount products
Surface mount products
All leads
All leads
Solderability
IEC 60068-2-58 test Td 1
IEC 60068-2-20 test Ta 2
Preconditioning
Temperature, SnPb Eutectic
Temperature, Pb-free
Preconditioning
Temperature, SnPb Eutectic
Temperature, Pb-free
150°C dry bake 16 h
215°C
235°C
Steam ageing
235°C
245°C
Vibration, broad band random IEC 60068-2-64 Fh, method 1
Frequency
Spectral density
Duration
10 to 500 Hz
0.07 g2/Hz
10 min in each direction
Notes
1 Only for products intended for reflow soldering (surface mount products)
2 Only for products intended for wave soldering (plated through hole products)
E
BMR462 series PoL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
EN/LZT 146 436 R3B August 2014
© Ericsson AB
Technical Specification
46
