DATA SH EET
Product specification
Supersedes data of 2002 Oct 07 2003 Oct 24
INTEGRATED CIRCUITS
UBA2032
Full bridge driver IC
2003 Oct 24 2
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
FEATURES
•Full bridge driver circuit
•Integrated bootstrap diodes
•Integrated high voltage level shift function
•High voltage input for the internal supply voltage
•550 V maximum bridge voltage
•Bridge disable function
•Input for start-up delay
•Adjustable oscillator frequency
•Predefined bridge position during start-up
•Adaptive non-overlap.
APPLICATIONS
•The UBA2032 can drive (via the MOSFETs) any kind of
load in a full bridge configuration
•The circuit is especially designed as a commutator for
High Intensity Discharge (HID) lamps.
GENERAL DESCRIPTION
The UBA2032 is a high voltage monolithic integrated
circuit made in the EZ-HV SOI process. The circuit is
designed for driving the MOSFETs in a full bridge
configuration. In addition, it features a disable function, an
internal adjustable oscillator and an external drive function
with a high-voltage level shifter for driving the bridge.
To guarantee an accurate 50% duty factor, the oscillator
signal can be passed through a divider before being fed to
the output drivers.
ORDERING INFORMATION
TYPE
NUMBER PACKAGE
NAME DESCRIPTION VERSION
UBA2032T SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
UBA2032TS SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm SOT341-1
2003 Oct 24 3
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
BLOCK DIAGRAM
handbook, full pagewidth
MGU542
LOW VOLTAGE
LEVEL SHIFTER
OSCILLATOR
STABILIZER
UVLO
HV
SGND
VDD
RC
SU
BD
HIGH VOLTAGE
LEVEL SHIFTER
HIGHER LEFT
DRIVER
LOWER RIGHT
DRIVER
LOWER LEFT
DRIVER
HIGHER RIGHT
DRIVER
LOGIC SIGNAL
GENERATOR
LOGIC
÷
2
11 (13)
8 (10)
10 (12)
9 (11)
1.29 V
2 (2)1 (1) 3 (3)
EXTDR−LVS +LVS
DD
4, 6, 16, 19, 21
(4, 5, 7, 8, 18, 19, 22, 24, 25)
n.c.
17 (20) GLL
18 (21) PGND
20 (23) GLR
22 (26) SHR
24 (28) GHR
13 (15) GHL
23 (27) FSR
15 (17) SHL
14 (16) FSL
UBA2032T
UBA2032TS
12 (14)
7 (9)
5 (6)
bridge disable
Fig.1 Block diagram.
Pin numbers refer to the UBA2032T.
Pin numbers in parenthesis refer to the UBA2032TS.
2003 Oct 24 4
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
PINNING
SYMBOL PIN DESCRIPTION
UBA2032T UBA2032TS
−LVS 1 1 negative supply voltage (for logic input)
EXTDR 2 2 oscillator signal input
+LVS 3 3 positive supply voltage (for logic input)
n.c. 4 4 not connected
n.c. −5 not connected
HV 5 6 high voltage supply input
n.c. 6 7 not connected
n.c. −8 not connected
VDD 7 9 internal low voltage supply
SU 8 10 input signal for start-up delay
DD 9 11 divider disable input
BD 10 12 bridge disable control input
RC 11 13 RC input for internal oscillator
SGND 12 14 signal ground
GHL 13 15 gate of higher left MOSFET
FSL 14 16 floating supply voltage left
SHL 15 17 source of higher left MOSFET
n.c. 16 18 not connected
n.c. −19 not connected
GLL 17 20 gate of lower left MOSFET
PGND 18 21 power ground
n.c. 19 22 not connected
GLR 20 23 gate of lower right MOSFET
n.c. 21 24 not connected
n.c. −25 not connected
SHR 22 26 source of higher right MOSFET
FSR 23 27 floating supply voltage right
GHR 24 28 gate of higher right MOSFET
2003 Oct 24 5
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
handbook, halfpage
UBA2032T
MGU543
1
2
3
4
5
6
7
8
9
10
11
12
EXTDR
n.c.
HV
n.c.
VDD
SU
DD
BD
RC
SGND
GHR
FSR
SHR
n.c.
GLR
n.c.
PGND
GLL
n.c.
SHL
FSL
GHL
24
23
22
21
20
19
18
17
16
15
14
13
−LVS
+LVS
Fig.2 Pin configuration (SO24).
handbook, halfpage
UBA2032TS
MGU544
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
EXTDR
n.c.
n.c.
HV
n.c.
n.c.
VDD
SU
DD
BD
RC
SGND
GHR
FSR
SHR
n.c.
n.c.
GLR
n.c.
PGND
GLL
n.c.
n.c.
SHL
FSL
GHL
−LVS
+LVS
Fig.3 Pin configuration (SSOP28).
FUNCTIONAL DESCRIPTION
Supply voltage
The UBA2032 is powered by a supply voltage applied to
pin HV, for instance the supply voltage of the full bridge.
The IC generates its own low supply voltage for the
internal circuitry. Therefore an additional low voltage
supply is not required. A capacitor has to be connected to
pin VDD to obtain a ripple-free internal supply voltage. The
circuitcanalsobepoweredbyalowvoltagesupplydirectly
applied to pin VDD. In this case pin HV should be
connected to pin VDD or pin SGND.
Start-up
With an increasing supply voltage the IC enters the
start-upstate; thehigher powertransistors arekept offand
the lower power transistors are switched on. During the
start-upstatethebootstrapcapacitorsarechargedandthe
bridge output current is zero. The start-up state is defined
until VDD =V
DD(UVLO), where UVLO stands for Under
Voltage Lock-Out. The state of the outputs during the
start-up phase is overruled by the bridge disable function.
Release of the power drive
At the moment the supply voltage on pin VDD or pin HV
exceeds the level of release power drive, the output
voltage of the bridge depends on the control signal on
pin EXTDR; see Table 1. The bridge position after
start-up, disable or delayed start-up (via pin SU), depends
on the status of pin DD and pin EXTDR. If pin DD = LOW
(divider enabled) the bridge will start in the pre-defined
position pin GLR and pin GHL = HIGH and pin GLL and
pin GHR = LOW. If pin DD = HIGH (divider disabled) the
bridge position will depend on the status of pin EXTDR.
If the supply voltage on pin VDD or pin HV decreases and
dropsbelow the reset level ofpower drivethe ICenters the
start-up state again.
Oscillation
At the point where the supply voltage on pin HV crosses
the level of release power drive, the bridge begins
commutating between the following two defined states:
•Higher left and lower right MOSFETs on,
higher right and lower left MOSFETs off
•Higher left and lower right MOSFETs off,
higher right and lower left MOSFETs on.
2003 Oct 24 6
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
The oscillation can take place in three different modes:
•Internal oscillator mode.
In this mode the bridge commutating frequency is
determined by the values of an external resistor (Rosc)
and capacitor (Cosc). In this mode pin EXTDR must be
connectedtopin +LVS.Torealizeanaccurate 50% duty
factor, the internal divider should be used. The internal
divider is enabled by connecting pin DD to pin SGND.
Due to the presence of the divider the bridge frequency
is half the oscillator frequency. The commutation of the
bridge will take place at the falling edge of the signal on
pin RC. To minimize the current consumption
pins +LVS, −LVS and EXTDR can be connected
together to either pin SGND or pin VDD. In this way the
current source in the logic voltage supply circuit is shut
off.
•External oscillator mode without the internal divider.
In the external oscillator mode the external source is
connectedtopin EXTDRandpin RCisshort-circuitedto
pin SGNDto disable theinternal oscillator. Ifthe internal
divider is disabled (pin DD connected to pin VDD) the
duty factor of the bridge output signal is determined by
the external oscillator signal and the bridge frequency
equals the external oscillator frequency.
•External oscillator mode with the internal divider.
The external oscillator mode can also be used with the
internal divider function enabled (pin RC and pin DD
connected to pin SGND). Due to the presence of the
dividerthebridgefrequency ishalftheexternal oscillator
frequency. The commutation of the bridge is triggered
by the falling edge of the EXTDR signal with respect to
V−LVS.
If the supply voltage on pin VDD or pin HV drops below the
reset level of power drive, the UBA2032 re-enters the
start-up phase. The design equation for the bridge
oscillator frequency is: .
Non-overlap time
The non-overlap time is the time between turning off the
conducting pair of MOSFETs and turning on the next pair.
The non-overlap time is realized by means of an adaptive
non-overlap circuit. With an adaptive non-overlap, the
applicationdeterminesthe durationofthe non-overlapand
makes the non-overlap time optimal for each frequency.
The non-overlap time is determined by the duration of the
falling slope of the relevant half bridge voltage (see Fig.4).
The occurrence of a slope is sensed internally. The
minimum non-overlap time is internally fixed.
Divider function
If pin DD is connected to pin SGND, then the divider
function is enabled/present. If the divider function is
present, there is no direct relation between the position of
the bridge output and the status of pin EXTDR.
Start-up delay
Normally,thecircuitstartsoscillatingassoonaspin VDD or
pin HV reaches the level of release power drive. At this
moment the gate drive voltage is equal to the voltage on
pin VDD for the low side transistors and VDD −0.6 V for the
high side transistors. If this voltage is too low for sufficient
drive of the MOSFETs the release of the power drive can
be delayed via pin SU. A simple RC filter (R between
pin VDD and pin SU; C between pin SU and pin SGND)
can be used to make a delay, or a control signal from a
processor can be used.
Bridge disable
Thebridgedisablefunctioncanbeused to switchoffallthe
MOSFETs as soon as the voltage on pin BD exceeds the
bridge disable voltage (1.29 V). The bridge disable
function overrules all the other states.
fbridge 1
kosc Rosc
×Cosc
×()
--------------------------------------------------
=
handbook, halfpage
0
0
t (sec)
0
0
MGU545
VGHR
VSHR
VGHL
VSHL
Vhalf bridge right
Vhalf bridge left
Fig.4 Half bridge and higher/lower side driver
output signals.
2003 Oct 24 7
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
Table 1 Logic table; note 1
Notes
1. X = don’t care.
2. BD, SU and DD logic levels are with respect to SGND;
EXTDR logic levels are with respect to −LVS.
3. GHL logic levels are with respect to SHL;
GHR logic levels are with respect to SHR;
GLL and GLR logic levels are with respect to PGND.
4. If pin DD = LOW the bridge enters the state (oscillation state and pin BD = LOW and pin SU = HIGH) in the
pre-defined position pin GHL = HIGH, pin GLR = HIGH, pin GLL = LOW and pin GHR = LOW.
5. Only if the level of pin EXTDR changes from HIGH-to-LOW, the level of outputs GHL, GHR, GLL and GLR changes
from LOW-to-HIGH or from HIGH-to-LOW.
DEVICE
STATUS INPUTS (2) OUTPUTS (3)
BD SU DD EXTDR GHL GHR GLL GLR
Start-up state HIGH X X X LOW LOW LOW LOW
LOW X X X LOW LOW HIGH HIGH
Oscillation state HIGH X X X LOW LOW LOW LOW
LOW LOW X X LOW LOW HIGH HIGH
LOW HIGH HIGH HIGH LOW HIGH HIGH LOW
LOW HIGH LOW LOW HIGH
LOW HIGH LOW(4) LOW HIGH LOW LOW HIGH
LOW-to-HIGH HIGH LOW LOW HIGH
HIGH HIGH LOW LOW HIGH
HIGH-to-LOW(5) LOW HIGH HIGH LOW
2003 Oct 24 8
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); all voltages are measured with respect to
SGND; positive currents flow into the IC.
Note
1. In accordance with the Human Body Model (HBM): equivalent to discharging a 100 pF capacitor through a 1.5 kΩ
series resistor.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDD supply voltage (low voltage) DC value 0 14 V
transient at t < 0.1 µs 0 17 V
VHV supply voltage (high voltage) 0 550 V
VFSL floating supply voltage left VSHL =V
SHR = 550 V 0 564 V
VSHL =V
SHR = 0 V 0 14 V
VFSR floating supply voltage right VSHL =V
SHR = 550 V 0 564 V
VSHL =V
SHR = 0 V 0 14 V
VSHL source voltage for higher left
MOSFETs with respect to PGND and SGND −3 +550 V
with respect to SGND; t < 1 µs−14 −V
VSHR source voltage for higher right
MOSFETs with respect to PGND and SGND −3 +550 V
with respect to SGND; t < 1 µs−14 −V
VPGND power ground voltage with respect to SGND 0 5 V
V−LVS negative supply voltage for logic input t < 1 s 0 464 V
V+LVS positive supply voltage for logic input VHV = 450 V; t < 1 s 0 464 V
VHV = 0 V; DC value 0 14 V
VHV = 0 V; transient at t < 0.1 µs 0 17 V
Vi(EXTDR) input voltage from external oscillator
on pin EXTDR with respect to V−LVS 0V
+LVS V
Vi(RC) input voltage on pin RC DC value 0 VDD V
transient at t < 0.1 µs 0 17 V
Vi(SU) input voltage on pin SU DC value 0 VDD V
transient at t < 0.1 µs 0 17 V
Vi(BD) input voltage on pin BD DC value 0 VDD V
transient at t < 0.1 µs 0 17 V
Vi(DD) input voltage on pin DD DC value 0 VDD V
transient at t < 0.1 µs 0 17 V
SR slew rate at output pins repetitive 0 4 V/ns
Tjjunction temperature −40 +150 °C
Tamb ambient temperature −40 +150 °C
Tstg storage temperature −55 +150 °C
Vesd electrostatic discharge voltage on
pins HV, +LVS, −LVS, EXTDR, FSL,
GHL, SHL, SHR, GHR and FSR
note 1 −900 V
2003 Oct 24 9
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
THERMAL CHARACTERISTICS
QUALITY SPECIFICATION
In accordance with
“General Quality Specification for Integrated Circuits: SNW-FQ-611”
.
CHARACTERISTICS
Tj=25°C; all voltages are measured with respect to SGND; positive currents flow into the IC; unless otherwise
specified.
SYMBOL PARAMETER CONDITIONS VALUE UNIT
Rth(j-a) thermal resistance from junction to ambient in free air
UBA2032T 80 K/W
UBA2032TS 100 K/W
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
High voltage
IHV high voltage supply current t < 0.5 s and VHV = 550 V 0 −30 µA
IFSL, IFSR high voltage floating supply
current t < 0.5 s and VFSL =V
FSR = 564 V 0 −30 µA
IEXTDR supply current on pin EXTDR t < 0.5 s and VEXTDR = 464 V 0 −30 µA
I+LVS supply current on pin +LVS t < 0.5 s and V+LVS = 464 V 0 −30 µA
I−LVS supply current on pin −LVS t < 0.5 s and V−LVS = 450 V 0 −30 µA
Start-up; powered via pin HV
Ii(HV) HV input current VHV = 11 V; note 1 −0.5 1.0 mA
VHV(rel) level of release power drive
voltage 11 12.5 14 V
VHV(UVLO) reset level of power drive voltage 8.5 10 11.5 V
VHV(hys) HV hysteresis voltage 2.0 2.5 3.0 V
VDD internal supply voltage VHV = 20 V 10.5 11.5 13.5 V
Start-up; powered via pin VDD
Ii(DD) VDD input current VDD = 8.25 V; note 2 −0.5 1.0 mA
VDD(rel) level of release power drive
voltage 8.25 9.0 9.75 V
VDD(UVLO) reset level of power drive voltage 5.75 6.5 7.25 V
VDD(hys) hysteresis voltage 2.0 2.5 3.0 V
2003 Oct 24 10
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
Output stage
Ron(H) higher MOSFETs on resistance VFSR =V
FSL = 12 V; with respect to
SHR and SHL; Isource =50mA 15 21 26 Ω
Roff(H) higher MOSFETs off resistance VFSR =V
FSL = 12 V; with respect to
SHR and SHL; Isink =50mA 91418Ω
R
on(L) lower MOSFETs on resistance VDD =12V; I
source =50mA 15 21 26 Ω
R
off(L) lower MOSFETs off resistance VDD =12V; I
sink = 50 mA 9 14 18 Ω
Io(source) output source current VDD =V
FSL =V
FSR =12V;
V
GHR =V
GHL =V
GLR =V
GLL =0V 130 180 −mA
Io(sink) output sink current VDD =V
FSL =V
FSR =12V;
V
GHR =V
GHL =V
GLR =V
GLL =12V 150 200 −mA
Vdiode bootstrap diode voltage drop Idiode = 1 mA 0.8 1.0 1.2 V
tslope minimum ∆V/∆t for adaptive
non-overlap absolute values 5 15 25 V/µs
tno(min) minimum non-overlap time 600 900 1300 ns
VFSL HS lockout voltage left 3.0 4.0 5.0 V
VFSR HS lockout voltage right 3.0 4.0 5.0 V
IFSL FS supply current left VFSL =12V 2 4 6 µA
I
FSR FS supply current right VFSR =12V 246µA
DD input
VIH HIGH-level input voltage VDD =12V 6 −−V
V
IL LOW-level input voltage −−3V
I
i(DD) input current into pin DD −−1µA
SU input
VIH HIGH-level input voltage VDD =12V 4 −−V
V
IL LOW-level input voltage −−2V
I
i(SU) input current into pin SU −−1µA
External drive input
VIH HIGH-level input voltage with respect to V−LVS 4.0 −−V
V
IL LOW-level input voltage with respect to V−LVS −−1.0 V
Ii(EXTDR) input current into pin EXTDR −−1µA
f
bridge bridge frequency note 3 −−200 kHz
Low voltage logic supply
I+LVS low voltage supply current V+LVS =V
EXTDR = 5.75 to 14 Vwith
respect to V−LVS
−250 500 µA
V+LVS low voltage supply voltage with respect to V−LVS 5.75 −14 V
Bridge disable circuit
Vref(dis) disable reference voltage 1.23 1.29 1.35 V
Ii(BD) disable input current −−1µA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
2003 Oct 24 11
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
Notes
1. The current is specified without commutation of the bridge. The current into pin HV is limited by a thermal protection
circuit. The current is limited to 11 mA at Tj= 150 °C.
2. The current is specified without commutation of the bridge and pin HV is connected to VDD.
3. The minimum frequency is mainly determined by the value of the bootstrap capacitors.
Internal oscillator
fbridge bridge oscillating frequency note 3 −−100 kHz
∆fosc(T) oscillator frequency variation
with respect to temperature fbridge = 250 Hz and
Tamb =−40 to +150 °C−10 0 +10 %
∆fosc(VDD) oscillator frequency variation
with respect to VDD
fbridge = 250 Hz and
VDD = 7.25 to 14 V −10 0 +10 %
kHhigh level trip point VRC(high) =k
H×V
DD 0.38 0.4 0.42
kLlow level trip point VRC(low) =k
L×V
DD −0.01 −
kosc oscillator constant fbridge = 250 Hz 0.94 1.02 1.10
Rext external resistor to VDD 100 −−kΩ
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
2003 Oct 24 12
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
APPLICATION INFORMATION
Basic application
A basic full bridge configuration with an HID lamp is shown
in Fig.5. The bridge disable, the start-up delay and the
external drive functions are not used in this application.
The pins −LVS, +LVS, EXTDR and BD are short-circuited
to SGND. The internal oscillator is used and to realise a
50% duty cycle the internal divider function has to be used
by connecting pin DD to pin SGND.
The IC is powered by the high voltage supply. Because
the internal oscillator is used, the bridge commutating
frequency is determined by the values of Rosc and Cosc.
The bridge starts oscillating when the HV supply voltage
exceeds the level of release power drive (typically 12.5 V
onpin HV).Ifthesupplyvoltageonpin HVdropsbelowthe
reset level of power drive (typically 10 V on pin HV), the
UBA2032 enters the start-up state.
handbook, full pagewidth
UBA2032T
VDD
EXTDR
SGND
HV
SU
DD
BD
RC
GHR
FSR
SHR
GLR
GLL
SHL
FSL
GHL
PGND
1
2
3
5
7
8
9
10
11
12
24
23
22
20
18
17
15
14
13
IGNITOR
Ci
C3
C1
C2
Rosc
Cosc
LR
HR
LL
HL
high voltage
550 V (max)
GND
MGU546
−LVS
+LVS
R>100 Ω
(1)
R>100 Ω
(1)
R>100 Ω
(1)
R>100 Ω
(1)
Fig.5 Basic configuration.
(1) See Section “Gate resistors”.
2003 Oct 24 13
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
Application with external control
Figure 6 shows an application containing a system
ground-referenced control circuit. Pin +LVS can be
connected to the same supply as the external oscillator
control unit and pin −LVS is connected to pin SGND.
Pin RC is short-circuited to SGND. The bridge
commutation frequency is determined by the external
oscillator.The bridgedisable input(pin BD) canbe usedto
immediately turn off all four MOSFETs in the full bridge.
handbook, full pagewidth
UBA2032T
VDD
EXTDR
SGND
HV
SU
DD
BD
RC
GHR
FSR
SHR
GLR
GLL
SHL
FSL
GHL
PGND
1
2
3
5
7
8
9
10
11
12
24
23
22
20
18
17
15
14
13
IGNITOR
Ci
C3
C1
C2
LR
HR
LL
HL
high voltage
550 V (max)
low voltage
EXTERNAL
OSCILLATOR
CONTROL
CIRCUIT
GND
MGU547
−LVS
+LVS
R>100 Ω
(1)
R>100 Ω
(1)
R>100 Ω
(1)
R>100 Ω
(1)
Fig.6 External control configuration.
(1) See Section “Gate resistors”.
2003 Oct 24 14
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
Car headlight application
The life of an HID lamp depends of the rate of sodium
migration through the quartz wall of the lamp. To minimize
this, the lamp must operate negative with respect to the
system ground. Figure 7 shows a full bridge with an HID
lamp for a car headlight application, along with a control
circuit referenced to the system ground and with a bridge
voltage operating at high negative voltages with respect to
the system ground. Pin +LVS and pin HV can be
connected to the same supply as the control unit The
output state of the bridge is related to the position of
pin EXTDR. See also the timing diagram.
handbook, full pagewidth
UBA2032TS
VDD
EXTDR
SGND
HV
SU
DD
BD
RC
GHR
FSR
SHR
GLR R>100 Ω(1)
R>100 Ω(1)
R>100 Ω(1)
R>100 Ω(1)
GLL
SHL
FSL
GHL
PGND
1
2
3
6
9
10
11
12
13
14
28
27
26
23
21
20
17
16
15
IGNITOR
BRIDGE
CONTROL
UNIT
Ci
C3
C1
C2
LR
HR
LL
HL
system
GND
high voltage
−450 V (max)
+ low voltage supply
MGU803
−LVS
+LVS
Fig.7 Car headlight application.
(1) See Section “Gate resistors”.
2003 Oct 24 15
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
Additional application information
GATE RESISTORS
At ignition of an HID lamp, a large EMC spark occurs. This
can result in a large voltage transient or oscillation at the
gates of the full bridge MOSFETs (LL, LR, HR and HL).
When these gates are directly coupled to the gate drivers
(pins GHR, GLR, GHL and GLL), voltage overstress of the
driver outputs may occur. Therefore, it is advised to add a
resistor with a minimum value of 100 Ωin series with each
gatedrivertoisolate the gatedriveroutputsfrom the actual
power MOSFETs gate.
Itmay benecessary toadd adiode inparallel tothese gate
resistors in order:
1. To switch off the power transistor in time
2. Toensurethatthepowertransistorremainsinoff-state
during a high ∆V/∆t at the bridge nodes; typical use
depends on the characteristics (gate charge, Miller
capacitance) of the power MOSFETs.
GATE CHARGE AND SUPPLY CURRENT AT HIGH FREQUENCY
USE
The total gate current needed to charge the gates of the
power MOSFETs equals:
.
Where:
Igate = gate current
fbridge = bridge frequency
Qgate = gate charge.
This current is supplied via the internal low voltage supply
(VDD). Since this current is limited to 11 mA (see
Section “Characteristics”; table note 1), at higher
frequencies and with MOSFETs having a relative high
gate charge, this maximum VDD supply current may not be
sufficient anymore. As a result the internal low voltage
supply (VDD) and the gate drive voltage will drop resulting
in an increase of the on resistance (Ron) of the full bridge
MOSFETs. In this case an auxiliary low voltage supply is
necessary.
Igate 4f
bridge Qgate
××=
2003 Oct 24 16
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
PACKAGE OUTLINES
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZ
ywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65 0.3
0.1 2.45
2.25 0.49
0.36 0.32
0.23 15.6
15.2 7.6
7.4 1.27 10.65
10.00 1.1
1.0 0.9
0.4 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT137-1
X
12
24
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
c
L
vMA
13
(A )
3
A
y
0.25
075E05 MS-013
pin 1 index
0.1 0.012
0.004 0.096
0.089 0.019
0.014 0.013
0.009 0.61
0.60 0.30
0.29 0.05
1.4
0.055
0.419
0.394 0.043
0.039 0.035
0.016
0.01
0.25
0.01 0.004
0.043
0.016
0.01
e
1
0 5 10 mm
scale
SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
99-12-27
03-02-19
2003 Oct 24 17
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
UNIT A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05 1.80
1.65 0.38
0.25 0.20
0.09 10.4
10.0 5.4
5.2 0.65 1.25
7.9
7.6 0.9
0.7 1.1
0.7 8
0
o
o
0.13 0.10.2
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
1.03
0.63
SOT341-1 MO-150 99-12-27
03-02-19
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
114
28 15
0.25
y
pin 1 index
0 2.5 5 mm
scale
SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm SOT341-1
A
max.
2
2003 Oct 24 18
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
SOLDERING
Introduction to soldering surface mount packages
Thistextgivesa very briefinsighttoa complex technology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certainsurfacemountICs,butit is not suitableforfinepitch
SMDs. In these situations reflow soldering is
recommended.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit board by screenprinting, stencillingor
pressure-syringe dispensing before package placement.
Driven by legislation and environmental forces the
worldwide use of lead-free solder pastes is increasing.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
Typical reflow peak temperatures range from
215 to 270 °C depending on solder paste material. The
top-surface temperature of the packages should
preferably be kept:
•below 220 °C (SnPb process) or below 245 °C (Pb-free
process)
– for all BGA and SSOP-T packages
– for packages with a thickness ≥2.5 mm
– for packages with a thickness < 2.5 mm and a
volume ≥350 mm3 so called thick/large packages.
•below 235 °C (SnPb process) or below 260 °C (Pb-free
process) for packages with a thickness < 2.5 mm and a
volume < 350 mm3 so called small/thin packages.
Moisture sensitivity precautions, as indicated on packing,
must be respected at all times.
Wave soldering
Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs)or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
•Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
•For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
•Forpackageswithleadsonfour sides, the footprintmust
be placed at a 45°angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time of the leads in the wave ranges from
3 to 4 seconds at 250 °C or 265 °C, depending on solder
material applied, SnPb or Pb-free respectively.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
2003 Oct 24 19
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
Suitability of surface mount IC packages for wave and reflow soldering methods
Notes
1. Formore detailed informationon theBGApackages referto the
“(LF)BGAApplication Note
”(AN01026); order acopy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”
.
3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account
be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature
exceeding 217 °C±10 °C measured in the atmosphere of the reflow oven. The package body peak temperature
must be kept as low as possible.
4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
8. Hot bar or manual soldering is suitable for PMFP packages.
PACKAGE(1) SOLDERING METHOD
WAVE REFLOW(2)
BGA, LBGA, LFBGA, SQFP, SSOP-T(3), TFBGA, VFBGA not suitable suitable
DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, HVQFN, HVSON, SMS not suitable(4) suitable
PLCC(5), SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended(5)(6) suitable
SSOP, TSSOP, VSO, VSSOP not recommended(7) suitable
PMFP(8) not suitable not suitable
2003 Oct 24 20
Philips Semiconductors Product specification
Full bridge driver IC UBA2032
DATA SHEET STATUS
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
LEVEL DATA SHEET
STATUS(1) PRODUCT
STATUS(2)(3) DEFINITION
I Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseor at anyotherconditions abovethosegiven in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuchapplicationswillbe
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
© Koninklijke Philips Electronics N.V. 2003 SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Printed in The Netherlands R78/02/pp21 Date of release: 2003 Oct 24 Document order number: 9397 750 12127
