FIN1104MTCX - FAIRCHILD SEMICONDUCTOR

January 2002

Revised January 2003

FIN1104 LVDS 4 Port High Speed Repeater

FIN1104

LVDS 4 Port High Speed Repeater

General Description

This 4 port repeater is designed for high speed intercon-

nects utilizing Low Voltage Differential Signaling (LVDS)

technolo gy. The FIN1104 accep ts an d ou tpu t s LVDS levels

with a typical differential output swing of 330 mV which pro-

vides low EMI at ultra low power dissipation even at high

frequencies. The FIN1104 provides a VBB reference for AC

coupling o n th e inpu ts. In addition the F IN1104 can di r ectly

accept LVPECL, HSTL, and SSTL-2 for translation to

LVDS.

Features

■Greater than 800 Mbps data rate

■3.3V power supply operation

■3.5 ps maximum random jitter and 135 ps maximum

deterministic jitter

■Wide rail-to-rail common mode range

■LVDS receiver inputs accept LVPECL, HSTL, and

SSTL-2 directly

■Ultra low power consumption

■20 ps typical channe l -to-c ha nn el skew

■Power off protection

■> 7.5 kV HBM ESD Protection

■Meets or exceeds the TIA/EIA-644-A LVDS standard

■Available in space savi ng 24- Le ad TSS OP package

■Open circuit fail safe protection

■VBB reference output

Ordering Code:

Devices also available in Tape and Reel. S pecify by ap pending su ffix let te r “X” to the ordering co de.

Pin Descriptions Connection Diagram

Order Num b er Packa ge Num be r Packag e Descr ip tio n

FIN1104MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pin Name Description

RIN1+, RIN2+,

RIN3+, RIN4+Non-inverting LVDS Input

RIN1−, RIN2−,

RIN3−, RIN4−Inverting LVDS Input

DOUT1+, DOUT2+,

DOUT3+, DOUT4+No n-inverting Driver Output

DOUT1−, DOUT2−,

DOUT3−, DOUT4−Inverting Driver Output

EN Driver Enable Pin for All Output

EN Inverting Driver Enable Pin for all Outputs

VCC Power Supply

GND Ground

VBB Reference Voltage Output

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FIN1104

Function Tab le

H = HIGH Logi c Level

L = LOW Logic Lev el

X = Don’t Care

Z = High Impeda nc e

Functional Diagram

Inputs Outputs

EN EN DIN+DIN−DOUT+DOUT−

HLHLHL

HLLHLH

H L Fail Safe Case H L

XHXXZZ

LXXXZZ

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FIN1104

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

Note 1: The “Absolute Maximum Ratings”: are t hos e v alues bey ond whic h

damage to the device may occur. The databook specifications should be

met, with out exc ept ion, to ens ure t hat the sys tem des ign is reli able ov er its

power supply, temperature and output/input loading variables. Fairchild

does not recommend operation of circuits outside databook specification.

DC Electrical Characteristics

Note 2: All typical values are at TA = 25°C and wit h VCC = 3.3V.

Supply Voltage (VCC)−0.5V to +4.6V

LVDS DC Input V oltage (VIN)−0.5V to +4.6V

LVDS DC Output Voltage (VOUT)−0.5V to +4.6V

Driver Short Circuit Current (IOSD) Continuous 10 mA

Storage Temperature Range (TSTG)−65°C to +150°C

Max Junct ion Temper atu re (T J)150°C

Lead Temperature (TL)

(Soldering, 10 seconds) 260°C

ESD (Human Body Model) 7500V

ESD (Machine Model) 400V

Supply Voltage (VCC) 3.0V to 3.6V

Magnitude of Differential

Voltage (|VID|) 100 mV to VCC

Comm on Mod e Voltage

Range (VIC)(0V + |VID|/2) to (VCC − |VID|/2)

Operating Temperature (TA)−40°C to +85°C

Symbol Parameter Test Conditions Min Typ Max Units

(Note 2)

VTH Differential Input Threshold HIGH See Figure 1; VIC = +0.05V, +1.2V, or VCC − 0.05V 100 mV

VTL Differential Input Threshold LOW See Figure 1; VIC = +0.05V, +1.2V, or VCC − 0.05V −100 mV

VIH Input HIGH Voltage (EN or EN)2.0V

CC V

VIL Input LOW Voltage (EN or EN)GND0.8V

VOD Output Differential Voltage 250 330 450 mV

∆VOD VOD Magnitude Change from 25 mV

Differential LOW-to-HIGH RL = 100 Ω, Driver Enabled,

VOS Offset Voltage See Figure 2 1.125 1.23 1.375 V

∆VOS Offset Magnitude Change from 25 mV

Differential LOW-to-HIGH

IOS Short Circuit Output Current DOUT+ = 0V and DOUT− = 0V, −3.4 −6mA

Driver Enabled

VOD = 0V, Driver Enabled ±3.4 ±6mA

IIN Input Current (EN, EN, DINx+, DINx−)V

IN = 0V to VCC, Other Input = VCC or 0V ±20 µA

(for Differential Inputs)

IOFF Power Off Input or Output Current VCC = 0V, VIN or VOUT = 0V to 3.6V ±20 µA

ICCZ Disabled Power Supply Current Drivers Disabled 5.4 11 mA

ICC Power Supply Current Drivers Enabled, Any Valid Input Condition 30.4 41 mA

IOZ Disabled Output Leakage Current Driver Disabled, DOUT+ = 0V to 3.6V or ±20 µA

DOUT− = 0V to3.6V

VIC Common Mode Voltage Range |VID| = 100 mV to VCC 0V + |VID|/2 VCC − (|VID|/2) V

CIN Input Capacitance Enable Input 2.6 pF

LVDS Input 2.1

COUT Output Capacitance 2.8 pF

VBB Output Reference Voltage VCC = 3.3V, IBB = 0 to −275 µA 1.125 1.2 1.375 V

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FIN1104

AC Electrical Characteristi cs

Over supply voltage and operating temperature ranges, unless otherwise specified

Note 3: All typi c al values are at TA = 25°C and with VCC = 3.3V.

Note 4: tSK(LH), tSK(HL) is t he ske w betwee n specified outputs of a s ingle device when t he ou tp ut s have identic al loads and are swit c hing in t he sam e direc-

tion.

Note 5: tSK(PP) is t he mag nit ude of t he difference in pro pagatio n delay t im es betwe en any sp ecified t erminals of t w o devices swit c hing in the sam e d ire c ti on

(either Low-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.

Note 6: Passing criteria for maximum frequency is the output VOD > 200 mV and the duty cycle is 45% to 55% with all channels switching.

Note 7: Output loading is tr ans m ission li ne environm ent on ly ; CL is < 1 pF of stray test fixture capacitance.

FIGURE 1. Di ffere ntial Recei ver Voltag e Def initi ons an d

Propagation and Transition Time Test Circuit

FIGURE 2. Differential Driver DC Test Circuit

Note A: All LVDS input pulses have freq uency = 10 MHz, tR

or tF < = 0.5 ns

Note B: CL includes all prob e and tes t fi x ture c apacitanc es

FIGURE 3. Differential Driver Propagation Delay

and Transition Time Test Circuit

Symbol Parameter Test Conditions Min Typ Max Units

(Note 3)

tPLHD Differential Output Propagation Delay 0.75 1.1 1.75 ns

LOW-to-HIGH

tPHLD Differential Output Propagation Delay 0.75 1.1 1.75 ns

HIGH-to-LOW RL = 100 Ω, CL = 5 pF,

tTLHD Differential Output Rise Time (20% to 80%) VID = 200 mV to 450 mV, 0.29 0.4 0.58 ns

tTHLD Differential Output Fall Time (80% to 20%) VIC = |VID|/2 to VCC − (|VID|/2), 0.29 0.4 0.58 ns

tSK(P) Pulse Skew |tPLH - tPHL| Duty Cycle = 50%, 0.02 0.2 ns

tSK(LH), Channel-to-Channel Skew See Figure 1 and Figure 3 0.02 0.15 ns

tSK(HL) (Note 4) 0.02

tSK(PP) Part-to-Part Skew (Note 5) 0.5 ns

fMAX Maximum Frequency (Note 6)(Note 7) 400 800 MHz

tPZHD Differential Output Enable Time 2.2 5 ns

from Z to HIGH

tPZLD Differential Output Enable Time 2.5 5 ns

from Z to LOW RL = 100 Ω, CL = 5 pF,

tPHZD Differential Output Disable Time See Figure 2 and Figure 3 1.8 5 ns

from HIGH to Z

tPLZD Differential Output Disable Time 2.1 5 ns

from LOW to Z

tDJ LVDS Data Jitter, VID = 300 mV, PRBS = 223 - 1, 85 135 ps

Deterministic VIC = 1.2V at 800 Mbps

tRJ LVDS Clock Jitter, VID = 300 mV, 2.1 3.5 ps

Random (RMS) VIC = 1.2V at 400 MHz

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FIN1104

FIGURE 4. AC Wavefo rm

Note A: All LVTTL i nput pulses ha v e freque ncy = 10MHz, tR or tF < = 2 ns

Note B: CL includes all probe and jig capac it ances

FIGURE 5. Differential Driver Enable and Disable Circuit

FIGURE 6. E nable and D isable AC Waveforms

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FIN1104 LVDS 4 Port High Speed Repeater

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC24

Fairchild does not assu me any responsibility for use of any circuitry de scribed, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support de vices o r syste ms are device s or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any com ponen t of a life su pport

device or system whose failure to perform can be rea-

sonabl y ex pect ed to ca use the fa ilu re of the li fe su pp ort

device or system, or to affect its safety or effectiveness.