XR81101EVB - Exar - Datasheet.Live

XR81101

Universal Clock - High Frequency

LVCMOS Clock Synthesizer

exar.comXR81101

Rev 1A

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General Description

The XR81101-AA02 is a clock synthesizer operating at a 3.3V/2.5V sup-

ply with Integer divider, using a 25MHz parallel resonant crystal reference

input provides a 125MHz LVCMOS output. The device is optimized for

use with a 25MHz crystal (or system clock) and generates a 125MHz out-

put clock for GE applications. The LVCMOS output has very low phase

noise jitter of sub 150fs, while consuming extremely low power.

The application diagram below shows a typical synthesizer configuration

with any standard crystal oscillating in fundamental mode. Internal load

capacitors are optionally available to minimize/eliminate external crystal

loads. A system clock can also be used to overdrive the oscillator for a

synchronous timing system.

The typical phase noise plot below shows the jitter integrated over the

1.875MHz to 20MHz range that is widely used in WAN systems. These

clock devices show a very good high frequency noise floor below -150dB.

The XR81101 is a family of Universal Clock synthesizer devices in

TSSOP-8 packages. The devices generate ANY frequency in the range of

10MHz to 200MHz by utilizing a highly flexible delta sigma modulator and

a wide ranging VCO. These devices can be used with standard crystals or

external system clock to support a wide variety of applications. This family

of products has an extremely low power PLL block with core power con-

sumption 40% less than the equivalent devices from competition. By sec-

ond sourcing several of the existing sockets, these devices provides a

very compelling power efficiency value benefit across all market seg-

ments.

Other clock multiplier and/or driver configurations are possible in this

clock family and can be requested from the factory

FEATURES

• XR81101-AA02: Factory configured

• One LVCMOS output

• Crystal oscillator interface which can also be

overdriven using a single-ended reference clock

• Output frequency: 125MHz

• Crystal/input frequency: 25MHz, parallel resonant

crystal

• RMS phase jitter @ 125MHz, 1.875MHz - 20MHz:

< 150fs

• Full 3.3V or 2.5V operating supply

• -40°C to 85°C ambient operating temperature

• Lead-free (RoHS 6) package

APPLICATIONS

• Gigabit Ethernet

• Low-jitter Clock Generation

• Synchronized clock systems

Ordering Information – page 8

Typical Application

XR81101PHASENOISE(dBc/Hz)

100Hz 1KHz 10KHz 100 KHz 1MHz 10MH z

-120db

-160db

-140db

-100db

-80db

-60db

-180db

-40db

RMS Jitter = 123.6fs

Int Range 1.875MHz to 20MHz

2.5Vor3.3V

125MHz

XTAL_IN

XTAL_OUT

25MHz

Enable

XR81101 ͲAA02

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Absolute Maximum Ratings

Stresses beyond those listed under Absolute Maximum

Ratings may cause permanent damage to the device.

Exposure to any Maximum Rating condition for extended

periods may affect device reliability and lifetime.

Supply Voltage..........................................................+4.2V

Input Voltage......................................-0.5V to VCC + 0.5V

Output Voltage...................................-0.5V to VCC + 0.5V

Reference Frequency/Input Crystal.........10MHz to 60MHz

Storage Temperature................................-55°C to +125°C

Lead Temperature (Soldering, 10 sec).....................300°C

ESD Rating (HBM - Human Body Model)....................2kV

Operating Conditions

Operating Temperature Range.....................-40°C to +85°C

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Electrical Characteristics

Unless otherwise noted: TA = -40°C to +85°C, VCC = 3.3V±5% or 2.5V±5%, VEE = 0V

Symbol Parameter Conditions * Min Typ Max Units

3.3V Power Supply DC Characteristics

VCC Power Supply Voltage • 3.135 3.3 3.465 V

IEE Power Supply Current 125MHz with output unloaded. 24 mA

2.5V Power Supply DC Characteristics

VCC Power Supply Voltage • 2.375 2.5 2.625 V

IEE Power Supply Current 125MHz with the output unloaded. 21 mA

LVCMOS/LVTTL DC Characteristics

* Limits applying over the full operating temperature range are denoted by a “•”.

VIH Input High Voltage VCC = 3.465V • 2.42 VCC + 0.3 V

VCC = 2.625V • 1.83 VCC + 0.3 V

VIL Input Low Voltage VCC = 3.465V • -0.3 1.03 V

VCC = 2.625V • -0.3 0.785 V

IIH Input High Current (OE, FSEL[1:0]) VIN = VCC = 3.465V or 2.625V • 15 µA

IIL Input Low Current (OE, FSEL[1:0]) VIN = 0V, VCC = 3.465V or 2.625V • -10 µA

LVCMOS DC Characteristics

VOH Output High Voltage Output unloaded • 0.8 x VCC V

VOL Output Low Voltage Output unloaded • 0.1 x VCC V

Crystal Characteristics

XMode Mode of Oscillations Fundamental

XfFrequency 25 MHz

ESR Equivalent Series Resistance 50 Ω

CSShunt Capacitance 7 pF

AC Characteristics

fOUT Output Frequency 125 MHz

tjit(I) RMS Phase Jitter 125MHz (Int. Range 1.875MHz-20MHz) 0.15 pS

tjit(cc) Cycle-to-Cycle Jitter Using 25MHz, 18pF resonant crystal • 10 pS

tR/tFOutput Rise/Fall Time 20% to 80% • 100 550 pS

Odc Output Duty Cycle • 48 52 %

Symbol Parameter Conditions * Min Typ Max Units

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Pin Configuration

Pin Assignments

Pin No. Pin Name Type Description

1 VCC Supply Power supply pin.

2 OE Input

(900K: pull-up)

Output enable pin - LVCMOS/LVTTL active high input. Outputs are enabled when OE = high.

Outputs are disabled when OE = low.

3 XTAL_OUT Output Crystal oscillator output.

4 XTAL_IN Input Crystal oscillator input.

5 nc No Connect Unused, do not connect.

6 VEE Supply Negative supply pin.

7 Q Output LVCMOS output.

8 VCC Supply Power supply pin.

XTAL_out

XTAL_in

VCC

VEE

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Functional Block Diagram

Typical Performance Characteristics

Figure 1 shows a typical phase noise performance plots for a 125MHz clock output. The data was taken using the industry

standard Agilent E5052B phase noise instrument. The integration range is 1.875MHz to 20MHz.

Figure 1: 125MHz Operation, Typical Phase Noise at 3.3V

OSC PDF & LPF

VCO

Divide

by N

Divide

by M

XTAL_IN

XTAL_OUT

M/N = 5

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Application Information

Termination for LVCMOS Outputs

The termination schemes shown in Figure 2 and Figure 3

are typical for LVCMOS outputs. A split supply approach

can be used utilizing the scope’s internal 50: impedance,

as shown in Figure 4.

Figure 2: XR81101 3.3V LVCMOS Output Termination

Figure 3: XR81101 2.5V LVCMOS Output Termination

Figure 4: XR81101 Split Supply LVCMOS Output Termination

Output Signal Timing Definitions

The following diagrams clarify the common definitions of

the AC timing measurements.

Figure 5: Cycle-to-Cycle Jitter

Figure 6: Output Rise/Fall Time

100:

100 :

Z = 50:

High Impedance

scope probe

LVCMOS

Output

3.3V ± 5% 3.3V ± 5%

100:

:

Z = 50:

High Impedance

scope probe

LVCMOS

Output

2.5V ± 5% 2.5V ± 5%

:

Z = 50:

LVCMOS

Output

+Vcc/2 ± 5%

Scope

-Vcc/2 ± 5%

Vcc

Vss

80%

20%

80%

20%

LVCMOS

Output

VCC/2

Period

LVCMOS

Output

Odc = t

Period

100%

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Mechanical Dimensions

8-Pin TSSOP

Note: The side, top and landing pattern drawings are general to TSSOP packaging but the table is specific to the 8pin TSSOP.

T

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For Further Assistance:

Email: commtechsupport@exar.com

Exar Technical Documentation: http://www.exar.com/techdoc/

Exar Corporation Headquarters and Sales Offices

48720 Kato Road Tel: +1 (510) 668-7000

Fremont, CA 95438 - USA Fax: +1 (510) 668-7001

NOTICE

EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation

assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free

of patent infringement. Charts and schedules contained herein are only for illustration purposes and may vary depending upon a user’s specific application. While the information

in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies.

EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to

cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation

receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Cor-

poration is adequately protected under the circumstances.

Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.

Ordering Information

Revision History

Part Number Package Green Operating Temperature

Range

Shipping Packaging Marking

XR81101-AA02-F 8-pin TSSOP Yes -40°C to +85°C Tube T01

XR81101-AA02TR-F 8-pin TSSOP Yes -40°C to +85°C Tape & Reel T01

XR81101EVB Eval Board N/A N/A N/A N/A

Revision Date Description

1A April 2014 Initial release.

[ECN1416-07 l 04/18/2014]

Mouser Electronics

Authorized Distributor

Click to View Pricing, Inventory, Delivery & Lifecycle Information:

Exar:

XR81101-AA02-F XR81101EVB XR81101-AA02TR-F