Nine Output, 3.3V SDRAM Buffer fo r 2 DIMMs or 4 SO-DIMMs
CY2309NZ
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
October 14, 1999
Features
• One input t o nine out put buf fer/dri ver
• Supports two SDRAM DIMMs or four SO-DIMMs with
one additional output for feedback to an external or
chipset PLL
• Low power consumption for mobile applications
—Less than 25 mA at 66. 6 MHz with unloaded out puts
• 8.7-ns Input- Ou tput delay
• Buffer s all frequencies from DC to 100 MHz
• Output-output skew less than 250 ps
• Multiple VDD and VSS pins for noise and EMI reduction
• Spa ce-sav ing 16- pin 150-mi l SOIC pac kage
• 3.3V oper ati on
Functional Descri pti on
The CY2309NZ is a low-cost SDRAM buffer designed to dis-
tribute high-speed clocks in mobile PC systems and desktop
PC systems with SDRAM s upport. The part has nine out puts ,
eight of which c an be used t o drive 2 DIMMs or 4 SO-DIMMs,
and the remaining can be used f or external f eedbac k to a PLL.
The device operates at 3.3V and outputs can run up to 100
MHz, making it compatible with Pentium II® processors and
100-MHz chips ets. The CY2309 NZ can be used in conjuncti on
with the CY2281, CY2282, CY2283, CY2284 or similar clock
synthesi zers for a full Pentium II motherboard solution.
The CY2309NZ is designed for low EMI and power optimiza-
tion. It has multiple VSS and VDD pins for noise optimization
and consumes less than 25 mA at 66.6 MHz, making it ideal
for the low power requirements of mobile systems. It is avail-
able in an ultra-compact 150-m il 16-pin SOIC package.
Intel and Pentium are reg istered tr ademarks of Intel Corporat ion.
Pin Description for CY 2309NZ
Signal Pin Description
VDD 4, 8, 13 3.3V Digital Voltage Supply
GND 5, 9, 12 Ground
BUF_IN 1 Input Clock
SDRAM [1:9] 2, 3, 6, 7, 10,
11, 14, 15, 16 SDRAM Clock Outputs
Block D i ag r am
1
2
3
4
5
6
7
89
10
11
12
13
14
15
16
BUF_IN
SDRAM1
SDRAM2
VDD
GND
SDRAM3
SDRAM4
VDD
SDRAM9
SDRAM8
SDRAM7
VDD
GND
SDRAM6
SDRAM5
GND
16 SOIC
Top View
Pin Configuration
BUF_IN
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
SDRAM9
SDRAM1
CY2309NZ
2
Maximum Ratings
Supply Voltage to Ground Potential...............–0.5V to +7.0V
DC Input Voltage (Exc ept REF) ... .........–0.5V to VDD + 0.5V
DC Input Voltage REF....... ....... ...................... ..... –0.5V to 7V
Storage Temperature .................................–65°C to +1 5 0 °C
Max. Soldering Temperature (10 sec.) ....................... 260°C
Junction Temperature................................................. 150°C
Static Discharge Voltage
(per MIL- STD-883, Method 3015) .... .. ..... .. ..... .. ........>2 ,000V
Operating Conditions
Parameter Description Min. Max. Unit
VDD Supply Voltage 3.0 3.6 V
TAOper ating Temperature (Ambient Temperature) 0 70 °C
CLLoad Capacitance 30 pF
CIN Input Capacitance 7 pF
BUF_IN, SDRAM [1:9] Operating F requency DC 100 MHz
Electrical Characteristics
P arameter Descript ion Test Conditi ons Min. Max. Unit
VIL Input LOW Voltage[1] 0.8 V
VIH Input HIGH Voltage[1] 2.0 V
IIL Input LOW Current VIN = 0V 50.0 µA
IIH Input HIGH Current VIN = VDD 100.0 µA
VOL Output LO W Voltage[2] IOL = 8 mA 0. 4 V
VOH Output HIGH Voltage[2] IOH = –8 mA 2.4 V
IDD Supply Current Unloaded outputs at 66.66 MHz,
SEL inputs at VDD or GND 35 mA
Switching Characteristics [3] Over the Operating Range
Parameter Name Description Min. Typ. Max. Unit
Duty Cycle[2] = t2 ÷ t1Measured at 1.4V 40.0 50.0 60.0 %
t3Rise Time[2] Measured bet ween 0.8V and 2.0V 1.50 ns
t4Fall Time[2] Measured between 0.8V and 2.0V 1.50 ns
t5Output to Output Skew[2] All output s equally loaded 250 ps
t6Propagation Del ay,
BUF_IN Risi ng Edge to
SDRAM Rising Edge[2]
Measu red at VDD/2 1 5 8.7 ns
Notes:
1. BUF_IN input has a threshold voltage of VDD/2.
2. Parameter is guaranteed by design and characterization. Not 100% tested in production.
3. All parameters specified with loaded outputs.
CY2309NZ
3
Swi tchi n g Wavef o rms
Duty Cycl e Timing
t1
t2
1.4V 1.4V 1.4V
All Outputs Rise/ Fall Time
OUTPUT
t3
3.3V
0V
0.8V
2.0V 2.0V
0.8V
t4
Output-Outp u t Skew
1.4V
1.4V
t5
OUTPUT
OUTPUT
Input- Output Propagati on Delay
VDD/2
t6
INPUT
OUTPUT
VDD/2
CY2309NZ
© Cypress Semiconductor Corporation, 1999. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuit ry other than circuitry embodied in a Cypress Semiconduc tor product. Nor does it con vey or imply any lice nse under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
Document #: 38–00709–C
Test Circuits
Orde ring Information
Ordering Code Package Na m e Package Ty p e Operating Range
CY2309NZSC–1H S16 16-pin 150- mil SOIC Commercial
Package D i ag ra m
0.1 µF
VDD
0.1 µF
VDD
CLK out
CLOAD
OUTPUTS
GND
GND
16-Lead (150-Mil) Molded SOIC S16
51-85068-A
