Datasheet PT62SCMD17 SIC MOSFET driver R08 15 September 2014
© 2014 Prodrive Technologies B.V. 4 of 12
1.3. Protections
1.3.1. Under Voltage Lock Out (UVLO)
Both secondary sides are equipped with an UVLO indirectly monitoring the gate voltages.
Table 1-8, UVLO
Secondary side under voltage lock out
Only positive
voltage is
monitored
The primary side is equipped with an UVLO and an OVLO (Over Voltage Lock Out) monitoring an
internally generated supply voltage.
1.3.2. Dead-time generator
The driver has an on-board dead-time generator which overrules the input signals when the dead-
time of the applied PWM signals (tDEAD,IN) becomes larger than the set dead-time (tDEAD,PROG). Note
that when the dead-time generator has to intervene, the jitter increases to a maximum of 10ns.
The dead time is by default set at 500ns, but can be changed by modifying R901 and R902. See
chapter 4 for application information.
Table 1-9 Dead time settings
1.3.3. Over Current Protection (OCP)
The driver features VDS monitoring for protecting the modules against overcurrent. Both the
blanking time (time the monitor is not-active when switching on), as the VDS level (proportional with
IDS) is user-adjustable.
Table 1-10 VDS monitoring
Default VDS trip level PT62SCMD17
Delay between a detected over current
and a shutdown of the driver
Delay between an over current
protection and a low going STATUS at
the primary side.