©2002 Fairchild Semiconductor Corporation IRF9520 Rev. B
IRF9520
6A, 100V, 0.600 Ohm, P-Channel Power
MOSFET
This advanced power MOSFET is designed, tested, and
guaranteed to withstand a specified level of energy in the
breakdown avalanche mode of operation. These are
P-Channel enhancement mode silicon gate power field effect
transistors designed for applications such as switching
regulators, switching converters, motor drivers, relay drivers
and drivers for high power bipolar switching transistors
requiring high speed and low gate drive power. These types
can be operated directly from integrated circuits.
Formerly developmental type TA17501.
Features
6A, 100V
•r
DS(ON)
= 0.600
Single Pulse Avalanche Energy Rated
SOA is Power Dissipation Limited
Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance
Symbol
Packaging
JEDEC TO-220AB
Ordering Information
PART NUMBER PACKAGE BRAND
IRF9520 TO-220AB IRF9520
NOTE: When ordering, use the entire part number.
G
D
S
DRAIN (FLANGE)
GATE
SOURCE
DRAIN
Data Sheet January 2002
©2002 Fairchild Semiconductor Corporation IRF9520 Rev. B
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
IRF9520 UNITS
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DS
-100 V
Drain to Gate Voltage (R
GS
= 20k
Ω)
(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
-100 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
T
C
=100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
-6
-4
A
A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
-24 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
±
20 V
Maximum Power Dissipation (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
40 W
Linear Derating Factor (Figure 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.32 W/
o
C
Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
370 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
J,
T
STG
-55 to 150
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
300
260
o
C
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to T
J
= 125
o
C.
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV
DSS
I
D
= -250
µ
A, V
GS
= 0V (Figure 10) -100 - - V
Gate Threshold Voltage V
GS(TH)
V
GS
= V
DS
, I
D
= -250
µ
A -2 - -4 V
Zero Gate Voltage Drain Current I
DSS
V
DS
= Rated BV
DSS
, V
GS
= 0V - - -25
µ
A
V
DS
= 0.8 x Rated BV
DSS
, V
GS
= 0V
T
C
= 125
o
C
- - -250
µ
A
On-State Drain Current (Note 2) I
D(ON)
V
DS
> I
D(ON)
x r
DS(ON) MAX
, V
GS
= -10V -6 - - A
Gate to Source Leakage Current I
GSS
V
GS
=
±
20V - -
±1
00 nA
Drain to Source On Resistance (Note 2) r
DS(ON)
I
D
= -3.5A, V
GS
= -10V (Figures 8, 9) - 0.500 0.600
Forward Transconductance (Note 2) gfs V
DS
> I
D(ON)
x r
DS(ON)MAX
, I
D
= -3.5A
( Figure 12)
0.9 2 - S
Turn-On Delay Time t
d(ON)
V
DD
= 0.5 x Rated BV
DSS
, I
D
-6.0A,
R
G
= 50
, R
L
= 7.7
Ω€
for V
DSS
= 50
MOSFET Switching Times are Essentially
Independent of Operating Temperature
-2550ns
Rise Time t
r
- 50 100 ns
Turn-Off Delay Time t
d(OFF)
- 50 100 ns
Fall Time t
f
- 50 100 ns
Total Gate Charge
(Gate to Source + Gate to Drain)
Q
g(TOT)
V
GS
= -10V, I
D
= -6A, V
DS
= 0.8 x Rated BV
DSS
(Figure 14) Gate Charge is Essentially
Independent of Operating Temperature
-1622nC
Gate to Source Charge Q
gs
-9-nC
Gate to Drain “Miller” Charge Q
gd
-7-nC
Input Capacitance C
ISS
V
DS
= -25V, V
GS
= 0V, f = 1MHz
(Figure 11)
- 300 - pF
Output Capacitance C
OSS
- 200 - pF
Reverse Transfer Capacitance C
RSS
-50- pF
Internal Drain Inductance L
D
Measured From the
Contact Screw on Tab To
Center of Die
Modified MOSFET
Symbol Showing the
Internal Devices
Inductances
- 3.5 - nH
Measured From the Drain
Lead, 6mm (0.25in) from
Package to Center of Die
- 4.5 - nH
Internal Source Inductance L
S
Measured From the
Source Lead, 6mm
(0.25in) From Header to
Source Bonding Pad
- 7.5 - nH
Thermal Resistance Junction-to-Case R
θ
JC
- - 3.12
o
C/W
Thermal Resistance Junction-to-Ambient R
θ
JA
Typical Socket Mount - - 62.5
o
C/W
LS
LD
G
D
S
IRF9520
©2002 Fairchild Semiconductor Corporation IRF9520 Rev. B
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current I
SD
Modified MOSFET Sym-
bol Showing the Integral
Reverse P-N Junction
Diode
- - -6.0 A
Pulse Source to Drain Current
(Note 3)
I
SDM
- - -24 A
Source to Drain Diode Voltage
(Note 2)
V
SD
T
C
= 25
o
C, I
SD
= -6.0A, V
GS
= 0V
(Figure 13)
- - -1.5 V
Reverse Recovery Time t
rr
T
J
= 150
o
C, I
SD
= -6.0A, dI
SD
/dt = 100A/
µ
s - 230 - ns
Reverse Recovery Charge Q
RR
T
J
= 150
o
C, I
SD
= -6.0A, dI
SD
/dt = 100A/
µ
s - 1.3 -
µ
C
NOTES:
2. Pulse test: pulse width
300
µ
s, duty cycle
2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. V
DD
= 25V, starting T
J
= 25
oC, L = 15.4mH, RG = 25Ω, peak IAS = 6.0A.
Typical Performance Curves Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED TRANSIENT THERMAL IMPEDANCE
G
D
S
TA, CASE TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
0.0
0 25 50 75 100 150
0.2
0.4
0.6
0.8
1.0
1.2
125
0
50 100
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
150
25 75 125
6.0
4.8
3.6
2.4
1.2
t1, RECTANGULAR PULSE DURATION (s)
ZθJC, NORMALIZED TRANSIENT
THERMAL IMPEDANCE
10-3 10-2
1
10-5 10-4
0.01
0.1
SINGLE PULSE
PDM
10
10-1 1
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
t1
t2
0.1
0.02
0.2
0.5
0.01
0.05
IRF9520
©2002 Fairchild Semiconductor Corporation IRF9520 Rev. B
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Typical Performance Curves Unless Otherwise Specified (Continued)
VDS, DRAIN TO SOURCE VOLTAGE (V)
1
ID, DRAIN CURRENT (A)
10
0.1 101
10µs
100µs
1ms
10ms
DC
OPERATION IN THIS AREA
IS LIMITED BY rDS(ON)
100
TJ = MAX RATED
TC = 25oC
100ms
ID, DRAIN CURRENT (A)
0 -10 -20 -30 -40
-2
-4
-6
-8
-10
-50
VGS = -9V
VGS = -7V
VGS = -6V
VGS = -5V
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = -4V
PULSE DURATION = 80µs
0
VGS = -8V
VGS = -10V
DUTY CYCLE = 0.5% MAX.
0
-1
0-1 -2 -3 -5
-2
-3
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
-4
-4
-5
VGS = -7V
VGS = -10V
VGS = -9V
VGS = -4V
VGS = -5V
VGS = -6V
VGS = -8V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
-10
-8
-6
-4
-2
0
0 -2-4 -6-8-10
VGS, GATE TO SOURCE VOLTAGE (V)
ID(ON), ON-STATE DRAIN CURRENT (A)
TJ = -55oC
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
VDS ID(ON) x rDS(ON) MAX
TJ = 125oC
TJ = 25oC
ID, DRAIN CURRENT (A)
rDS(ON), DRAIN TO SOURCE
2.0
1.6
1.2
0.8
0.4
00 -5 -10 -15 -20 -25
VGS = -20V
VGS = -10V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
ON RESISTANCE ()
NORMALIZED DRAIN TO SOURCE
2.2
1.4
1.0
0.6
0.2 -40 0 40
TJ, JUNCTION TEMPERATURE (oC)
120
1.8
80
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
VGS = -10V, ID = -4A
IRF9520
©2002 Fairchild Semiconductor Corporation IRF9520 Rev. B
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Typical Performance Curves Unless Otherwise Specified (Continued)
1.25
0.95
0.85
0.75
-40 0 40
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
80 120 160
1.05
1.15
ID = 250µA
500
100
00-20 -50
C, CAPACITANCE (pF)
300
VDS, DRAIN TO SOURCE VOLTAGE (V)
400
200
CISS
COSS
CRSS
-10 -30 -40
CISS = CGS + CGD
CRSS = CGD
COSS CDS + CGD
VGS = 0V, f = 1MHz
3
2
1
00-2-4-6-8-10
TJ = -55oC
TJ = 25oC
TJ = 125oC
gfs, TRANSCONDUCTANCE (S)
ID, DRAIN CURRENT (A)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
-0.4 -1.0 -1.2 -1.6 -1.8-0.6
VSD, SOURCE TO DRAIN VOLTAGE (V)
-0.8 -1.4
-0.1
-1.0
-10
ISD, DRAIN CURRENT (A)
-100
TJ = 25oC
TJ = 150oC
0
-5
-10
0481216
VDS = -50V
VDS = -20V
Qg(TOT), TOTAL GATE CHARGE (nC)
VGS, GATE TO SOURCE (V)
ID = -6A
20
VDS = -80V
IRF9520
©2002 Fairchild Semiconductor Corporation IRF9520 Rev. B
Test Circuits and Waveforms
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
tP
0.01
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VGS
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RG
DUT
+
-
VDD
td(ON)
tr
90%
10%
VDS 90%
tf
td(OFF)
tOFF
90%
50%
50%
10%
PULSE WIDTH
VGS
tON
10%
0
0
0.3µF
12V
BATTERY 50k
+VDS
S
DUT
D
G
IG(REF)
0
(ISOLATED
-VDS
0.2µF
CURRENT
REGULATOR
ID CURRENT
SAMPLING
IG CURRENT
SAMPLING
SUPPLY)
RESISTOR RESISTOR
DUT
Qg(TOT)
Qgd
Qgs
VDS
0
VGS
VDD
0
IG(REF)
IRF9520
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
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not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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