Dual/Quad Low Power, High Speed JFET Operational Amplifiers AD8682/AD8684 APPLICATIONS Portable telecommunications Low power industrial and instrumentation Loop filters Active and precision filters Integrators Strain gauge amplifiers Portable medical instrumentation Supply current monitoring PIN CONFIGURATIONS OUT A 1 8 V+ -IN A 2 AD8682 7 OUT B +IN A 3 TOP VIEW (Not to Scale) 6 -IN B 5 +IN B V- 4 06278-001 Low supply current: 250 A/amp maximum High slew rate: 9 V/s Bandwidth: 3.5 MHz typical Low offset voltage: 1 mV maximum @ 25C Low input bias current: 20 pA maximum @ 25C CMRR: 90 dB typical Fast settling time Unity-gain stable Figure 1. 8-Lead SOIC_N and 8-Lead MSOP OUT A 1 14 OUT D -IN A 2 13 -IN D +IN A 3 12 +IN D 11 V- +IN B 5 10 +IN C -IN B 6 9 -IN C OUT B 7 8 OUT C V+ 4 AD8684 TOP VIEW (Not to Scale) 06278-002 FEATURES Figure 2. 14-Lead SOIC_N and 14-Lead TSSOP GENERAL DESCRIPTION The AD8682 and AD8684 are dual and quad low power, precision (1 mV) JFET amplifiers featuring excellent speed at low supply currents. The slew rate is typically 9 V/s with a supply current under 250 A per amplifier. These unity-gain stable amplifiers have a typical gain bandwidth of 3.5 MHz. The JFET input stage ensures bias current is typically a few picoamps and below 125 pA maximum over the full temperature operating range. The devices are ideal for portable, low power applications, especially with high source impedance. The devices are unity-gain stable and can drive higher capacity loads (G = 1, noninverting), as an example of their excellent dynamic response over a wide range of conditions, delivering dc precision performance at low quiescent currents. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2006-2008 Analog Devices, Inc. All rights reserved. AD8682/AD8684 TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................4 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................5 Pin Configurations ........................................................................... 1 Applications Information .............................................................. 10 General Description ......................................................................... 1 High-Side Signal Conditioning ................................................ 10 Revision History ............................................................................... 2 Phase Inversion ........................................................................... 10 Specifications..................................................................................... 3 Active Filters ............................................................................... 10 Electrical Characteristics ............................................................. 3 Programmable State Variable Filter ......................................... 11 Absolute Maximum Ratings............................................................ 4 Outline Dimensions ....................................................................... 12 Thermal Resistance ...................................................................... 4 Ordering Guide .......................................................................... 14 REVISION HISTORY 7/08--Rev. A to Rev. B Changes to Phase Inversion Section ............................................ 10 Deleted Figure 33 ............................................................................ 10 Added Figure 33 and Figure 34..................................................... 10 Updated Outline Dimensions ....................................................... 12 7/07--Rev. 0 to Rev. A Change to Figure 21 ......................................................................... 8 Change to Figure 31 ......................................................................... 9 10/06--Revision 0: Initial Version Rev. B | Page 2 of 16 AD8682/AD8684 SPECIFICATIONS ELECTRICAL CHARACTERISTICS VS = 15.0 V, TA = 25C, VCM = 0 V, unless otherwise noted. Table 1. Parameter INPUT CHARACTERISTICS Offset Voltage AD8682 Symbol Min VOS Typ Max Unit 0.35 1 2.5 3 3.5 4 20 125 20 100 +15 mV mV mV mV mV pA pA pA pA V dB V/mV V/mV V/C pA/C +25C TA +85C -40C TA +25C +25C TA +85C -40C TA +25C AD8684 Input Bias Current Conditions IB 6 -40C TA +85C Input Offset Current IOS -40C TA +85C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift Bias Current Drift OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Limit Open-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier Supply Voltage Range DYNAMIC PERFORMANCE Slew Rate Full-Power Bandwidth Settling Time Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density CMRR AVO -11 V VCM +15 V, -40C TA +85C RL = 10 k RL = 10 k, -40C TA +85C -11 70 20 15 VOS/T IB/T VOH VOL ISC ZOUT 90 10 8 RL = 10 k RL = 10 k Source Sink f = 1 MHz PSRR ISY VS VS = 4.5 V to 18 V, -40C TA +85C VO = 0 V, -40C TA +85C SR BWP tS GBP OM RL = 10 k 1% distortion To 0.01% en p-p en in 0.1 Hz to 10 Hz f = 1 kHz 13.5 3 92 13.9 -13.9 10 -12 200 114 210 4.5 Rev. B | Page 3 of 16 7 -13.5 -8 250 18 V V mA mA dB A V 9 125 1.6 3.5 55 V/s kHz s MHz Degrees 1.3 36 0.01 V p-p nV/Hz pA/Hz AD8682/AD8684 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Supply Voltage Input Voltage Differential Input Voltage1 Output Short-Circuit Duration Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec) 1 Rating 18 V 18 V 36 V Indefinite -65C to +150C -40C to +85C -65C to +150C 300C Table 3. Package Type 8-Lead MSOP [RM-8] 8-Lead SOIC_N [R-8] 14-Lead TSSOP [RU-14] 14-Lead SOIC_N [R-14] ESD CAUTION For supply voltages less than 18 V, the absolute maximum input voltage is equal to the supply voltage. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. B | Page 4 of 16 JA 210 158 180 120 JC 45 43 35 36 Unit C/W C/W C/W C/W AD8682/AD8684 TYPICAL PERFORMANCE CHARACTERISTICS 180 70 60 135 40 90 20 45 0 0 50 -45 -20 VS = 15V TA = 25C 60 CLOSED-LOOP GAIN (dB) VS = 15V TA = 25C PHASE (Degree) OPEN-LOOP GAIN (dB) 80 40 30 AVCL = 100 AVCL = 10 20 10 0 AVCL = 1 -10 10k 100k FREQUENCY (Hz) -90 10M 1M -30 1k 06278-003 -40 1k Figure 3. AD8682 Open-Loop Gain and Phase vs. Frequency 10k 100k FREQUENCY (Hz) 30 VS = 15V RL = 10k 40 10M Figure 6. AD8682 Closed-Loop Gain vs. Frequency 45 VS = 15V RL = 10k CL = 50pF 25 -SR 35 30 SLEW RATE (V/s) OPEN-LOOP GAIN (V/mV) 1M 06278-006 -20 25 20 15 20 15 10 +SR 10 5 -50 -25 0 25 50 75 100 125 TEMPERATURE (C) 0 -75 06278-004 0 -75 -50 25 50 75 100 125 100 125 Figure 7. Slew Rate vs. Temperature 80 1000 INPUT BIAS CURRENT (pA) VS = 15V RL = 2k 70 V = 100mV p-p IN AVCL = 1 T 60 A = 25C +OS 50 -OS 30 20 VS = 15V VCM = 0V 100 10 1 0 0 100 200 300 400 LOAD CAPACITANCE (pF) 500 0.1 -75 -50 -25 0 25 50 75 TEMPERATURE (C) Figure 5. Small Signal Overshoot vs. Load Capacitance Figure 8. AD8682 Input Bias Current vs. Temperature Rev. B | Page 5 of 16 06278-008 10 06278-005 OVERSHOOT (%) 0 TEMPERATURE (C) Figure 4. AD8682 Open-Loop Gain vs. Temperature 40 -25 06278-007 5 AD8682/AD8684 20 VS = 15V TA = 25C TA = 25C RL = 10k 15 OUTPUT VOLTAGE SWING (V) VOLTAGE NOISE DENSITY (nV/Hz) 1000 100 10 VOH 10 5 0 -5 -10 VOL 100 1k FREQUENCY (Hz) 10k -20 06278-009 1 10 0 15 20 Figure 12. Output Voltage Swing vs. Supply Voltage 1000 VS = 15V TA = 25C 100 VS = 15V TA = 25C 100 OUTPUT IMPEDANCE () INPUT BIAS CURRENT (pA) 10 SUPPLY VOLTAGE (V) Figure 9. Voltage Noise Density vs. Frequency 1000 5 06278-012 -15 10 1 AVCL = 100 10 AVCL = 10 1 -10 -5 0 5 10 15 COMMON-MODE VOLTAGE (V) 0.1 100 06278-010 0.1 -15 Figure 10. Input Bias Current vs. Common-Mode Voltage 480 100k 1M 480 TA = 25C SUPPLY CURRENT (A) 475 470 465 460 455 470 465 460 0 5 10 15 SUPPLY VOLTAGE (V) 20 450 -50 -25 0 25 50 75 100 TEMPERATURE (C) Figure 11. AD8682 Supply Current vs. Supply Voltage Figure 14. AD8682 Supply Current vs. Temperature Rev. B | Page 6 of 16 125 06278-014 455 06278-011 SUPPLY CURRENT (A) 10k FREQUENCY (Hz) Figure 13. Closed-Loop Output Impedance vs. Frequency 475 450 1k 06278-013 AVCL = 1 AD8682/AD8684 10 VOH 8 6 4 2 0 100 1k LOAD RESISTANCE () 10k 25 20 15 10 5 0 100 140 10k FREQUENCY (Hz) 100k 1M 140 VS = 15V 120 TA = 25C VS = 15V TA = 25C 120 100 100 +PSRR 80 80 CMRR (dB) 60 40 20 -PSRR 60 40 20 0 0 -20 -20 -40 -40 -60 100 -60 100 1k 10k 100k FREQUENCY (Hz) 06278-016 1M Figure 16. AD8682 PSRR vs. Frequency 14 10k 100k FREQUENCY (Hz) 20 VS = 15V TA = 25C 100 x AD8682 (200 OP AMPS) 18 16 SINK 10 1M Figure 19. AD8682 CMRR vs. Frequency VS = 15V TA = 25C 12 1k 14 12 UNITS 8 SOURCE 6 10 8 6 4 4 2 -25 0 25 50 75 100 TEMPERATURE (C) 125 06278-017 0 -50 2 0 -1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 VOS (V) 0.4 0.6 Figure 20. AD8682 VOS Distribution Figure 17. AD8682 Short-Circuit Current vs. Temperature Rev. B | Page 7 of 16 0.8 1.0 06278-020 PSRR (dB) 1k Figure 18. Maximum Output Swing vs. Frequency Figure 15. Absolute Output Voltage vs. Load Resistance SHORT-CIRCUIT CURRENT (mA) VS = 15V TA = 25C RL = 10k AVCL = 1 06278-018 MAXIMUM OUTPUT SWING (V p-p) VOL 12 06278-015 ABSOLUTE OUTPUT VOLTAGE (V) 14 30 VS = 15V TA = 25C 06278-019 16 AD8682/AD8684 1000 400 VS = 15V 300 x AD8682 (600 OP AMPS) 360 INPUT BIAS CURRENT (pA) 320 280 UNITS 240 200 160 120 80 100 10 1 0 4 8 12 16 20 24 28 32 0.1 -75 06278-021 0 36 TCVOS (V/C) -50 -25 0 25 50 75 100 125 TEMPERATURE (C) 06278-024 40 Figure 24. AD8684 Input Bias Current vs. Temperature Figure 21. AD8682 TCVOS Distribution SOIC_N Package 950 50 45 945 SUPPLY CURRENT (A) 35 30 25 20 15 10 940 935 930 925 920 915 5 -25 0 25 50 75 100 125 TEMPERATURE (C) 910 06278-022 0 -50 20 30 40 Figure 25. AD8684 Relative Supply Current vs. Supply Voltage 950 VS = 15V TA = 25C 50 10 SUPPLY VOLTAGE (V) Figure 22. AD8684 Open-Loop Gain vs. Temperature 60 0 06278-025 OPEN-LOOP GAIN (V/mV) 40 945 SUPPLY CURRENT (A) 40 30 AVCL = 10 20 10 AVCL = 1 0 935 930 925 920 1k 10k 100k 1M 10M FREQUENCY (Hz) 100M 910 -50 -25 0 25 50 75 100 TEMPERATURE (C) Figure 26. AD8684 Supply Current vs. Temperature Figure 23. AD8684 Closed-Loop Gain vs. Frequency Rev. B | Page 8 of 16 125 06278-026 -20 940 915 -10 06278-023 CLOSED-LOOP GAIN (dB) AVCL = 100 AD8682/AD8684 140 40 VS = 15V TA = 25C 100 x AD8684 (400 OP AMPS) VS = 15V 35 120 30 100 25 UNITS PSRR- 60 20 40 10 20 5 10k 100k 1M 10M FREQUENCY (Hz) 0 -1.0 06278-027 0 1k 0.2 0.4 0.6 0.8 1.0 Figure 30. AD8684 VOS Distribution Package 14 800 12 700 VS = 15V 300 x AD8684 (1200 OP AMPS) SINK 600 10 500 SOURCE 8 UNITS SHORT-CIRCUIT CURRENT (mA) 0 VOS (V) Figure 27. AD8684 PSRR vs. Frequency 6 400 300 4 200 2 100 -25 0 25 50 75 100 125 TEMPERATURE (C) 0 06278-028 0 -50 VS = 15V 120 100 80 60 40 100k 1M FREQUENCY (Hz) 10M 06278-029 20 10k 4 8 12 16 20 24 28 32 36 40 44 48 52 56 60 Figure 31. AD8684 TCVOS Distribution Package 140 0 1k 0 TCVOS (V/C) Figure 28. AD8684 Short-Circuit Current vs. Temperature CMRR (dB) -0.8 -0.6 -0.4 -0.2 06278-030 15 Figure 29. AD8684 CMRR vs. Frequency Rev. B | Page 9 of 16 06278-031 PSRR (dB) PSRR+ 80 AD8682/AD8684 APPLICATIONS INFORMATION The AD8682 and AD8684 are dual and quad JFET op amps that are optimized for high speed at low power. This combination makes these amplifiers excellent choices for battery-powered or low power applications that require above average performance. Applications benefiting from this performance combination include telecommunications, geophysical exploration, portable medical equipment, and navigational instrumentation. current when the input exceeds the supply rail. The resistor should be selected to limit the amount of input current below the absolute maximum rating. V+ VIN D2 IN5711 R1 10k D1 IN5711 HIGH-SIDE SIGNAL CONDITIONING VOLTAGE (5V/DIV) VS = 15V 0.1 RL 100k 06278-033 V- Figure 33. Phase Reversal Solution Circuit The AD8682/AD8684 are commonly used in the sensing of power supply currents and in current sensing applications, such as the partial circuit shown in Figure 32. In this circuit, the voltage drop across a low value resistor, such as the 0.1 shown here, is amplified and compared to 7.5 V. The output can then be used for current limiting. 500k VOUT D3 IN5711 There are many applications requiring the sensing of signals near the positive rail. The AD8682 and the AD8684 were tested and are guaranteed over a common-mode range (-11 V VCM +15 V) that includes the positive supply. 100k 2 VOUT 1/2 AD8682 VIN 06278-032 500k 06278-034 15V V+ V- AD8682/ AD8684 TIME (200s/DIV) Figure 34. No Phase Reversal Figure 32. High-Side Signal Conditioning PHASE INVERSION ACTIVE FILTERS Most JFET input amplifiers invert the phase of the input signal if either input exceeds the input common-mode range. For the AD8682/AD8684, a negative signal in excess of 11 V causes phase inversion. This is caused by saturation of the input stage leading to the forward-biasing of a gate-drain diode. Phase reversal in AD8682/AD8684 can be prevented by using Schottky diodes to clamp the input terminals to each other and to the supplies. In the simple buffer circuit below, D1 protects the op amp against phase reversal. R1, D2, and D3 limit the input The wide bandwidth and high slew rates of the AD8682/AD8684 make either one an excellent choice for many filter applications. There are many active filter configurations, but the four most popular configurations are: Butterworth, elliptic, Bessel, and Chebyshev. Each type has a response that is optimized for a given characteristic, as shown in Table 4. Table 4. Type Butterworth Chebyshev Elliptic Bessel (Thompson) Selectivity Moderate Good Best Poor Overshoot Good Moderate Poor Best Phase Nonlinear Amplitude (Pass Band) Maximum flat Equal ripple Equal ripple Linear Rev. B | Page 10 of 16 Amplitude (Stop Band) Equal ripple AD8682/AD8684 PROGRAMMABLE STATE VARIABLE FILTER The circuit shown in Figure 35 can be used to accurately program the Q factor; the cutoff frequency (fC); and the gain of a twopole state variable filter. The AD8684 has been used in this design because of its high bandwidth, low power, and low noise. This circuit takes only three packages to build because of the quad configuration of the op amps and DACs. The DACs shown are used in voltage mode; therefore, many values are dependent on the accuracy of the DAC only and not on the absolute values of the DAC resistive ladders. As a result, this makes the circuit unusually accurate for a programmable filter. Adjusting DAC 1 changes the signal amplitude across R1; therefore, the DAC attenuation x R1 determines the amount of signal current that charges the integrating capacitor, C1. This cutoff frequency can be expressed as fC = 1 D1 2R1C1 256 where D1 is the digital code for the DAC. DAC 3 is used to set the gain. The gain equation is Gain = R4 D3 R5 256 DAC 2 is used to set the Q of the circuit. Adjusting this DAC controls the amount of feedback from the band-pass node to the input summing node. Note that the digital value of the DAC is in the numerator; therefore, zero code is not a valid operating point. Q= R2 256 R3 D2 R7 2k R4 2k DAC 3 1/4 DAC8408 1/4 AD8684 R5 2k C1 1000pF DAC 1 1/4 AD8684 1/4 DAC8408 1/4 AD8684 R1 2k 1/4 AD8684 1/4 DAC8408 HIGH PASS R6 2k C1 1000pF DAC 4 1/4 AD8684 R1 2k 1/4 AD8684 LOW PASS BAND PASS R3 2k DAC 2 R2 2k 1/4 AD8684 1/4 AD8684 1/4 DAC8408 06278-035 VIN Figure 35. Programmable State Variable Filter Rev. B | Page 11 of 16 AD8682/AD8684 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 5 1 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 6.20 (0.2441) 5.80 (0.2284) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) COPLANARITY 0.10 SEATING PLANE 0.50 (0.0196) 0.25 (0.0099) 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 36. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.20 3.00 2.80 8 3.20 3.00 2.80 1 5 5.15 4.90 4.65 4 PIN 1 0.65 BSC 0.95 0.85 0.75 1.10 MAX 0.15 0.00 0.38 0.22 COPLANARITY 0.10 45 0.23 0.08 8 0 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 37. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Rev. B | Page 12 of 16 0.80 0.60 0.40 012407-A 8 4.00 (0.1574) 3.80 (0.1497) AD8682/AD8684 8.75 (0.3445) 8.55 (0.3366) 4.00 (0.1575) 3.80 (0.1496) 8 14 1 7 6.20 (0.2441) 5.80 (0.2283) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.50 (0.0197) 0.25 (0.0098) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 0.51 (0.0201) 0.31 (0.0122) 45 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 060606-A COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 38. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) 5.10 5.00 4.90 14 8 4.50 4.40 4.30 6.40 BSC 1 7 PIN 1 0.65 BSC 1.20 MAX 0.15 0.05 COPLANARITY 0.10 0.30 0.19 0.20 0.09 SEATING PLANE 8 0 COMPLIANT TO JEDEC STANDARDS MO-153-AB-1 Figure 39. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters Rev. B | Page 13 of 16 0.75 0.60 0.45 061908-A 1.05 1.00 0.80 AD8682/AD8684 ORDERING GUIDE Model AD8682ARZ 1 AD8682ARZ-REEL1 AD8682ARZ-REEL71 AD8682ARMZ-R21 AD8682ARMZ-REEL1 AD8684ARZ1 AD8684ARZ-REEL1 AD8684ARZ-REEL71 AD8684ARUZ1 AD8684ARUZ-REEL1 1 Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C Package Description 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead TSSOP 14-Lead TSSOP Z = RoHS Compliant Part. Rev. B | Page 14 of 16 Package Option R-8 R-8 R-8 RM-8 RM-8 R-14 R-14 R-14 RU-14 RU-14 Branding A1K A1K AD8682/AD8684 NOTES Rev. B | Page 15 of 16 AD8682/AD8684 NOTES (c)2006-2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06278-0-7/08(B) Rev. B | Page 16 of 16