1
MRF1511T1MOTOROLA RF DEVICE DATA
The RF MOSFET Line
RF Power Field Effect Transistor
N–Channel Enhancement–Mode Lateral MOSFET
The MRF1511T1 is designed for broadband commercial and industrial
applications at frequencies to 175 MHz. The high gain and broadband
performance of this device makes it ideal for large–signal, common source
amplifier applications in 7.5 volt portable FM equipment.
•Specified Performance @ 175 MHz, 7.5 Volts
Output Power — 8 Watts
Power Gain — 11.5 dB
Efficiency — 55%
•Capable of Handling 20:1 VSWR, @ 9.5 Vdc,
175 MHz, 2 dB Overdrive
•Excellent Thermal Stability
•Characterized with Series Equivalent Large–Signal
Impedance Parameters
•Broadband UHF/VHF Demonstration Amplifier Information
Available Upon Request
•RF Power Plastic Surface Mount Package
•Available in Tape and Reel.
T1 Suffix = 1,000 Units per 12 mm, 7 Inch Reel.
MAXIMUM RATINGS
Rating Symbol Value Unit
Drain–Source Voltage VDSS 40 Vdc
Gate–Source Voltage VGS ±20 Vdc
Drain Current — Continuous ID4 Adc
Total Device Dissipation @ TC = 25°C (1)
Derate above 25°CPD62.5
0.5 Watts
W/°C
Storage Temperature Range Tstg –65 to +150 °C
Operating Junction Temperature TJ150 °C
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Thermal Resistance, Junction to Case RθJC 2°C/W
(1) Calculated based on the formula PD =
NOTE – CAUTION – MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.
Order this document
by MRF1511/D
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MRF1511T1
175 MHz, 8 W, 7.5 V
LATERAL N–CHANNEL
BROADBAND
RF POWER MOSFET
CASE 466–02, STYLE 1
(PLD–1.5)
PLASTIC
Motorola, Inc. 2000
G
D
S
TJ–TC
RθJC
REV 1
MRF1511T1
2MOTOROLA RF DEVICE DATA
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
(VDS = 35 Vdc, VGS = 0) IDSS — — 1 µAdc
Gate–Source Leakage Current
(VGS = 10 Vdc, VDS = 0) IGSS — — 1 µAdc
ON CHARACTERISTICS
Gate Threshold Voltage
(VDS = 7.5 Vdc, ID = 170 µA) VGS(th) 1.0 1.6 2.1 Vdc
Drain–Source On–V oltage
(VGS = 10 Vdc, ID = 1 Adc) VDS(on) — 0.4 — Vdc
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 7.5 Vdc, VGS = 0, f = 1 MHz) Ciss — 100 — pF
Output Capacitance
(VDS = 7.5 Vdc, VGS = 0, f = 1 MHz) Coss — 53 — pF
Reverse T ransfer Capacitance
(VDS = 7.5 Vdc, VGS = 0, f = 1 MHz) Crss — 8 — pF
FUNCTIONAL TESTS (In Motorola Test Fixture)
Common–Source Amplifier Power Gain
(VDD = 7.5 Vdc, Pout = 8 W atts, I DQ = 150 mA, f = 175 MHz) Gps 10 11.5 — dB
Drain Efficiency
(VDD = 7.5 Vdc, Pout = 8 W atts, I DQ = 150 mA, f = 175 MHz) η50 55 — %
3
MRF1511T1MOTOROLA RF DEVICE DATA
Figure 1. 135 – 175 MHz Broadband Test Circuit
VDD
C6 R4
C7
C5
R3
RF
INPUT
RF
OUTPUT
Z2 Z3
Z6
C1 C3
C14
DUT
Z7 Z9 Z10
Z4 Z5
L4
Z8 N2
C18 B2
N1
+
C11
B1, B2 Short Ferrite Bead, Fair Rite Products
(2743021446)
C1, C5, C18 120 pF, 100 mil Chip Capacitor
C2, C10, C12 0 to 20 pF, Trimmer Capacitor
C3 33 pF, 100 mil Chip Capacitor
C4 68 pF, 100 mil Chip Capacitor
C6, C15 10 µF, 50 V Electrolytic Capacitor
C7, C16 1,200 pF, 100 mil Chip Capacitor
C8, C17 0.1 µF, 100 mil Chip Capacitor
C9 150 pF, 100 mil Chip Capacitor
C11 43 pF, 100 mil Chip Capacitor
C13 24 pF, 100 mil Chip Capacitor
C14 300 pF, 100 mil Chip Capacitor
L1, L3 12.5 nH, A04T, Coilcraft
L2 26 nH, 4 T urn, Coilcraft
L4 55.5 nH, 5 T urn, Coilcraft
N1, N2 Type N Flange Mount
R1 15 Ω, 0805 Chip Resistor
R2 1.0 kΩ, 1/8 W Resistor
R3 1.0 kΩ, 0805 Chip Resistor
R4 33 kΩ, 1/8 W Resistor
Z1 0.200″ x 0.080″ Microstrip
Z2 0.755″ x 0.080″ Microstrip
Z3 0.300″ x 0.080″ Microstrip
Z4 0.065″ x 0.080″ Microstrip
Z5, Z6 0.260″ x 0.223″ Microstrip
Z7 0.095″ x 0.080″ Microstrip
Z8 0.418″ x 0.080″ Microstrip
Z9 1.057″ x 0.080″ Microstrip
Z10 0.120″ x 0.080″ Microstrip
Board Glass Teflon, 31 mils, 2 oz. Copper
Z1
C2
R1
C4
VGG C15
+
C8 B1
R2
C16C17
C9 C10 C13C12
L3
L2L1
TYPICAL CHARACTERISTICS, 135 – 175 MHz
175 MHz
155 MHz 135 MHz
Pout, OUTPUT POWER (WATTS)
IRL, INPUT RETURN LOSS (dB)
–5
–15
–20
–10
2145
Figure 2. Output Power versus Input Power
Pin, INPUT POWER (W ATTS)
2
Figure 3. Input Return Loss
versus Output Power
0.3
Pout, OUTPUT POWER (WATTS)
0
8
0.50.1
4
0.4 0.70.2
0
10
30.6
6
VDD = 7.5 V
769108
175 MHz
155 MHz
135 MHz
VDD = 7.5 V
–25
MRF1511T1
4MOTOROLA RF DEVICE DATA
TYPICAL CHARACTERISTICS, 135 – 175 MHz
2Pout, OUTPUT POWER (WATTS)
50
0
70
010
Eff, DRAIN EFFICIENCY (%)
30
60
40
31
Eff, DRAIN EFFICIENCY (%)
Figure 4. Gain versus Output Power
Pout, OUTPUT POWER (WATTS)
8
6
14
Figure 5. Drain Efficiency versus Output Power
2
GAIN (dB)
5
Figure 6. Output Power versus Biasing Current
12
IDQ, BIASING CURRENT (mA)
4
Figure 7. Drain Efficiency versus
Biasing Current
80
IDQ, BIASING CURRENT (mA)
Figure 8. Output Power versus Supply Voltage
4VDD, SUPPLY VOLT AGE (VOLTS)
2
Figure 9. Drain Efficiency versus Supply Voltage
VDD, SUPPLY VOLT AGE (VOLTS)
30 14
84
0
40
60
70
40 4000
8
14
600 1000
80
5
6
10
10
16
200
50
4
12
Pout, OUTPUT POWER (WATTS)
200 1000400 600
Pout, OUTPUT POWER (WATTS)
6141612 612816
31
60
4
6
10
12
Eff, DRAIN EFFICIENCY (%)
50
70
475869
20
10
175 MHz
155 MHz
135 MHz
VDD = 7.5 V
175 MHz
155 MHz
135 MHz
VDD = 7.5 V
710986
800
7
8
9
11
175 MHz
155 MHz
135 MHz
VDD = 7.5 V
Pin = 27 dBm
800
175 MHz
155 MHz
135 MHz
VDD = 7.5 V
Pin = 27 dBm
10
175 MHz
155 MHz
135 MHz
IDQ = 150 mA
Pin = 27 dBm
10
175 MHz
155 MHz
135 MHz
IDQ = 150 mA
Pin = 27 dBm
5
MRF1511T1MOTOROLA RF DEVICE DATA
Figure 10. 66 – 88 MHz Broadband Test Circuit
VDD
C6 R4
C7
C5
R3
RF
INPUT
RF
OUTPUT
Z2 Z3
Z6
C1 C3
C12
DUT
Z7 Z9 Z10
Z4 Z5
L4
Z8 N2
C16 B2
N1
+
C9
Z1
C2
R1
C4
VGG C13
+
C8 B1
R2
C14C15
C11C10
L3
L1
B1, B2 Short Ferrite Bead, Fair Rite Products
(2743021446)
C1, C12 330 pF, 100 mil Chip Capacitor
C2 43 pF, 100 mil Chip Capacitor
C3, C10 0 to 20 pF, Trimmer Capacitor
C4 24 pF, 100 mil Chip Capacitor
C5, C16 120 pF, 100 mil Chip Capacitor
C6, C13 10 µF, 50 V Electrolytic Capacitor
C7, C14 1,200 pF, 100 mil Chip Capacitor
C8, C15 0.1 µF, 100 mil Chip Capacitor
C9 380 pF, 100 mil Chip Capacitor
C11 75 pF, 100 mil Chip Capacitor
L1 82 nH, Coilcraft
L2 55.5 nH, 5 T urn, Coilcraft
L3 39 nH, 6 T urn, Coilcraft
N1, N2 Type N Flange Mount
R1 15 Ω, 0805 Chip Resistor
R2 51 Ω, 1/2 W Resistor
R3 100 Ω, 0805 Chip Resistor
R4 33 kΩ, 1/8 W Resistor
Z1 0.136″ x 0.080″ Microstrip
Z2 0.242″ x 0.080″ Microstrip
Z3 1.032″ x 0.080″ Microstrip
Z4 0.145″ x 0.080″ Microstrip
Z5, Z6 0.260″ x 0.223″ Microstrip
Z7 0.134″ x 0.080″ Microstrip
Z8 0.490″ x 0.080″ Microstrip
Z9 0.872″ x 0.080″ Microstrip
Z10 0.206″ x 0.080″ Microstrip
Board Glass Teflon, 31 mils, 2 oz. Copper
TYPICAL CHARACTERISTICS, 66 – 88 MHz
Pout, OUTPUT POWER (WATTS)
IRL, INPUT RETURN LOSS (dB)
–18
–20
–10
21
0
45
Figure 11. Output Power versus Input Power
Pin, INPUT POWER (W ATTS)
2
Figure 12. Input Return Loss
versus Output Power
0.3
Pout, OUTPUT POWER (WATTS)
0
6
0.50.1
4
0.4 0.70.2
0
10
30.6
866 MHz
77 MHz
88 MHz
VDD = 7.5 V
769108
–14
–16
–12
–2
–6
–8
–4
66 MHz
77 MHz
88 MHz
VDD = 7.5 V
MRF1511T1
6MOTOROLA RF DEVICE DATA
TYPICAL CHARACTERISTICS, 66 – 88 MHz
5
Pout, OUTPUT POWER (WATTS)
50
0
70
14
Eff, DRAIN EFFICIENCY (%)
30
60
40
32
Eff, DRAIN EFFICIENCY (%)
Figure 13. Gain versus Output Power
Pout, OUTPUT POWER (WATTS)
8
10
16
Figure 14. Drain Efficiency versus
Output Power
2
GAIN (dB)
1
Figure 15. Output Power versus
Biasing Current
12
IDQ, BIASING CURRENT (mA)
4
Figure 16. Drain Efficiency versus
Biasing Current
80
IDQ, BIASING CURRENT (mA)
Figure 17. Output Power versus
Supply Voltage
5VDD, SUPPLY VOLT AGE (VOLTS)
2
Figure 18. Drain Efficiency versus
Supply Voltage
VDD, SUPPLY VOLT AGE (VOLTS) 9
85
0
40
60
60
40 4000
8
14
600 1000
80
6
8
10
12
18
200
50
4
14
Pout, OUTPUT POWER (WATTS)
200 1000400 600
Pout, OUTPUT POWER (WATTS)
69107678 10
35
4
6
10
12
Eff, DRAIN EFFICIENCY (%)
50
70
30
IDQ = 150 mA
Pin = 25.7 dBm
769810
66 MHz 77 MHz
88 MHz
20
10
106987
66 MHz
77 MHz
88 MHz
800
5
11
7
9
66 MHz
77 MHz
88 MHz
VDD = 7.5 V
Pin = 25.7 dBm
VDD = 7.5 V VDD = 7.5 V
800
70
66 MHz 77 MHz
88 MHz
VDD = 7.5 V
Pin = 25.7 dBm
66 MHz
77 MHz
88 MHz
66 MHz 77 MHz
88 MHz
IDQ = 150 mA
Pin = 25.7 dBm
7
MRF1511T1MOTOROLA RF DEVICE DATA
Note: ZOL* was chosen based on tradeoffs between gain, drain efficiency , and device stability.
Figure 19. Series Equivalent Input and Output Impedance
Zo = 10 Ω
Zin = Complex conjugate of source
impedance with parallel 15 Ω
resistor and 24 pF capacitor in
series with gate. (See Figure 10).
ZOL* = Complex conjugate of the load
impedance at given output power,
voltage, frequency, and ηD > 50 %.
f
MHz Zin
ΩZOL*
Ω
135 20.1 –j0.5 2.53 –j2.61
Zin = Complex conjugate of source
impedance with parallel 15 Ω
resistor and 68 pF capacitor in
series with gate. (See Figure 1).
ZOL* = Complex conjugate of the load
impedance at given output power,
voltage, frequency, and ηD > 50 %.
VDD = 7.5 V, IDQ = 150 mA, Pout = 8 W
155 17.0 +j3.6 3.01 –j2.48
175 15.2 +j7.9 2.52 –j3.02
f
MHz Zin
ΩZOL*
Ω
66 25.3 –j0.31 3.62 –j0.751
VDD = 7.5 V, IDQ = 150 mA, Pout = 8 W
77 25.6 +j3.62 3.59 –j0.129
88 26.7 +j6.79 3.37 –j0.173
ZOL*
Zin
135
155
f = 175 MHz
135
155
f = 175 MHz
66
77
Zinf = 88 MHz
66
77
f = 88 MHz
ZOL*
Zin ZOL*
Input
Matching
Network
Device
Under Test Output
Matching
Network
MRF1511T1
8MOTOROLA RF DEVICE DATA
Table 1. Common Source Scattering Parameters (VDD = 7.5 Vdc)
IDQ = 150 mA
f
S11 S21 S12 S22
f
MHz |S11|φ|S21|φ|S12|φ|S22|φ
30 0.88 –165 18.92 95 0.015 8 0.84 –169
50 0.88 –171 11.47 91 0.016 –5 0.84 –173
100 0.87 –175 5.66 85 0.016 –7 0.84 –176
150 0.87 –176 3.75 82 0.015 –5 0.85 –176
200 0.87 –177 2.78 78 0.014 –6 0.84 –176
250 0.87 –177 2.16 75 0.014 –10 0.85 –176
300 0.88 –177 1.77 72 0.012 –17 0.86 –176
350 0.88 –177 1.49 69 0.013 –11 0.86 –176
400 0.88 –177 1.26 66 0.013 –17 0.87 –175
450 0.88 –177 1.08 64 0.011 –20 0.87 –175
500 0.89 –176 0.96 63 0.012 –20 0.88 –175
IDQ = 800 mA
f
S11 S21 S12 S22
f
MHz |S11|φ|S21|φ|S12|φ|S22|φ
30 0.89 –166 18.89 95 0.014 10 0.85 –170
50 0.88 –172 11.44 91 0.015 8 0.84 –174
100 0.87 –175 5.65 86 0.016 –2 0.85 –176
150 0.87 –177 3.74 82 0.014 –8 0.84 –177
200 0.87 –177 2.78 78 0.013 –18 0.85 –177
250 0.88 –177 2.16 75 0.012 –11 0.85 –176
300 0.88 –177 1.77 73 0.015 –15 0.86 –176
350 0.88 –177 1.50 70 0.009 –7 0.87 –176
400 0.88 –177 1.26 67 0.012 –3 0.87 –176
450 0.88 –177 1.09 65 0.012 –18 0.87 –175
500 0.89 –177 0.97 64 0.009 –10 0.88 –175
IDQ = 1.5 A
f
S11 S21 S12 S22
f
MHz |S11|φ|S21|φ|S12|φ|S22|φ
30 0.90 –168 17.89 95 0.013 2 0.86 –172
50 0.89 –173 10.76 91 0.013 3 0.86 –175
100 0.88 –176 5.32 86 0.014 –19 0.86 –177
150 0.88 –177 3.53 83 0.013 –6 0.86 –177
200 0.88 –177 2.63 80 0.011 –4 0.86 –177
250 0.88 –178 2.05 77 0.012 –14 0.86 –177
300 0.88 –177 1.69 75 0.013 –2 0.87 –177
350 0.89 –177 1.43 72 0.010 –9 0.87 –176
400 0.89 –177 1.22 70 0.014 –3 0.88 –176
450 0.89 –177 1.06 68 0.011 –8 0.88 –176
500 0.89 –177 0.94 67 0.011 –15 0.88 –176
9
MRF1511T1MOTOROLA RF DEVICE DATA
APPLICATIONS INFORMATION
DESIGN CONSIDERATIONS
This device is a common–source, RF power, N–Channel
enhancement mode, Lateral Metal–Oxide Semiconductor
Field–Effect T ransistor (MOSFET). Motorola Application Note
AN21 1A, “FETs in Theory and Practice”, is suggested reading
for those not familiar with the construction and characteristics
of FETs.
This surface mount packaged device was designed primari-
ly for VHF and UHF portable power amplifier applications.
Manufacturability is improved by utilizing the tape and reel
capability for fully automated pick and placement of parts.
However, care should be taken in the design process to insure
proper heat sinking of the device.
The major advantages of Lateral RF power MOSFETs
include high gain, simple bias systems, relative immunity from
thermal runaway, and the ability to withstand severely
mismatched loads without suffering damage.
MOSFET CAPACITANCES
The physical structure of a MOSFET results in capacitors
between all three terminals. The metal oxide gate structure
determines the capacitors from gate–to–drain (Cgd), and
gate–to–source (Cgs). The PN junction formed during fabrica-
tion of the RF MOSFET results in a junction capacitance from
drain–to–source (Cds). These capacitances are characterized
as input (Ciss), output (Coss) and reverse transfer (Crss)
capacitances on data sheets. The relationships between the
inter–terminal capacitances and those given on data sheets
are shown below. The Ciss can be specified in two ways:
1. Drain shorted to source and positive voltage at the gate.
2. Positive voltage of the drain in respect to source and
zero volts at the gate.
In the latter case, the numbers are lower . However, neither
method represents the actual operating conditions in RF
applications.
Drain
Cds
Source
Gate
Cgd
Cgs
Ciss = Cgd + Cgs
Coss = Cgd + Cds
Crss = Cgd
DRAIN CHARACTERISTICS
One critical figure of merit for a FET is its static resistance
in the full–on condition. This on–resistance, RDS(on), occurs in
the linear region of the output characteristic and is specified
at a specific gate–source voltage and drain current. The
drain–source voltage under these conditions is termed
VDS(on). For MOSFETs, VDS(on) has a positive temperature
coefficient at high temperatures because it contributes to the
power dissipation within the device.
BVDSS values for this device are higher than normally
required for typical applications. Measurement of BVDSS is not
recommended and may result in possible damage to the
device.
GATE CHARACTERISTICS
The gate of the RF MOSFET is a polysilicon material, and
is electrically isolated from the source by a layer of oxide. The
DC input resistance is very high – on the order of 109 Ω —
resulting in a leakage current of a few nanoamperes.
Gate control is achieved by applying a positive voltage to
the gate greater than the gate–to–source threshold voltage,
VGS(th).
Gate Voltage Rating — Never exceed the gate voltage
rating. Exceeding the rated VGS can result in permanent
damage to the oxide layer in the gate region.
Gate Termination — The gates of these devices are
essentially capacitors. Circuits that leave the gate open–cir-
cuited or floating should be avoided. These conditions can
result in turn–on of the devices due to voltage build–up on the
input capacitor due to leakage currents or pickup.
Gate Protection — These devices do not have an internal
monolithic zener diode from gate–to–source. If gate protec-
tion is required, an external zener diode is recommended.
Using a resistor to keep the gate–to–source impedance low
also helps dampen transients and serves another important
function. V oltage transients on the drain can be coupled to the
gate through the parasitic gate–drain capacitance. If the
gate–to–source impedance and the rate of voltage change on
the drain are both high, then the signal coupled to the gate may
be large enough to exceed the gate–threshold voltage and
turn the device on.
DC BIAS
Since this device is an enhancement mode FET, drain
current flows only when the gate is at a higher potential than
the source. RF power FET s operate optimally with a quiescent
drain current (IDQ), whose value is application dependent.
This device was characterized at IDQ = 150 mA, which is the
suggested value of bias current for typical applications. For
special applications such as linear amplification, IDQ may have
to be selected to optimize the critical parameters.
The gate is a dc open circuit and draws no current.
Therefore, the gate bias circuit may generally be just a simple
resistive divider network. Some special applications may
require a more elaborate bias system.
GAIN CONTROL
Power output of this device may be controlled to some
degree with a low power dc control signal applied to the gate,
thus facilitating applications such as manual gain control,
ALC/AGC and modulation systems. This characteristic is very
dependent on frequency and load line.
MRF1511T1
10 MOTOROLA RF DEVICE DATA
MOUNTING
The specified maximum thermal resistance of 2°C/W
assumes a majority of the 0.065″ x 0.180″ source contact on
the back side of the package is in good contact with an
appropriate heat sink. As with all RF power devices, the goal
of the thermal design should be to minimize the temperature
at the back side of the package. Refer to Motorola
Application Note AN4005/D, “Thermal Management and
Mounting Method for the PLD–1.5 RF Power Surface Mount
Package,” and Engineering Bulletin EB209/D, “Mounting
Method for RF Power Leadless Surface Mount T ransistor” for
additional information.
AMPLIFIER DESIGN
Impedance matching networks similar to those used with
bipolar transistors are suitable for this device. For examples
see Motorola Application Note AN721, “Impedance Matching
Networks Applied to RF Power Transistors.” Large–signal
impedances are provided, and will yield a good first pass
approximation.
Since RF power MOSFETs are triode devices, they are not
unilateral. This coupled with the very high gain of this device
yields a device capable of self oscillation. Stability may be
achieved by techniques such as drain loading, input shunt
resistive loading, or output to input feedback. The RF test
fixture implements a parallel resistor and capacitor in series
with the gate, and has a load line selected for a higher
efficiency, lower gain, and more stable operating region.
T wo–port stability analysis with this device’s S–parameters
provides a useful tool for selection of loading or feedback
circuitry to assure stable operation. See Motorola Application
Note AN215A, “RF Small–Signal Design Using Two–Port
Parameters” for a discussion of two port network theory and
stability.
11
MRF1511T1MOTOROLA RF DEVICE DATA
NOTES
MRF1511T1
12 MOTOROLA RF DEVICE DATA
PACKAGE DIMENSIONS
CASE 466–02
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH
3. RESIN BLEED/FLASH ALLOWABLE IN ZONE V, W,
AND X.
_
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.255 0.265 6.48 6.73
B0.225 0.235 5.72 5.97
C0.065 0.072 1.65 1.83
D0.130 0.150 3.30 3.81
E0.021 0.026 0.53 0.66
F0.026 0.044 0.66 1.12
G0.050 0.070 1.27 1.78
H0.045 0.063 1.14 1.60
K0.273 0.285 6.93 7.24
L0.245 0.255 6.22 6.48
N0.230 0.240 5.84 6.10
P0.000 0.008 0.00 0.20
Q0.055 0.063 1.40 1.60
R0.200 0.210 5.08 5.33
S0.006 0.012 0.15 0.31
U0.006 0.012 0.15 0.31
ZONE V 0.000 0.021 0.00 0.53
ZONE W 0.000 0.010 0.00 0.25
ZONE X 0.000 0.010 0.00 0.25
STYLE 1:
PIN 1. DRAIN
2. GATE
3. SOURCE
4. SOURCE
2
34
1
AF
R
L
NK
D
B
Q
E
PC
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
G
H
ZONE X
ZONE W
0.89 (0.035) X 45 5
"
_
_
10 DRAFT
ZONE V
S
U
ÉÉÉ
ÉÉÉ
RESIN BLEED/FLASH ALLOWABLE
J0.160 0.180 4.06 4.57
J
0.115
2.92
0.020
0.51
0.115
2.92
mm
inches
0.095
2.41
0.146
3.71
SOLDER FOOTPRINT
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Af firmative Action Employer .
Mfax is a trademark of Motorola, Inc.
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; JAPAN: Motorola Japan Ltd.; SPS, Tec hnical In formation Center, 3–20–1,
P.O. Box 5405, Denver, Colorado 80217. 1–303–675–2140 or 1–800–441–2447 Minami–Azabu. Minato–ku, Tokyo 106–8573 Japan. 81–3–3440–3569
Customer Focus Center: 1–800–521–6274
Mfax: RMFAX0@email.sps.mot.com – TOUCHTONE 1–602–244–6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre,
Motorola Fax Back System – US & Canada ONLY 1–800–774–1848 2, Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong.
– http://sps.motorola.com/mfax/ 852–26668334
HOME PAGE: http://www .motorola.com/semiconductors/
◊MRF1511/D
