Technical Data CD54/74HC14 CD54/74HCT14 High-Speed CMOS Logic oY ay Type Features: ay 3a ad 1. a er DND*? Veg 114 FUNCTIONAL DIAGRAM AND TERMINAL ASSIGNMENT The RCA-CD54/74HC14 and CD54/74HCT 14 each contain 6 inverting Schmitt Triggers in one package. The CD54HC14 and CD54HCT14 are supplied in 14-lead ceramic dual-in-line packages (F suffix). The CD74HC14 and CD74HCT14 are supplied in 14-iead dual-in-line plas- tic packages (E suffix} and in 14-lead dual-in-line surface mount plastic packages (M suffix). Both devices are also available in chip form (H suffix). rao >oo 0m" LOGIC DIAGRAM Vo YH GND Voc - Vo GND 92CS-39828 Fig 1 - Hysteresis definition, characteristic, and test setup. 76 File Number 1781 Hex Inverting Schmitt Trigger g@ Unlimited input rise and fall times m Exceptionally high noise immunity Family Features: m Fanout (Over Temperature Range): Standard Outputs - 10 LSTTL Loads Bus Driver Outputs - 15 LSTTL Loads Wide Operating Temperature Range: CD74HC/HCT: -40 to +85C Balanced Propagation Delay and Transition Times Significant Power Reduction Compared to LSTTL Logic iCs Alternate Source is Philtps/Signetics CD54HC/CD74HC Types: 2 to 6 V Operation High Noise Immunity: Nic = 37%, Nw = 51% of Veco @ Vec = 5V CD54HCT/CD74HCT Types: 4.5 to .5 V Operation Direct LSTTL Input Logic Compatibihty Nia = 18%, Nw = 67% of Vec @ Voc = 4.5V CMOS /nput Compatibility i s 1 pA (@ Vor, Vou TRUTH TABLE INPUT | OUTPUT A Y L H H L H = High Level L = Low Level~ Technical Data CD54/74HC14 CD54/74HCT14 MAXIMUM RATINGS, Absolute-Maximum Values: DC SUPPLY-VOLTAGE, (Vec): (Voltages referenced to ground) ...--.--. 1-5 sere cette rt tees beeen eee eee ene n nent en Feet eee ee OS5to+7V DC INPUT DIODE CURRENT, Ix (FOR V, < -0 5 V OR V, > Vee FOV) coc c cece ce nee enn eee nent n ee Fe rere +20mA DC OUTPUT DIODE CURRENT, lox (FOR Vo < -0.5 V OR Vo > Vec FOV) cence cee eee ene teen nee etree +20mA DC DRAIN CURRENT, PER OUTPUT (I.) (FOR -0 5 V < Vo < Vee + 0S) 09 a +25mA DC Veg OR GROUND CURRENT (Icc) --.-- 022 ee renee ne eer nee eee eee eee ET +50mA POWER DISSIPATION PER PACKAGE (Pp) For Ta = -40 to +60C (PACKAGE TYPE E) ...... 2... 00ee eee rene erence ree terete eeeege seers geese eee e ness ssa 500 mw For Ta = +60 to +85C (PACKAGE TYPE E) .......0 ee eee eee erect ete etree nent ncn steers Derate Linearly at 8 mW/C to 300 mW For Ta = -55 to +100C (PACKAGE TYPE FLH) .... 202s e cree errr teeter tree ener rn sere er rec er sees sees 500 mW For Ta = +100 to +125C (PACKAGE TYPE F,H) ..-. 6-0-0 eee cece eter tnt n tenner cnc Derate Linearly at 8 mW/C to 300 mW For T, = -40 to +70C (PACKAGE TYPE M) ... 0. eee eee teeter reer t seen nen n nner ener sess geen ese e ee ea 400 mW For Ta = +70 to +125C (PACKAGE TYPE M) ....-- 00 eee eee reece rete eeene ncn serene Derate Linearly at 6 mw/C to 70 mW OPERATING-TEMPERATURE RANGE (Ta). PACKAGE TYPE Fo H oo cece ccc cee EEE EEE EE EERE EE EEE EERE EEE ETT EEE E ET EES TTS -55 to +125C PACKAGE TYPE E, Mi o.oo c ccc EEE EERE EE EEE EEE EEE TESTE E EEE EET EES EET EEE TTS . 7-40 to +85C STORAGE TEMPERATURE (Taig) oo 0-0 cet EEE EEE EEE EE EEE EEE TEESE EES TEES Te -65 to +150C LEAD TEMPERATURE (DURING SOLDERING) At distance 1/16 + 1/32 in. (159 + 079 mm) from case for 10S Max ..-. 1... eee eee teeter c eter e tse ttt tse e senses +265C Unit inserted into a PC Board (min thickness 1/16 1n., 159 mm) with solder contacting lead tips only 0.00... eee ee teeter te secre serene ee eee ee eee eee eee +300C RECOMMENDED OPERATING CONDITIONS: For maximum reliability, nominal operating conditions should be selected so that operation is always within the following ranges: LIMITS CHARACTERISTIC MIN. MAX. UNITS Supply-Voltage Range (For Ta = Full Package-Temperature Range) Vcc." CD54/74HC Types 2 6 Vv CD54/74HCT Types 45 55 Vv DC input or Output Voltage Vi, Vo 0 Veco Vv Operating Temperature T, CD74 Types ~-40 +85 C CD54 Types -55 +125 C Input Rise and Fall Times t,, ty at2V 0 Unlimited ns at4a.5Vv 0 Unlimited: ns at6V ) Unlimited | ns Unless otherwise specified, all voltages are referenced to GroundTechnical Data CD54/74HC14 CD54/74HCT14 STATIC ELECTRICAL CHARACTERISTICS CD74HC14/CO54HC14 CD74HCT14/CO54HCT14 TEST T4HC/SaHC 74HC 54HC TEST T4HCT/S4HCT T4HCT 54HCT CONDITIONS TYPES TYPE TYPE CONDITIONS TYPES TYPE TYPE CHARACTERISTIC UNITS -40/ -55/ -40/ -55/ +25 +25C vb lve | oS 485C +125C ve | Vee +B5C +125C v mA Vv v v Min | Max | Min | Max | Min | Max Min | Max | Min | Max | Min | Max Input Switch 2 07 16 07 15 07 15 = _ _ _ _ Points Vit 45 17 315 1.7 3.15 17 315 45 12 19 1.2 19 12 49 v 6 24 42 21 42 21 42 55 14 21 14 21 14 2.4 2 0.3 1 0.3 1 0.3 i - _ - - ~ _ Vie 45 09 22 09 22 og 2.2 45 05 12 05 12 05 12 Vv 6 12 3 1.2 3 1.2 3 5 O6 14 06 14 o6 14 2 0.2 4 o2 1 0.2 1 - _ _ - _ - Vu 45 04 14 04 14 a4 1.4 4 0.4 14 04 14 04 14 Vv 6 06 16 0.6 16 0.6 1.6 5 0.4 15 04 18 04 15 High-Level Output Vi- 2 19 - 19 _ 19 _ Vi- _ _ ~_ _ _ Voltage Von | or |-002/ 45 | 44 | 44 _ 44 or 45 | 44 44 ~ 44 _ Vv CMOS Loads V;+ 6 59 _ 59 od 9 Vit _ _ ~ Vie ~f=-}f-4f-}ryr fr Vie ~}-fy-],-}-] - TTL Loads or 4 45 3.98 _- 3 84 _- 37 _ or 45 398 _ 3 84 _ 37 _ Vv Vit | -$2 6 548 _ 5 34 _ 52 _ Vit _ _ _ Low-Level Output Vi- 2 _ 01 _ 01 _ 01 Vee _ _ _ Valtage Vi. or 002 45 _ 01 _ 01 _ 01 or 45 _ 01 _ o1 _ 01 Vv CMOS Loads Vit 6 _ 01 - o1 -_ 01 Vy =- _ _ _ Vie _ _ - - _- _ Vi- - - ~ _ _ _ TTL Loads or 4 45 ad 026 _ 033 - 04 or 45 _ 026 - 033 _ o4 Vv Vit 52 6 _ 026 033 _ o4 Vit _ _ _ _ input Leakage Voc Any Valtage Current 1 | or 6 +01 +1 _- 41 Between | 55 - +01 _ +1 _ +1 LA Gnd Vee and Gnd Quiescent Vee Vee Device or 0 6 _ 2 _ 20 _ 40 or 55 -- 2 _ 20 _ 40 pA Current lee | GN Gnd Additional 45 |Min |Typ |Max Quiescent Device Current Vec-2 1 to | |100 {360 |; 450 _ 490 pA per input pin Tunttload Alec 55 For dual-supply systems theoretical worst case (V,= 24. Voc = 55 V) specification 1s 1B8MA HCT INPUT LOADING TABLE INPUT UNIT LOADS nA 0.6 78 Unit load 1s Alec limit specified in Static Characteristic Chart, e g., 360 wA max @ 25C.Technical Data CD54/74HC14 CD54/74HCT14 SWITCHING CHARACTERISTICS (Vcc = 5 V, Ta = 25C, Input t,, t= 6 ms) CHARACTERISTIC CL TYPICAL (pF) He Hct | UNITS Propagation Delay, { AtoyY ton stewn 5 "1 16 ns Power Dissipation Capacitance* Cpp _ 20 20 pF "Cep is used to determine the dynamic power consumption, per inverter. Pp Vecf, (Cpp + C,) where: f,= input frequency C, = output load capacitance Vec = supply voltage SWITCHING CHARACTERISTICS (C, = 50 pF, input t,, ti = 6 ns) 25C -40C to +85C -55C to +125C CHARACTERISTIC Vec HC HCT 74HC T4HCT 54HC 54HCT | UNITS Min. |Max. | Min. |Max.| Min. |Max. | Min. |Max. | Min. |Max. Min. |Max. Propagation Delay, teLH 2 11a5/ | j) |170!} | | | 205/) | AtoY teHL 45} | 27 | | 38| | 34} }; 48} 141 4 - 57 ns 6 ~loa3f///]]]}2a}-};-]1-)] 35 |} | a Output triy 2 i735; i-}];95 |-}]-t |W} fm Transition Time tro 45;/|/i15}]18 | }194} | 94) 22) | 22 ns 6 ~/i3/)/-/]]6ef-}]},} 19 |- j= Input or ~|/j}}}1%0)}}10] {10 | | 10} | 10 | PF Capacitance INPUT LEVEL OUTPUT = Vg teu 54/74HC | 54/74HCT INPUT LEVEL Vec 3v Vo 50% Veco (av 92CE- 36948RI Fig. 2 - Transition times and propagation delay times. 79