LT3089
1
3089f
For more information www.linear.com/LT3089
TYPICAL APPLICATION
FEATURES DESCRIPTION
800mA Single Resistor
Rugged Linear Regulator
with Monitors
The LT
®
3089 is an 800mA low dropout linear regulator
designedfor rugged industrial applications. Key features of
the IC are the extended safe operating area (SOA), output
current monitor, temperature monitor and programmable
current limit. The LT3089 can be paralleled for higher
output current or heat spreading. The device withstands
reverse input and reverse output-to-input voltages without
reverse current flow.
The LT3089’s precision 50µA reference current source
allows a single resistor to program output voltage to
any level between zero and 34.5V. The current reference
architecture enables load regulation to be independent of
output voltage. The LT3089 is stable with or without input
and output capacitors.
The output current monitor (IOUT/5000) and die junction
temperature output (1µA/°C) provide system monitor-
ing and debug capability. In addition, a single resistor
programs current limit.
Internal protection circuitry includes reverse-battery and
reverse-current protection, current limiting and thermal lim-
iting. The LT3089 is offered in the 12-lead 4mm × 4mm DFN
and 16-lead TSSOP (both with exposed pad for improved
thermal performance), and 7-lead DD-Pak power package.
Wide Safe Operating Area Supply
APPLICATIONS
n Extended Safe Operating Area
n Maximum Output Current: 800mA
n Stable with or without Input/Output Capacitors
n Wide Input Voltage Range: 1.2V to 36V
n Single Resistor Sets Output Voltage
n Output Current Monitor: IMON = IOUT/5000
n Junction Temperature Monitor: 1µA/°C
n Output Adjustable to 0V
n 50µA SET Pin Current: 1% Initial Accuracy
n Output Voltage Noise: 27µVRMS
n Parallel Multiple Devices for Higher Current or
Heat Spreading
n Programmable Current Limit
n Reverse-Battery and Reverse-Current Protection
n <1mV Load Regulation Typical Independent of VOUT
n <0.001%/V Line Regulation Typical
n Available in Thermally-Enhanced 12-Lead 4mm ×
4mm DFN, 16-Lead TSSOP, and 7-Lead DD-Pak
n All Surface Mount Power Supply
n Rugged Industrial Power Supply
n Post Regulator for Switching Supplies
n Low Output Voltage Supply
n Intrinsic Safety Applications L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
SET Pin Current
3089 TA01a
IN
1k 4.12k
10µF*
*OPTIONAL
IMON ILIM
OUT
+
–
LT3089
ILOAD/5000
IOUT
1.5V
0.75A
VIN
499Ω*
1k
1µA/°C
SET
30.1k
TEMP
50µA
I
LOAD
= 3mA
TEMPERATURE (°C)
–75
–50
–25
0
25
75
100
125
150
175
49.5
49.6
49.7
49.8
49.9
50.0
50.1
50.2
50.3
50.4
50.5
SET PIN CURRENT (µA)
3089 TA01b
LT3089
2
3089f
For more information www.linear.com/LT3089
ABSOLUTE MAXIMUM RATINGS
IN Pin to OUT Pin Differential Voltage .....................±40V
SET Pin Current (Note 6) .....................................±25mA
SET Pin Voltage (Relative to OUT, Note 6) .............. ±10V
TEMP Pin Voltage (Relative to OUT) .................1V, –40V
ILIM Pin Voltage (Relative to OUT) .........................±0.2V
IMON Pin Voltage (Relative to OUT) ...................1V, –40V
Output Short-Circuit Duration .......................... Indefinite
(Note 1) All voltages Relative to VOUT.
TOP VIEW
13
OUT
DF PACKAGE
12-LEAD (4mm × 4mm) PLASTIC DFN
12
11
8
9
10
4
5
3
2
1IN
IN
IN
IN
TEMP
IMON
OUT
OUT
OUT
OUT
ILIM
SET 67
TJMAX = 125°C, θJA = 41°C/W, θJC = 1.6°C/W
EXPOSED PAD (PIN 13) IS OUT, MUST BE SOLDERED TO PCB
FE PACKAGE
16-LEAD PLASTIC TSSOP
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
OUT
OUT
OUT
OUT
OUT
ILIM
SET
OUT
OUT
IN
IN
IN
IN
TEMP
IMON
OUT
17
OUT
TJMAX = 125°C, θJA = 35°C/W, θJC = 2.3°C/W
EXPOSED PAD (PIN 17) IS OUT, MUST BE SOLDERED TO PCB
R PACKAGE
7-LEAD PLASTIC DD
FRONT VIEW
TAB IS
OUT
NC
IN
TEMP
OUT
IMON
SET
ILIM
7
6
5
4
3
2
1
TJMAX = 125°C, θJA = 34°C/W, θJC = 3°C/W
PIN CONFIGURATION
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3089EDF#PBF LT3089EDF#TRPBF 3089 12-Lead (4mm × 4mm) Plastic DFN –40°C to 125°C
LT3089IDF#PBF LT3089IDF#TRPBF 3089 12-Lead (4mm × 4mm) Plastic DFN –40°C to 125°C
LT3089EFE#PBF LT3089EFE#TRPBF 3089FE 16-Lead Plastic TSSOP –40°C to 125°C
LT3089IFE#PBF LT3089IFE#TRPBF 3089FE 16-Lead Plastic TSSOP –40°C to 125°C
LT3089ER#PBF LT3089ER#TRPBF LT3089R 7-Lead Plastic DD-Pak –40°C to 125°C
LT3089IR#PBF LT3089IR#TRPBF LT3089R 7-Lead Plastic DD-Pak –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
Operating Junction Temperature Range (Note 2)
E-, I-Grades ....................................... –40°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
FE, R Packages Only .........................................300°C
LT3089
3
3089f
For more information www.linear.com/LT3089
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. (Note 2)
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
SET Pin Current ISET VIN = 2V, ILOAD = 3mA
2V ≤ VIN ≤ 36V, 3mA ≤ ILOAD ≤ 800mA
l
49.5
48.75
50
50
50.5
51.25
µA
µA
Offset Voltage VOS
(VOUT – VSET)
VIN = 2V, ILOAD = 3mA
VIN = 2V, ILOAD = 3mA
l
–1.5
–3.5
0
0
1.5
3.5
mV
mV
ISET Load Regulation ∆ILOAD = 3mA to 800mA –0.1 nA
VOS Load Regulation ∆ILOAD = 3mA to 800mA
(Note 7)
DF, FE Packages l–0.5 –3 mV
R Package l–1.5 –4 mV
Line Regulation ∆ISET
∆VOS
∆VIN = 2V to 36V, ILOAD = 3mA
∆VIN = 2V to 36V, ILOAD = 3mA
1.5
0.001
nA/V
mV/V
Minimum Load Current (Note 3) 2V ≤ VIN ≤ 36V l1.1 3 mA
Dropout Voltage (Note 4) ILOAD = 100mA
ILOAD = 800mA
l
1.21
1.47
1.65
V
V
Internal Current Limit VIN = 5V, VSET = 0V, VOUT = –0.1V l0.8 1 A
ILIM Programming Ratio l155 175 210 mA/kΩ
ILIM Minimum Output Current Resistance 300 Ω
IMON Full-Scale Output Current ILOAD = 800mA l130 160 190 µA
IMON Scale Factor 100mA ≤ ILOAD ≤ 800mA 200 µA/A
IMON Operating Range lVOUT – 40V VOUT + 0.4V V
TEMP Output Current (Note 9) TJ > 5°C 1 µA/°C
TEMP Output Current Absolute Error (Note 9) 0°C <TJ ≤ 125°C
125°C <TJ ≤ 150°C
–10
–15
10
15
µA
µA
Reference Current RMS Output Noise (Note 5) 10Hz ≤ f ≤ 100kHz 5.7 nARMS
Error Amplifier RMS Output Noise (Note 5) ILOAD = 800mA, 10Hz ≤ f ≤ 100kHz, COUT =10µF,
CSET = 0.1µF
27 µVRMS
Ripple Rejection
VRIPPLE = 0.5VP-P, ILOAD = 0.1A, CSET = 0.1µF,
COUT=10µF, VIN = VOUT(NOMINAL) + 3V
f = 120Hz
f = 10kHz
f = 1MHz
75 90
75
20
dB
dB
dB
Thermal Regulation, ISET 10ms Pulse 0.003 %/W
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Unless otherwise specified, all voltages are with respect to VOUT.
The LT3089 is tested and specified under pulse load conditions such
that TJ ≈ TA. The LT3089E is tested at TA = 25°C and performance is
guaranteed from 0°C to 125°C. Performance of the LT3089E over the
full –40°C and 125°C operating temperature range is assured by design,
characterization, and correlation with statistical process controls. The
LT3089I is guaranteed over the full –40°C to 125°C operating junction
temperature range. High junction temperatures degrade operating
lifetimes. Operating lifetime is degraded at junction temperatures greater
than 125°C.
Note 3: Minimum load current is equivalent to the quiescent current of
the part. Since all quiescent and drive current is delivered to the output
of the part, the minimum load current is the minimum current required to
maintain regulation.
Note 4: For the LT3089, dropout is specified as the minimum input-to-
output voltage differential required supplying a given output current.
Note 5: Adding a small capacitor across the reference current resistor
lowers output noise. Adding this capacitor bypasses the resistor shot
noise and reference current noise; output noise is then equal to error
amplifier noise (see Applications Information section).
Note 6: Diodes with series 400Ω resistors clamp the SET pin to the
OUT pin. These diodes and resistors only carry current under transient
overloads.
Note 7: Load regulation is Kelvin sensed at the package.
Note 8: This IC includes overtemperature protection that protects the
device during momentary overload conditions. Junction temperature
exceeds the maximum operating junction temperature when
overtemperature protection is active. Continuous operation above the
specified maximum operating junction temperature may impair device
reliability.
Note 9: The TEMP pin output current represents the average die junction
temperature. Due to power dissipation and thermal gradients across the
die, the TEMP pin output current measurement does not guarantee that
absolute maximum junction temperature is not exceeded.
LT3089
4
3089f
For more information www.linear.com/LT3089
TYPICAL PERFORMANCE CHARACTERISTICS
Offset Voltage Offset Voltage (VOUT – VSET) Offset Voltage (VOUT – VSET)
Load Regulation Minimum Load Current Dropout Voltage
SET Pin Current SET Pin Current
TJ = 25°C unless otherwise specified.
Offset Voltage (VOUT – VSET)
I
LOAD
= 3mA
TEMPERATURE (°C)
–75
–50
–25
0
25
75
100
125
150
175
49.5
49.6
49.7
49.8
49.9
50.0
50.1
50.2
50.3
50.4
50.5
SET PIN CURRENT (µA)
3089 G01
I
LOAD
= 3mA
TEMPERATURE (°C)
–75
–50
–25
0
25
75
100
125
150
175
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
2.0
OFFSET VOLTAGE (mV)
OUT
SET
3089 G03
I
LOAD
= 3mA
INPUT–TO–OUTPUT DIFFERENTIAL (V)
0
6
12
24
30
36
–1.0
–0.8
–0.6
–0.4
–0.2
0.0
0.2
0.4
0.6
0.8
1.0
OFFSET VOLTAGE (mV)
OUT
SET
3089 G05
T
J
= 25°C
T
J
= 125°C
LOAD CURRENT (A)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
–1.6
–1.2
–0.8
–0.4
0.0
0.4
OFFSET VOLTAGE (mV)
OUT
SET
3089 G06
∆I
LOAD
= 3mA to 800mA
TEMPERATURE (°C)
–75
–50
–25
0
25
75
100
125
150
175
–3.0
–2.5
–2.0
–1.5
–1.0
–0.5
0
–150
–125
–100
–75
–50
–25
0
OFFSET VOLTAGE LOAD REGULATION (mV)
SET PIN CURRENT LOAD REGULATION (nA)
3089 G07
V
IN
– V
OUT
= 36V
V
IN
– V
OUT
= 2V
TEMPERATURE (°C)
–75
–50
–25
0
25
75
100
125
150
175
0
0.25
0.50
0.75
1.00
1.25
1.50
MINIMUM LOAD CURRENT (mA)
Minimum Load Current
3089 G08
T
J
= –50°C
T
J
= 25°C
T
J
= 125°C
LOAD CURRENT (A)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
DROPOUT VOLTAGE (V)
3089 G09
N = 1297
SET PIN CURRENT DISTRIBUTION (µA)
49
49.5
50.5
51
SET Pin Current
3089 G02
N = 1297
V
OS
DISTRIBUTION (mV)
–2
–1
0
1
2
3089 G04
LT3089
5
3089f
For more information www.linear.com/LT3089
Programmable Current Limit Programmable Current Limit Programmable Current Limit
TEMP Pin Current IMON Pin Current
Dropout Voltage Internal Current Limit Internal Current Limit
TYPICAL PERFORMANCE CHARACTERISTICS
TJ = 25°C unless otherwise specified.
IMON Pin Line Regulation
I
LOAD
= 3mA
I
LOAD
= 800mA
TEMPERATURE (°C)
–75
–50
–25
0
25
75
100
125
150
175
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
DROPOUT VOLTAGE (V)
3089 G10
V
IN
= 7V
V
OUT
= 0V
TEMPERATURE (°C)
–75
–50
–25
0
25
75
100
125
150
175
0
0.25
0.50
0.75
1.00
1.25
1.50
CURRENT LIMIT (A)
Internal Current Limit
3089 G11
INPUT–TO–OUTPUT DIFFERENTIAL (V)
0
6
12
24
30
36
0
0.2
0.4
0.6
0.8
1.0
1.2
CURRENT LIMIT (A)
Internal Current Limit
3089 G12
R
ILIM
= 4.53k
R
ILIM
= 3.01k
R
ILIM
= 1.50k
V
IN
= 7V
V
OUT
= 0V
TEMPERATURE (°C)
–75
–50
–25
0
25
75
100
125
150
175
0
0.2
0.4
0.6
0.8
1.0
PROGRAMMED CURRENT LIMIT (A)
Programmable Current Limit
3089 G13
T
J
= 25°C
V
IN
= 7V
V
OUT
= 0V
R
ILIM
(kΩ)
0
1
2
3
4
5
6
0
0.2
0.4
0.6
0.8
1.0
1.2
PROGRAMMED CURRENT LIMIT (A)
Programmable Current Limit
3089 G14
R
ILIM
1.50k
R
ILIM
3.01k
R
SET
= 20k
T
J
= 25°C
R
ILIM
4.53k
OUTPUT CURRENT (A)
0
0.25
0.50
0.75
1
0
0.2
0.4
0.95
1.00
1.05
OUTPUT VOLTAGE (V)
Programmable Current Limit
3089 G15
TEMPERATURE (°C)
–75
–50
–25
0
25
75
100
125
150
175
0
20
40
60
80
100
120
140
160
TEMP PIN CURRENT (µA)
TEMP Pin Current
3089 G16
LOAD CURRENT (A)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0
20
40
60
80
100
120
140
160
180
200
I
MON
PIN CURRENT (µA)
MON
3089 G17
I
LOAD
= 100mA
INPUT–TO–OUTPUT DIFFERENTIAL VOLTAGE (V)
0
6
12
24
30
36
0
5
10
15
20
25
I
MON
PIN CURRENT (µA)
I
MON
Pin Line Regulation
3089 G18
LT3089
6
3089f
For more information www.linear.com/LT3089
Linear Regulator
Load Transient Response
Current Source
Line Transient Response
Current Source
Line Transient Response
Linear Regulator
Line Transient Response
Linear Regulator
Turn-On Response
Linear Regulator
Load Transient Response
Linear Regulator
Load Transient Response
Linear Regulator
Load Transient Response
TYPICAL PERFORMANCE CHARACTERISTICS
TJ = 25°C unless otherwise specified.
Linear Regulator
Turn-On Response
V
IN
= 3V
V
OUT
= 1V
C
OUT
= 2.2µF
C
SET
= 0.1µF
∆I
LOAD
= 5mA TO 100mA
TIME (µs)
0
20
40
60
80
100
120
140
160
180
200
–100
0
100
–100
–50
0
50
100
LOAD
CURRENT (mA)
Load Transient Response
3089 G19
OUTPUT VOLTAGE
DEVIATION (mV)
V
IN
= 3V
V
OUT
= 1V
C
OUT
= 2.2µF
C
SET
= 0.1µF
∆I
LOAD
= 100mA TO 800mA
TIME (µs)
0
20
40
60
80
100
120
140
160
180
200
0
0.5
1.0
–200
–100
0
100
200
300
Load Transient Response
3089 G20
OUTPUT VOLTAGE
DEVIATION (mV)
LOAD
CURRENT (mA)
V
IN
= 3V
V
OUT
= 1V
C
OUT
= 0
C
SET
= 30pF
∆I
LOAD
= 5mA TO 100mA
t
r
= t
f
= 1µs
TIME (µs)
0
10
20
30
40
60
80
90
100
–100
0
100
–200
–100
0
100
200
Load Transient Response
3089 G21
OUTPUT VOLTAGE
DEVIATION (mV)
LOAD
CURRENT (mA)
V
IN
= 3V
V
OUT
= 1V
C
OUT
= 0
C
SET
= 30pF
∆I
LOAD
= 100mA TO 800mA
t
r
= t
f
= 1µs
TIME (µs)
0
10
20
30
40
60
80
90
100
0
0.5
1.0
–400
–200
0
200
400
600
Load Transient Response
3089 G22
OUTPUT VOLTAGE
DEVIATION (mV)
LOAD
CURRENT (mA)
R
SET
= 20k
R
LOAD
= 1.25Ω
C
OUT
= 2.2µF
C
SET
= 0.1µF
TIME (µs)
0
5
10
15
20
30
40
45
50
–40
–20
0
20
3
4
5
6
INPUT
VOLTAGE (V)
OUTPUT VOLTAGE
DEVIATION (mV)
Line Transient Response
3089 G23
R
SET
= 6.04k
R
OUT
= 3.01Ω
C
OUT
= 0
C
SET
= 30pF
100mA CURRENT SOURCE CONFIGURATION
TIME (µs)
0
10
20
30
40
60
80
90
100
90
95
100
105
3
4
5
6
INPUT
VOLTAGE (V)
OUTPUT
CURRENT (mA)
Line Transient Response
3089 G24
R
SET
= 6.04k
R
OUT
= 0.6Ω
C
OUT
= 0
C
SET
= 30pF
500mA CURRENT SOURCE CONFIGURATION
TIME (µs)
0
10
20
30
40
60
80
90
100
480
490
500
510
520
3
4
5
6
INPUT
VOLTAGE (V)
OUTPUT
CURRENT (mA)
3089 G25
R
SET
= 20k
R
LOAD
= 1.25Ω
C
OUT
= 2.2µF CERAMIC
C
SET
= 0
TIME (µs)
0
5
10
15
20
30
40
45
50
–0.5
0
0.5
1.0
0
1
2
3
4
INPUT
VOLTAGE (V)
OUTPUT
VOLTAGE (V)
Turn–On Response
3089 G26
R
SET
= 20k
R
LOAD
= 1.25Ω
C
OUT
= 2.2µF CERAMIC
C
SET
= 0.1µF
TIME (ms)
0
2
4
6
8
12
16
18
20
–0.5
0
0.5
1.0
0
1
2
3
4
Turn–On Response
3089 G27
OUTPUT
VOLTAGE (V)
INPUT
VOLTAGE (V)
LT3089
7
3089f
For more information www.linear.com/LT3089
Ripple Rejection
Ripple Rejection Output Impedance
Ripple Rejection (120Hz)
Residual Output Voltage with
Less Than Minimum Load
Current Source
Turn-On Response
Current Source
Turn-On Response
TYPICAL PERFORMANCE CHARACTERISTICS
TJ = 25°C unless otherwise specified.
Ripple Rejection (10kHz)
R
SET
= 6.04k
R
OUT
= 3.01Ω
C
OUT
= 0
C
SET
= 30pF
100mA CURRENT SOURCE CONFIGURATION
TIME (µs)
0
10
20
30
40
60
80
90
100
0
50
100
0
1
2
3
4
Turn–On Response
3089 G28
OUTPUT
CURRENT (mA)
INPUT
VOLTAGE (V)
R
SET
= 6.04k
R
OUT
= 0.6Ω
C
OUT
= 0
C
SET
= 30pF
500mA CURRENT SOURCE CONFIGURATION
TIME (µs)
0
10
20
30
40
60
80
90
100
0
200
400
600
0
1
2
3
4
INPUT
VOLTAGE (V)
OUTPUT
CURRENT (mA)
Turn–On Response
3089 G29
V
IN
= 5V
V
IN
= 36V
R
TEST
(kΩ)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
100
200
300
400
500
600
700
800
900
1000
OUTPUT VOLTAGE (mV)
Less Than Minimum Load
3089 G30
VOUT
SET PIN = 0V
RTEST
VIN
C
OUT
= 2.2µF CERAMIC
C
SET
= 0.1µF
V
IN
= V
OUT(NOMINAL)
+ 2V
I
LOAD
= 100mA
I
LOAD
= 500mA
I
LOAD
= 800mA
FREQUENCY (Hz)
10
100
1k
10k
100k
1M
10M
0
10
20
30
40
50
60
70
80
90
100
RIPPLE REJECTION (dB)
3089 G31
C
OUT
= 2.2µF CERAMIC
C
SET
= 0.1µF
I
LOAD
= 100mA
V
IN
= V
OUT
+ 5V
V
IN
= V
OUT
+ 2V
V
IN
= V
OUT
+ 1.5V
FREQUENCY (Hz)
10
100
1k
10k
100k
1M
10M
0
20
40
60
80
100
120
RIPPLE REJECTION (dB)
Ripple Rejection
3089 G32
V
IN
= V
OUT(NOMINAL)
+ 2V
RIPPLE = 500mV
P–P
f = 120Hz
I
LOAD
= 100mA
C
OUT
= 2.2µF
C
SET
= 0.1µF
TEMPERATURE (°C)
–75
–50
–25
0
25
75
100
125
150
175
65
70
75
80
85
90
95
RIPPLE REJECTION (dB)
3089 G34
V
IN
= V
OUT(NOMINAL)
+ 2V
RIPPLE = 500mV
P–P
f = 10kHz
I
LOAD
= 100mA
C
OUT
= 2.2µF
C
SET
= 0.1µF
TEMPERATURE (°C)
–75
–50
–25
0
25
75
100
125
150
175
50
55
60
65
70
RIPPLE REJECTION (dB)
3089 G35
FREQUENCY (Hz)
10
1
OUTPUT IMPEDANCE (Ω)
10
100
1k
10k
100k
1M
10M
100 1k 10k 100k 1M 10M
3089 G33
ISOURCE = 10mA
ISOURCE = 100mA
ISOURCE = 500mA
CURRENT SOURCE CONFIGURATION
LT3089
8
3089f
For more information www.linear.com/LT3089
Noise Spectral Density
10Hz to 100kHz
Output Voltage Noise
Ripple Rejection (1MHz)
TYPICAL PERFORMANCE CHARACTERISTICS
TJ = 25°C unless otherwise specified.
Ripple Rejection
V
IN
= V
OUT(NOMINAL)
+ 2V
RIPPLE = 500mV
P–P
f = 1MHz
I
LOAD
= 100mA
C
OUT
= 2.2µF
C
SET
= 0.1µF
TEMPERATURE (°C)
–75
–50
–25
0
25
75
100
125
150
175
35
37
39
41
43
45
RIPPLE REJECTION (dB)
Ripple Rejection (1MHz)
3089 G36
I
LOAD
= 800mA
C
LOAD
= 2.2µF
10kHz
100kHz
1MHz
INPUT–TO–OUTPUT DIFFERENTIAL VOLTAGE (V)
1
1.5
2
2.5
3
3.5
4
4.5
5
10
20
30
40
50
60
70
80
90
RIPPLE REJECTION (dB)
3089 G37
FREQUENCY (Hz)
10
10
ERROR AMPLIFIER NOISE
SPECTRAL DENSITY (nV/√Hz)
REFERENCE CURRENT NOISE
SPECTRAL DENSITY (pA/√Hz)
100
1000
1
10
100
1k100 10k 100k
3089 G38
C
SET
= 0.1µF
C
OUT
= 4.7µF
I
LOAD
= 800mA
NOISE INDEPENDENT
OF OUTPUT VOLTAGE
1ms/DIV
V
OUT
100µV/DIV
3089 G39
LT3089
9
3089f
For more information www.linear.com/LT3089
BLOCK DIAGRAM
–
+
50µA
IN
IMON
TEMPERATURE
DEPENDENT
CURRENT SOURCE
1µA/°C
SET ILIM OUT 3089 BD
PROGRAMMABLE
CURRENT LIMIT
CURRENT
MONITOR
IMON = ILOAD/5000
TEMP
PIN FUNCTIONS
IN: Input. This pin supplies power to regulate internal
circuitry and supply output load current. For the device
to operate properly and regulate, the voltage on this pin
must be between the dropout voltage and 36V above the
OUT pin (depending on output load current, see Dropout
Voltage Specifications).
OUT: Output. This is the power output of the device. The
LT3089 requires a 3mA minimum load current for proper
output regulation.
TEMP: Temperature Output. This pin delivers a current
proportional to the internal average junction temperature.
Current output is 1µA/°C for temperatures above 5°C. The
TEMP pin output current typically equals 25µA at 25°C.
The output of the TEMP pin is valid for voltages from VOUT
+ 0.4V to VOUT – 40V. If unused, connect this pin to OUT.
ILIM: Current Limit Program. A resistor between this pin
and OUT programs output current limit to a level propor-
tional to resistor value. Connect this resistor directly to
OUT at the pins of the package. The typical ratio of current
limit to resistor value is 175mA/kΩ with a 300Ω offset.
If programmable current limit is not used, leave this pin
open; the internal current limit of the LT3089 is still active,
keeping the device inside safe operating limits. External
voltage drops between the current limit resistor and VOUT
will affect the current limit. Keep drops below 1mV.
IMON: Output Current Monitor. The IMON pin sources a
current typically equal to ILOAD/5000 or 200µA per amp of
output current. Terminating this pin with a resistor to GND
produces a voltage proportional to ILOAD. For example,
at ILOAD = 800mA, IMON typically sources 160µA. With
a 1k resistor to GND, this produces 160mV. The output
of the IMON pin is valid for voltages from VOUT + 0.4V to
VOUT – 40V. If unused, connect this pin to OUT.
SET: Set. This pin is the error amplifier’s noninverting
input and also sets the operating bias point of the circuit.
A fixed 50μA current source flows out of this pin. A single
external resistor programs VOUT. Output voltage range is
0V to 34.5V.
Exposed Pad/Tab: Output. The exposed pad of the DF
and FE packages and the tab of the R package are tied
internally to OUT. As such, tie them directly to OUT (Pins
1-4/Pins 1-5, 8, 9, 16/Pin 4) at the PCB. The amount of
copper area and planes connected to OUT determine the
effective thermal resistance of the packages.
NC: No Connection. No connect pins have no connection
to internal circuitry and may be tied to IN, OUT, GND or
floated.
LT3089
10
3089f
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APPLICATIONS INFORMATION
Introduction
The LT3089 regulator is easy to use and has all the pro-
tection features expected in high performance regulators.
Included are short-circuit protection, reverse-input protec-
tion and safe operating area protection, as well as thermal
shutdown with hysteresis. Safe operating area (SOA) for
the LT3089 is extended, allowing for use in harsh indus-
trial and automotive environments where sudden spikes
in input voltage lead to high power dissipation.
The LT3089 fits well in applications needing multiple rails.
This new architecture adjusts down to zero with a single
resistor, handling modern low voltage digital ICs as well
as allowing easy parallel operation and thermal manage-
ment without heat sinks. Adjusting to zero output allows
shutting off the powered circuitry.
A precision “0” TC 50μA reference current source connects
to the noninverting input of a power operational amplifier.
The power operational amplifier provides a low impedance
buffered output to the voltage on the noninverting input.
A single resistor from the noninverting input to ground
sets the output voltage. If this resistor is set to 0Ω, zero
output voltage results. Therefore, any output voltage can
be obtained between zero and the maximum defined by
the input power supply is obtainable.
The benefit of using a true internal current source as the
reference, as opposed to a bootstrapped reference in older
regulators, is not so obvious in this architecture. A true
reference current source allows the regulator to have gain
and frequency response independent of the impedance on
the positive input. On older adjustable regulators, such as
the LT1086 loop gain changes with output voltage and
bandwidth changes if the adjustment pin is bypassed to
ground. For the LT3089, the loop gain is unchanged with
output voltage changes or bypassing. Output regulation
is not a fixed percentage of output voltage, but is a fixed
fraction of millivolts. Use of a true current source allows
all of the gain in the buffer amplifier to provide regulation,
and none of that gain is needed to amplify up the reference
to a higher output voltage.
The LT3089 has many additional features that facilitate
monitoring and control. Current limit is externally pro-
grammable via a single resistor between the ILIM pin and
OUT. Shorting this resistor out disables all output current
to the load, only bias currents remain.
The IMON pin produces a current output proportional to
load current. For every 100mA of load current, the IMON
pin sources 20µA of current. This can be sensed using an
external resistor to monitor load requirements and detect
potential faults. The IMON pin can operate at voltages above
OUT, so it operates even during a short-circuit condition.
One additional monitoring function is the TEMP pin, a cur-
rent source that is proportional to average die temperature.
For die temperatures above 0°C, the TEMP pin sources a
current equal to 1µA/°C. This pin operates normally during
output short-circuit conditions.
Programming Linear Regulator Output Voltage
The LT3089 generates a 50μA reference current that flows
out of the SET pin. Connecting a resistor from SET to
ground generates a voltage that becomes the reference
point for the error amplifier (see Figure 1). The reference
voltage equals 50µA multiplied by the value of the SET
pin resistor. Any voltage can be generated and there is
no minimum output voltage for the regulator.
3089 F01
IN
SET OUT
+
–
LT3089
50µA
RLOAD
CSET RSET
CIN
VOUT = 50µA • R
SET
COUT
Figure 1. Basic Adjustable Regulator
LT3089
11
3089f
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APPLICATIONS INFORMATION
Table 1 lists many common output voltages and the clos-
est standard 1% resistor values used to generate that
output voltage.
Regulation of the output voltage requires a minimum load
current of 3mA. For true zero voltage output operation,
return this 3mA load current to a negative output voltage.
Table 1. 1% Resistors for Common Output Voltages
VOUT (V) RSET (kΩ)
1 20
1.2 24.3
1.5 30.1
1.8 35.7
2.5 49.9
3.3 66.5
5 100
With the 50µA current source used to generate the reference
voltage, leakage paths to or from the SET pin can create
errors in the reference and output voltages. High quality
insulation should be used (e.g., Teflon, Kel-F); cleaning of
all insulating surfaces to remove fluxes and other residues
is required. Surface coating may be necessary to provide
a moisture barrier in high humidity environments.
Minimize board leakage by encircling the SET pin and
circuitry with a guard ring operated at a potential close
to itself. Tie the guard ring to the OUT pin. Guarding both
sides of the circuit board is required. Bulk leakage reduction
depends on the guard ring width. 50nA of leakage into or
out of the SET pin and its associated circuitry creates a
0.1% reference voltage error. Leakages of this magnitude,
coupled with other sources of leakage, can cause signifi-
cant offset voltage and reference drift, especially over the
possible operating temperature range. Figure 2 depicts an
example guard ring layout.
If guard ring techniques are used, this bootstraps any
stray capacitance at the SET pin. Since the SET pin is
a high impedance node, unwanted signals may couple
into the SET pin and cause erratic behavior. This will
be most noticeable when operating with minimum
output capacitors at full load current. The easiest way
to remedy this is to bypass the SET pin with a small
amount of capacitance from SET to ground, 10pF to
20pF is sufficient.
Configuring the LT3089 as a Current Source
Setting the LT3089 to operate as a 2-terminal current
source is a simple matter. The 50µA reference current from
the SET pin is used with one resistor to generate a small
voltage, usually in the range of 100mV to 1V (200mV is a
level that rejects offset voltage, line regulation, and other
errors without being excessively large). This voltage is
then applied across a second resistor that connect from
OUT to the first resistor. Figure 3 shows connections and
formulas to calculate a basic current source configuration.
3089 F02
SET PIN
GND
OUT
Figure 2. Guard Ring Layout Example of DF Package Figure 3. Using the LT3089 as a Current Source
IOUT ≥3mA
VSET =50µA •RSET
IOUT =VSET
R
OUT
=50µA •RSET
R
OUT
IN
SET OUT
+
–
LT3089
50µA
IOUT
VSET RSET
3089 F03
+
–
ROUT
LT3089
12
3089f
For more information www.linear.com/LT3089
APPLICATIONS INFORMATION
Again, the lower current levels used in the LT3089 neces-
sitate attention to board leakages as error sources (see the
Programming Linear Regulator Output Voltage section).
In a current source configuration, programmable cur-
rent limit and current monitoring functions are often
unused. When not used, tie IMON to OUT and leave ILIM
open. The TEMP pin is still available for use, if unused tie
TEMP to OUT.
Selecting RSET and ROUT in Current Source Applications
In Figure 3, both resistors RSET and ROUT program the
value of the output current. The question now arises: the
ratio of these resistors is known, but what value should
each resistor be?
The first resistor to select is RSET. The value selected should
generate enough voltage to minimize the error caused by
the offset between the SET and OUT pins. A reasonable
starting level is ~200mV of voltage across RSET (RSET equal
to 4.02k). Resultant errors due to offset voltage are a few
percent. The lower the voltage across RSET becomes, the
higher the error term due to the offset.
From this point, selecting ROUT is easy, as it is a straight-
forward calculation from RSET. Take note, however, resistor
errors must be accounted for as well. While larger voltage
drops across RSET minimize the error due to offset, they
also increase the required operating headroom.
Obtaining the best temperature coefficient does not require
the use of expensive resistors with low ppm temperature
coefficients. Instead, since the output current of the LT3089
is determined by the ratio of RSET to ROUT, those resis-
tors should have matching temperature characteristics.
Less expensive resistors made from the same material
provide matching temperature coefficients. See resistor
manufacturers’ data sheets for more details.
Higher output currents necessitate the use of higher watt-
age resistors for ROUT. There may be a difference between
the resistors used for ROUT and RSET. A better method to
maintain consistency in resistors is to use multiple resis-
tors in parallel to create ROUT, allowing the same wattage
and type of resistor as RSET.
Programming Current Limit Externally
A resistor placed between ILIM and OUT on the LT3089
externally sets current limit to a level lower than the internal
current limit. Connect this resistor directly at the OUT pins
for best accuracy. The value of this resistor calculates as:
RILIM = ILIMIT/175mA/kΩ + 300Ω
The resistor for a 0.5A current limit is: RILIM = 0.5A/175mA/
kΩ + 300Ω = 3.16k. Tolerance over temperature is ±15%,
so current limit is normally set 20% above maximum load
current. The 300Ω offset resistance built in to the pro-
grammable current limit allows for lowering the maximum
output current to only bias currents (see curve of Minimum
Load Current in Typical Performance Characteristics) us-
ing external switches.
The LT3089’s internal current limit overrides the pro-
grammed current limit if the input-to-output voltage dif-
ferential in the power transistor is excessive. The internal
current limit is ≈1A with a foldback characteristic dependent
on input-to-output differential voltage, not output voltage
per se (see Typical Performance Characteristics).
Stability and Input Capacitance
The LT3089 does not require an input capacitor to main-
tain stability. Input capacitors are recommended in linear
regulator configurations to provide a low impedance input
source to the LT3089. If using an input capacitor, low
ESR, ceramic input bypass capacitors are acceptable for
applications without long input leads. However, applica-
tions connecting a power supply to an LT3089 circuit’s
IN and GND pins with long input wires combined with
low ESR, ceramic input capacitors are prone to voltage
spikes, reliability concerns and application-specific board
oscillations. The input wire inductance found in many
battery-powered applications, combined with the low ESR
ceramic input capacitor, forms a high Q LC resonant tank
circuit. In some instances this resonant frequency beats
against the output current dependent LDO bandwidth and
interferes with proper operation. Simple circuit modifica-
tions/solutions are then required. This behavior is not
indicative of LT3089 instability, but is a common ceramic
input bypass capacitor application issue.
LT3089
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APPLICATIONS INFORMATION
The self-inductance, or isolated inductance, of a wire is
directly proportional to its length. Wire diameter is not a
major factor on its self-inductance. For example, the self-
inductance of a 2-AWG isolated wire (diameter = 0.26") is
about half the self-inductance of a 30-AWG wire (diameter
= 0.01"). One foot of 30-AWG wire has about 465nH of
self inductance.
One of two ways reduces a wire’s self-inductance. One
method divides the current flowing towards the LT3089
between two parallel conductors. In this case, the farther
apart the wires are from each other, the more the self-
inductance is reduced; up to a 50% reduction when placed
a few inches apart. Splitting the wires basically connects
two equal inductors in parallel, but placing them in close
proximity gives the wires mutual inductance adding to
the self-inductance. The second and most effective way
to reduce overall inductance is to place both forward and
return current conductors (the input and GND wires) in
very close proximity. Tw o 30-AWG wires separated by
only 0.02", used as forward and return current conduc-
tors, reduce the overall self-inductance to approximately
one-fifth that of a single isolated wire.
If wiring modifications are not permissible for the applica-
tions, including series resistance between the power supply
and the input of the LT3089 also stabilizes the application.
As little as 0.1Ω to 0.5Ω, often less, is effective in damp-
ing the LC resonance. If the added impedance between
the power supply and the input is unacceptable, adding
ESR to the input capacitor also provides the necessary
damping of the LC resonance. However, the required ESR
is generally higher than the series impedance required.
Stability and Frequency Compensation for Linear
Regulator Configurations
The LT3089 does not require an output capacitor for
stability. LT C recommends an output capacitor of 10μF
with an ESR of 0.5Ω or less to provide good transient
performance in linear regulator configurations. Larger
values of output capacitance decrease peak deviations and
provide improved transient response for larger load current
changes. Bypass capacitors, used to decouple individual
components powered by the LT3089, increase the effec-
tive output capacitor value. For improvement in transient
performance, place a capacitor across the voltage setting
resistor. Capacitors up to 1μF can be used. This bypass
capacitor reduces system noise as well, but start-up time
is proportional to the time constant of the voltage setting
resistor (RSET in Figure 1) and SET pin bypass capacitor.
Stability and Frequency Compensation for Current
Source Configurations
The LT3089 does not require input or output capacitors
for stability in many current-source applications. Clean,
tight PCB layouts provide a low reactance, well controlled
operating environment for the LT3089 without requiring
capacitors to frequency compensate the circuit. Figure 3
highlights the simplicity of using the LT3089 as a current
source.
Some current source applications use a capacitor con-
nected in parallel with the SET pin resistor to lower the
current source’s noise. This capacitor also provides a
soft-start function for the current source. See Quieting the
Noise section for further details. When operating without
output capacitors, the high impedance nature of the SET
pin as the input of the error amplifier allows signal from
the output to couple in, showing as high frequency ring-
ing during transients. Bypassing the SET resistor with a
capacitor in the range of 20pF to 30pF dampens the ringing.
Depending on the pole introduced by a capacitor or other
complex impedances presented to the LT3089, external
compensation may be required for stability. Techniques
are discussed to achieve this in the following paragraphs.
Linear Technology strongly recommends testing stability
in situ with final components before beginning production.
Although the LT3089’s design strives to be stable without
capacitors over a wide variety of operating conditions, it is
not possible to test for all possible combinations of input
and output impedances that the LT3089 will encounter.
These impedances may include resistive, capacitive, and
inductive components and may be complex distributed
networks. In addition, the current source’s value will dif-
fer between applications and its connection may be GND
referenced, power supply referenced, or floating in a signal
line path. Linear Technology strongly recommends that
stability be tested in situ for any LT3089 application.
LT3089
14
3089f
For more information www.linear.com/LT3089
APPLICATIONS INFORMATION
In LT3089 applications with long wires or PCB traces, the
inductive reactance may cause instability. In some cases,
adding series resistance to the input and output lines (as
shown in Figure 4) may sufficiently dampen these possible
high-Q lines and provide stability. The user must evaluate
the required resistor values against the design’s headroom
constraints. In general, operation at low output current
levels (<20mA) automatically requires higher values of
programming resistors and may provide the necessary
damping without additional series impedance.
If the line impedances in series with the LT3089 are
complex enough such that series damping resistors are
not sufficient, a frequency compensation network may be
necessary. Several options may be considered.
Figure 5 depicts the simplest frequency compensation
networks as a single capacitor across the two terminals
of the current source. Some applications may use the
capacitance to stand off DC voltage but allow the transfer
of data down a signal line.
For some applications, pure capacitance may be unac-
ceptable or present a design constraint. One circuit
example typifying this is an “intrinsically-safe” circuit in
which an overload or fault condition potentially allows the
capacitor’s stored energy to create a spark or arc. For ap-
plications where a single capacitor is unacceptable, Figure
5 alternately shows a series RC network connected across
the two terminals of the current source. This network has
the added benefit of limiting the discharge current of the
capacitor under a fault condition, preventing sparks or
arcs. In many instances, a series RC network is the best
solution for stabilizing the application circuit. Typical resis-
tor values will range from 100Ω to 5k. Once again, Linear
Technology strongly recommends testing stability in situ
for any LT3089 application across all operating conditions,
especially ones that present complex impedance networks
at the input and output of the current source.
If an application refers the bottom of the LT3089 current
source to GND, it may be necessary to bypass the top
of the current source with a capacitor to GND. In some
cases, this capacitor may already exist and no additional
capacitance is required. For example, if the LT3089 was
used as a variable current source on the output of a power
supply, the output bypass capacitance would suffice to
provide LT3089 stability. Other applications may require
the addition of a bypass capacitor. A series RC network
may also be used as necessary, and depends on the ap-
plication requirements.
IN
SET OUT
+
–
LT3089
50µA
RSET ROUT
RSERIES
RSERIES
LONG LINE
REACTANCE/INDUCTANCE
3089 F04
LONG LINE
REACTANCE/INDUCTANCE
Figure 4. Adding Series Resistance Decouples
and Dampens Long Line Reactances
Figure 5. Compensation from Input to Output
of Current Source Provides Stability
3089 F05
IN
SET OUT
+
–
LT3089
50µA CCOMP OR
RSET ROUT
RCOMP
CCOMP
LT3089
15
3089f
For more information www.linear.com/LT3089
APPLICATIONS INFORMATION
In some extreme cases, capacitors or series RC networks
may be required on both the LT3089’s input and output to
stabilize the circuit. Figure 6 depicts a general application
using input and output capacitor networks rather than
an input-to-output capacitor. As the input of the current
source tends to be high impedance, placing a capacitor
on the input does not have the same effect as placing a
capacitor on the lower impedance output. Capacitors in the
range of 0.1µF to 1µF usually provide sufficient bypassing
on the input, and the value of input capacitance may be
increased without limit. Pay careful attention to using low
ESR input capacitors with long input lines (see the Stabil-
ity and Input Capacitance section for more information).
Using Ceramic Capacitors
Give extra consideration to the use of ceramic capacitors.
Ceramic capacitors are manufactured with a variety of di-
electrics, each with different behavior across temperature
and applied voltage. The most common dielectrics used
are specified with EIA temperature characteristic codes of
Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are
good for providing high capacitances in a small package,
but they tend to have strong voltage and temperature
coefficients as shown in Figures 7 and 8. When used with
a 5V regulator, a 16V 10μF Y5V capacitor can exhibit an
effective value as low as 1μF to 2μF for the DC bias voltage
applied and over the operating temperature range. The X5R
and X7R dielectrics result in more stable characteristics
and are more suitable for use as the output capacitor.
The X7R type has better stability across temperature,
while the X5R is less expensive and is available in higher
values. Care still must be exercised when using X5R and
X7R capacitors. The X5R and X7R codes only specify
operating temperature range and maximum capacitance
change over temperature. Capacitance change due to DC
bias with X5R and X7R capacitors is better than Y5V and
Z5U capacitors, but can still be significant enough to drop
capacitor values below appropriate levels. Capacitor DC
bias characteristics tend to improve as component case
size increases, but expected capacitance at operating
voltage should be verified.
Figure 8. Ceramic Capacitor DC Bias CharacteristicsFigure 7. Ceramic Capacitor Temperature Characteristics
Figure 6. Input and/or Output Capacitors May
Be Used for Compensation
3089 F06
IN
SET OUT
+
–
LT3089
50µA
IOUT
RSET ROUT
COUT OR
VIN
COUT
ROUT
CIN
RIN
TEMPERATURE (°C)
–50
40
20
0
–20
–40
–60
–80
–100 25 75
3089 F07
–25 0 50 100 125
Y5V
CHANGE IN VALUE (%)
X5R
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
DC BIAS VOLTAGE (V)
CHANGE IN VALUE (%)
3089 F08
20
0
–20
–40
–60
–80
–100 04810
2 6 12 14
X5R
Y5V
16
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
LT3089
16
3089f
For more information www.linear.com/LT3089
APPLICATIONS INFORMATION
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress. In a
ceramic capacitor, the stress can be induced by vibrations
in the system or thermal transients.
Paralleling Devices
Higher output current is obtained by paralleling multiple
LT3089s together. Tie the individual SET pins together and
tie the individual IN pins together. Connect the outputs in
common using small pieces of PC trace as ballast resistors
to promote equal current sharing. PC trace resistance in
milliohms/inch is shown in Table 2. Ballasting requires
only a tiny area on the PCB.
Table 2. PC Board Trace Resistance
WEIGHT (oz) 10mil WIDTH 20mil WIDTH
1 54.3 27.1
2 27.1 13.6
Trace resistance is measured in mΩ/in.
The worst-case room temperature offset, only ±1.5mV
between the SET pin and the OUT pin, allows the use of
very small ballast resistors.
As shown in Figure 9, each LT3089 has a small 20mΩ
ballast resistor, which at full output current gives better
than 80% equalized sharing of the current. The external
resistance of 20mΩ (10mΩ for the two devices in paral-
lel) only adds about 16mV of output regulation drop at an
output of 1.6A. Even with an output voltage as low as 1V,
this only adds 1.6% to the regulation. Of course, paralleling
more than two LT3089s yields even higher output current.
Spreading the devices on the PC board also spreads the
heat. Series input resistors can further spread the heat if
the input-to-output difference is high.
If the increase in load regulation from the ballast resis-
tors is unacceptable, the IMON output can be used to
compensate for these drops (see Using IMON Cancels
Ballast Resistor Drop in the Typical Applications section).
Regulator paralleling without the use of ballast resistors is
accomplished by comparing the IMON outputs of regula-
tors (see Load Current Sharing Without Ballasting in the
Typical Applications section).
Quieting the Noise
The LT3089 offers numerous noise performance advan-
tages. Every linear regulator has its sources of noise. In
general, a linear regulator’s critical noise source is the
reference. In addition, consider the error amplifier’s noise
contribution along with the resistor divider’s noise gain.
Many traditional low noise regulators bond out the voltage
reference to an external pin (usually through a large value
resistor) to allow for bypassing and noise reduction. The
LT3089 does not use a traditional voltage reference like
other linear regulators. Instead, it uses a 50µA reference
current. The 50µA current source generates noise current
levels of 18pA/√Hz (5.7nARMS over a 10Hz to 100kHz
bandwidth). The equivalent voltage noise equals the RMS
noise current multiplied by the resistor value.
The SET pin resistor generates spot noise equal to √4kTR
(k = Boltzmann’s constant, 1.38 • 10–23J/°K, and T is abso-
lute temperature) which is RMS summed with the voltage
noise. If the application requires lower noise performance,
bypass the voltage setting resistor with a capacitor to GND.
Note that this noise-reduction capacitor increases start-up
time as a factor of the RC time constant.
SET
+
–
LT3089
50µA
20mΩ
20mΩ
IN
VIN
4.8V TO 40V
VOUT
3.3V
1.6A
OUT
10µF
1µF
33k
3089 F09
SET
+
–
LT3089
50µA
IN
OUT
Figure 9. Parallel Devices
LT3089
17
3089f
For more information www.linear.com/LT3089
The LT3089 uses a unity-gain follower from the SET pin
to the OUT pin. Therefore, multiple possibilities exist
(besides a SET pin resistor) to set output voltage. For
example, using a high accuracy voltage reference from
SET to GND removes the errors in output voltage due to
reference current tolerance and resistor tolerance. Active
driving of the SET pin is acceptable.
The typical noise scenario for a linear regulator is that the
output voltage setting resistor divider gains up the reference
noise, especially if VOUT is much greater than VREF. The
LT3089’s noise advantage is that the unity-gain follower
presents no noise gain whatsoever from the SET pin to the
output. Thus, noise figures do not increase accordingly.
Error amplifier noise is typical 85nV/√Hz(27µVRMS over
a 10Hz to 100kHz bandwidth). The error amplifier’s noise
is RMS summed with the other noise terms to give a final
noise figure for the regulator.
Paralleling of regulators adds the benefit that output noise
is reduced. For n regulators in parallel, the output noise
drops by a factor of √n.
Curves in the Typical Performance Characteristics sec-
tion show noise spectral density and peak-to-peak noise
characteristics for both the reference current and error
amplifier over a 10Hz to 100kHz bandwidth.
Load Voltage Regulation
The LT3089 is a floating device. No ground pin exists on
the packages. Thus, the IC delivers all quiescent current
and drive current to the load. Therefore, it is not possible
to provide true remote load sensing. The connection re-
sistance between the regulator and the load determines
load regulation performance. The data sheet’s load
regulation specification is Kelvin sensed at the package’s
pins. Negative-side sensing is a true Kelvin connection by
returning the bottom of the voltage setting resistor to the
negative side of the load (see Figure 10).
Connected as shown, system load regulation is the sum
of the LT3089’s load regulation and the parasitic line
resistance multiplied by the output current. To minimize
load regulation, keep the positive connection between the
regulator and load as short as possible. If possible, use
large diameter wire or wide PC board traces.
TEMP Pin Operation (Die Temperature Monitor)
The TEMP pin of the LT3089 outputs a current proportional
to average die temperature. At 25°C, the current from the
TEMP pin is 25µA, with a slope of 1µA/°C. The current out
of the TEMP pin is valid for junction temperatures above
0°C (absent initial offset considerations). Below 0°C, the
TEMP pin will not sink current to indicate die temperature.
The TEMP pin output current is valid for voltages up to
40V below and 0.4V above the OUT pin allowing operation
even during short-circuit conditions.
Connecting a resistor from TEMP to ground converts the
TEMP pin current into a voltage to allow for monitoring
by an ADC. With a 1k resistor, 0mV to 150mV indicates
0°C to 150°C.
It should be noted that the TEMP pin current represents an
average temperature and should not be used to guarantee
that maximum junction temperature is not exceeded.
Instantaneous power along with thermal gradients and
time constants may cause portions of the die to exceed
maximum ratings and thermal shutdown thresholds. Be
sure to calculate die temperature rise for steady state
(>1minute) as well as impulse conditions.
IMON Pin Operation (Current Monitor)
The LT3089’s IMON pin outputs a current proportional to
the load current supplied at a ratio of 1:5000. The IMON
pin current is valid for voltages up to 40V below and
0.4V above the OUT pin, allowing operation even during
short-circuit conditions.
APPLICATIONS INFORMATION
Figure 10. Connections for Best Load Regulation
IN
SET
+
–
LT3089
50µA
3089 F10
OUT
RSET
RP
PARASITIC
RESISTANCE
RP
RP
LOAD
LT3089
18
3089f
For more information www.linear.com/LT3089
Connecting a resistor from IMON to ground converts the
IMON pin current into a voltage to allow for monitoring by
an ADC. With a 1k resistor, 0mV to 160mV indicates 0A
to 800mA of load current.
Compensating for Cable Drops with IMON
The IMON pin can compensate for resistive drops in wires
or cables between the LT3089 and the load. Breaking the
SET resistor into two pieces adjusts the output voltage as a
function of load current. The ratio of the output wire/cable
impedance to the bottom resistor should be 1:5000. The
sum total of the two SET resistor values determines the
initial output voltage. Figure 11 shows a typical application
and formulas for calculating resistor values.
PC board, copper traces and planes. Surface mount heat
sinks, plated through-holes and solder-filled vias can also
spread the heat generated by power devices.
Junction-to-case thermal resistance is specified from the
IC junction to the bottom of the case directly, or the bot-
tom of the pin most directly in the heat path. This is the
lowest thermal resistance path for heat flow. Only proper
device mounting ensures the best possible thermal flow
from this area of the packages to the heat sinking material.
Note that the exposed pad of the DFN and TSSOP pack-
ages and the tab of the DD-Pak package are electrically
connected to the output (VOUT).
Tables 3 through 5 list thermal resistance as a function
of copper areas on a fixed board size. All measurements
were taken in still air on a 4-layer FR-4 board with 1oz
solid internal planes and 2oz external trace planes with a
total finished board thickness of 1.6mm.
Table 3. DF Package, 12-Lead DFN
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)TOPSIDE* BACKSIDE
2500mm22500mm22500mm221°C/W
1000mm22500mm22500mm224°C/W
225mm22500mm22500mm230°C/W
100mm22500mm22500mm235°C/W
*Device is mounted on topside
Table 4. FE Package, 16-Lead TSSOP
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)TOPSIDE* BACKSIDE
2500mm22500mm22500mm218°C/W
1000mm22500mm22500mm222°C/W
225mm22500mm22500mm227°C/W
100mm22500mm22500mm232°C/W
*Device is mounted on topside
Table 5. R Package, 7-Lead DD-Pak
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)TOPSIDE* BACKSIDE
2500mm22500mm22500mm213°C/W
1000mm22500mm22500mm214°C/W
225mm22500mm22500mm216°C/W
*Device is mounted on topside
APPLICATIONS INFORMATION
Figure 11. Using IMON to Compensate for Cable Drops
Thermal Considerations
The LT3089’s internal power and thermal limiting circuitry
protects itself under overload conditions. For continuous
normal load conditions, do not exceed the 125°C (E- and
I-grades) maximum junction temperature. Carefully
consider all sources of thermal resistance from junction-
to-ambient. This includes (but is not limited to) junction-
to-case, case-to-heat sink interface, heat sink resistance
or circuit board-to-ambient as the application dictates.
Consider all additional, adjacent heat generating sources
in proximity on the PCB.
Surface mount packages provide the necessary heat
sinking by using the heat spreading capabilities of the
LT3089
IN
CIN
1µF
COUT
10µF
3089 F11
OUT
SET
RSET
29.8k
RCOMP = 5000 • RCABLE(TOTAL)
VOUT(LOAD) = 50µA (RSET + RCOMP)
RCABLE2
0.02Ω
RCABLE
0.02Ω
RCOMP
200Ω
IMON
LOAD
LT3089
19
3089f
For more information www.linear.com/LT3089
APPLICATIONS INFORMATION
For further information on thermal resistance and using
thermal information, refer to JEDEC standard JESD51,
notably JESD51-12.
PCB layers, copper weight, board layout and thermal vias
affect the resultant thermal resistance. Tables 3 through 5
provide thermal resistance numbers for best-case 4-layer
boards with 1oz internal and 2oz external copper. Modern,
multilayer PCBs may not be able to achieve quite the same
level performance as found in these tables. Demo circuit
2318A’s board layout using multiple inner VOUT planes
and multiple thermal vias achieves 17°C/W performance
for the DF package.
Calculating Junction Temperature
Example: Given an output voltage of 0.9V, an IN voltage
of 2.5V ±5%, output current range from 10mA to 0.8A
and a maximum ambient temperature of 50°C, what is
the maximum junction temperature for the DD-Pak on a
2500mm2 board with topside copper of 1000mm2?
The power in the circuit equals:
PTOTAL = (VIN – VOUT)(IOUT)
The current delivered to the SET pin is negligible and can
be ignored.
VIN(MAX_CONTINUOUS) = 2.625V (2.5V + 5%)
VOUT = 0.9V, IOUT = 0.8A, TA = 50°C
Power dissipation under these conditions equals:
PTOTAL = (VIN – VOUT)(IOUT)
PTOTAL = (2.625V – 0.9V)(0.8A) = 1.38W
Junction Temperature equals:
TJ = TA + PTOTAL • θJA (using tables)
TJ = 50°C + 1.38W • 14°C/W = 69.3°C
In this case, the junction temperature is below the maxi-
mum rating, ensuring reliable operation.
Reducing Power Dissipation
In some applications it may be necessary to reduce the
power dissipation in the LT3089 package without sacrificing
output current capability. Tw o techniques are available. The
first technique, illustrated in Figure 12, employs a resis-
tor in series with the regulator’s input. The voltage drop
across RS decreases the LT3089’s IN-to-OUT differential
voltage and correspondingly decreases the LT3089’s
power dissipation.
As an example, assume: VIN = 7V, VOUT = 3.3V and IOUT(MAX)
= 0.8A. Use the formulas from the Calculating Junction
Temperature section previously discussed.
Without series resistor RS, power dissipation in the
LT3089 equals:
PTOTAL = (7V – 3.3V) • 0.8A = 2.96W
If the voltage differential (VDIFF) across the LT3089 is
chosen as 1.5V, then RS equals:
RS=
7V – 3.3V – 1.5V
0.8A
=2.8
Ω
Power dissipation in the LT3089 now equals:
PTOTAL = 1.5V • 0.8A = 1.2W
The LT3089’s power dissipation is now only 40% compared
to no series resistor. RS dissipates 1.8W of power. Choose
appropriate wattage resistors or use multiple resistors in
parallel to handle and dissipate the power properly.
3089 F12
IN
VIN′
SET OUT
+
–
LT3089
50µA
RSET
RS
VOUT
VIN
C2
C1
Figure 12. Reducing Power Dissipation Using a Series Resistor
LT3089
20
3089f
For more information www.linear.com/LT3089
APPLICATIONS INFORMATION
The second technique for reducing power dissipation,
shown in Figure 13, uses a resistor in parallel with the
LT3089. This resistor provides a parallel path for current
flow, reducing the current flowing through the LT3089.
This technique works well if input voltage is reasonably
constant and output load current changes are small. This
technique also increases the maximum available output
current at the expense of minimum load requirements.
RP dissipates 0.85W of power. As with the first technique,
choose appropriate wattage resistors to handle and dis-
sipate the power properly. With this configuration, the
LT3089 supplies only 0.43A. Therefore, load current can
increase by 0.37A to a total output current of 1.17A while
keeping the LT3089 in its normal operating range.
Protection Features
The LT3089 incorporates several protection features ideal
for harsh industrial and automotive environments, among
other applications. In addition to normal monolithic regula-
tor protection features such as current limiting and thermal
limiting, the LT3089 protects itself against reverse-input
voltages, reverse-output voltages, and large OUT-to-SET
pin voltages.
Current limit protection and thermal overload protection
protect the IC against output current overload conditions.
For normal operation, do not exceed the rated absolute
maximum junction temperature. The thermal shutdown
circuit’s temperature threshold is typically 165°C and
incorporates about 5°C of hysteresis.
The LT3089’s IN pin withstands ±40V voltages with respect
to the OUT and SET pins. Reverse current flow, if OUT is
greater than IN, is less than 1mA (typically under 100µA),
protecting the LT3089 and sensitive loads.
Clamping diodes and 400Ω limiting resistors protect the
LT3089’s SET pin relative to the OUT pin voltage. These
protection components typically only carry current under
transient overload conditions. These devices are sized to
handle ±10V differential voltages and ±25mA crosspin
current flow without concern. Relative to these applica-
tion concerns, note the following two scenarios. The first
scenario employs a noise-reducing SET pin bypass
capacitor while OUT is instantaneously shorted to GND. The
second scenario follows improper shutdown techniques
in which the SET pin is reset to GND quickly while OUT
is held up by a large output capacitance with light load.
3089 F13
IN
SET OUT
+
–
LT3089
50µA
RSET VOUT
VIN
C2
C1
RP
Figure 13. Reducing Power Dissipation Using a Parallel Resistor
As an example, assume: VIN = 5V, VIN(MAX) = 5.5V,
VOUT = 3.3V, VOUT(MIN) = 3.2V, IOUT(MAX) = 0.8A and
IOUT(MIN) = 0.4A. Also, assuming that RP carries no more
than 90% of IOUT(MIN) = 360mA.
Calculating RP yields:
RP=
5.5V – 3.2V
0.36A
=6.39Ω
(5% Standard value = 6.2Ω)
The maximum total power dissipation is:
(5.5V – 3.2V) • 0.8A = 1.84W
However, the LT3089 supplies only:
0.8A –
5.5V – 3.2V
6.2Ω
=0.43A
Therefore, the LT3089’s power dissipation is only:
PDISS = (5.5V – 3.2V) • 0.43A = 0.99W
LT3089
21
3089f
For more information www.linear.com/LT3089
TYPICAL APPLICATIONS
Paralleling Regulators
Using IMON Cancels Ballast Resistor Drop
IN
SET
RSET
30.1k
1k
TEMP
IMON ILIM
20mΩ
OUT
+
–
LT3089
ISET
50µA
VOUT
3V
1.6A
VIN
IN
SET
1k
TEMP
IMON ILIM
20mΩ
OUT
+
–
LT3089
ISET
50µA
3.01k
3089 TA02
1k
IN
SET
RSET
15k
1k
TEMP
IMON ILIM
OUT
+
–
LT3089
ISET
50µA
VOUT
1.5V
1.6A
VIN
IN
SET
1k
TEMP
IMON ILIM
RBALLAST
20mΩ
OUT
+
–
LT3089
ISET
50µA
3089 TA03
RCOMP
50Ω
RBALLAST
20mΩ
LT3089
22
3089f
For more information www.linear.com/LT3089
TYPICAL APPLICATIONS
Load Sharing Without Ballast Resistors
Load Current Sharing Without Ballasting
IN
22µF
20k
OUT
VIN
3V TO 18V
IMON
SET
LT3089
0.1µF
22µF
1k 5.1k
IN
20k
OUT
IMON
SET
LT3089
100k
0.47µF
5.1k
5.1k
0.1µF 1k
IN OUT
IMON
SET
LT3089
–
+
20k
VOUT
1V
2.4A
100k
0.47µF
5.1k
0.1µF 1k
3089 TA04
–
+
1/2 LT1638 1/2 LT1638
IN
4.7µF
20k
OUT
VIN
3V TO 36V
IMON
SET
ILIM
LT3089
0.1µF
2.2µF
VOUT
1V
1.6A
0.1µF
3089 TA05
100Ω
1k1k
20k
= 2N3904
OUT IN
IMON SET
ILIM
LT3089
LT3089
23
3089f
For more information www.linear.com/LT3089
TYPICAL APPLICATIONS
Boosting Fixed Output Regulators
Reference Buffer
Adding Soft-Start
8.2Ω*
3.3VOUT
2.3A
*4mV DROP ENSURES LT3089 IS OFF WITH NO LOAD
MULTIPLE LT3089s CAN BE USED
IN
SET TEMP
IMON ILIM
20mΩ
5V
OUT
+
–
LT3089
ISET
50µA
3089 TA06
6.2k
10µF
LT1963-3.3
47µF
20mΩ
1k 1k*1k
LT1019
VOUT
*MIN LOAD 3mA
IN
SET TEMP
IMON ILIM
OUT
+
–
LT3089
ISET
50µA
3089 TA07
1µF
OUTPUT
GND
47µF
INPUT
VIN
1k1k
VOUT
3.3V
0.8A
IN
SET TEMP
IMON ILIM
OUT
+
–
LT3089
ISET
50µA
3089 TA08
0.1µF
10µF
1N4148
VIN
4.8V TO 36V
66.5k
10µF
LT3089
24
3089f
For more information www.linear.com/LT3089
TYPICAL APPLICATIONS
Using a Lower Value Set Resistor
Using an External Reference Current
20k
IN
SET
1k
TEMP
IMON ILIM
OUT
+
–
LT3089
ISET
50µA
1µF
3089 TA10
1k
IN
SET OUT
+
–
LT3092
10µA
1mA
VIN
VOUT
0V TO 20V
20k 215Ω
1µF
RSET
2k VOUT = 0.2V + 5mA • RSET
IN
SET
1k
TEMP
IMON ILIM
OUT
+
–
LT3089
ISET
50µA
4.7µF
3089 TA09
1k 4.02k 40.2Ω
VIN
12V
VOUT
0.2V TO 10V
4.7µF
LT3089
25
3089f
For more information www.linear.com/LT3089
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT3089#packaging for the most recent package drawings.
4.00 ±0.10
(4 SIDES)
NOTE:
1. PACKAGE OUTLINE DOES NOT CONFORM TO JEDEC MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.40 ±0.10
16
127
BOTTOM VIEW—EXPOSED PAD
2.65 ±0.10
0.75 ±0.05
R = 0.115
TYP
0.25 ±0.05
0.50 BSC
2.50 REF
3.38 ±0.10
0.200 REF
0.00 – 0.05
(DF12) DFN 1112 REV A
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.70 ±0.05
0.25 ±0.05
0.50 BSC
3.10 ±0.05
4.50 ±0.05
PACKAGE OUTLINE
PIN 1 NOTCH
R = 0.20 TYP OR
0.35 × 45°
CHAMFER
2.65 ±0.05
3.38 ±0.05
2.50 REF
DF Package
12-Lead Plastic DFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1733 Rev A)
LT3089
26
3089f
For more information www.linear.com/LT3089
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT3089#packaging for the most recent package drawings.
FE16 (BB) TSSOP REV K 0913
0.09 – 0.20
(.0035 – .0079)
0° – 8°
0.25
REF
0.50 – 0.75
(.020 – .030)
4.30 – 4.50*
(.169 – .177)
1 3 4 5678
10 9
4.90 – 5.10*
(.193 – .201)
16 1514 13 12 11
1.10
(.0433)
MAX
0.05 – 0.15
(.002 – .006)
0.65
(.0256)
BSC
2.94
(.116)
0.195 – 0.30
(.0077 – .0118)
TYP
2
RECOMMENDED SOLDER PAD LAYOUT
0.45 ±0.05
0.65 BSC
4.50 ±0.10
6.60 ±0.10
1.05 ±0.10
2.94
(.116)
3.05
(.120)
3.58
(.141)
3.58
(.141)
4.70
(.185)
MILLIMETERS
(INCHES)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
SEE NOTE 4
NOTE 5
NOTE 5
6.40
(.252)
BSC
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev K)
Exposed Pad Variation BB
5. BOTTOM EXPOSED PADDLE MAY HAVE METAL PROTRUSION
IN THIS AREA. THIS REGION MUST BE FREE OF ANY EXPOSED
TRACES OR VIAS ON PBC LAYOUT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
DETAIL A
DETAIL A IS THE PART OF THE
LEAD FRAME FEATURE FOR
REFERENCE ONLY
NO MEASUREMENT PURPOSE
0.56
(.022)
REF
0.53
(.021)
REF
DETAIL A
LT3089
27
3089f
For more information www.linear.com/LT3089
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT3089#packaging for the most recent package drawings.
R (DD7) 0212 REV F
.026 – .035
(0.660 – 0.889)
TYP
.143 +.012
–.020
( )
3.632+0.305
–0.508
.050
(1.27)
BSC
.013 – .023
(0.330 – 0.584)
.095 – .115
(2.413 – 2.921)
.004 +.008
–.004
( )
0.102+0.203
–0.102
.050 ±.012
(1.270 ±0.305)
.059
(1.499)
TYP
.045 – .055
(1.143 – 1.397)
.165 – .180
(4.191 – 4.572)
.330 – .370
(8.382 – 9.398)
.060
(1.524)
TYP
.390 – .415
(9.906 – 10.541)
15° TYP
.420
.350
.585
.090
.035
.050
.325
.205
.080
.585
RECOMMENDED SOLDER PAD LAYOUT
FOR THICKER SOLDER PASTE APPLICATIONS
RECOMMENDED SOLDER PAD LAYOUT
.090
.035.050
.420
.276
.320
NOTE:
1. DIMENSIONS IN INCH/(MILLIMETER)
2. DRAWING NOT TO SCALE
.300
(7.620)
.075
(1.905)
.183
(4.648)
.060
(1.524)
.060
(1.524)
.256
(6.502)
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
R Package
7-Lead Plastic DD Pak
(Reference LTC DWG # 05-08-1462 Rev F)
DETAIL A
DETAIL A
0° – 7° TYP0° – 7° TYP
LT3089
28
3089f
For more information www.linear.com/LT3089
LINEAR TECHNOLOGY CORPORATION 2016
LT 0116 • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT3089
RELATED PARTS
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LT3022 1A, Low Voltage, VLDO Linear
Regulator
VIN: 0.9V to 10V, Dropout Voltage: 145mV Typical, Adjustable Output (VREF = VOUT(MIN) = 200mV),
Stable with Low ESR, Ceramic Output Capacitors, 16-Pin DFN (5mm × 3mm) and 16-Lead
MSOP Packages
LT3070/
LT3071
5A, Low Noise, Programmable
VOUT, 85mV Dropout Linear
Regulator with Digital Margining
Dropout Voltage: 85mV, Digitally Programmable VOUT: 0.8V to 1.8V, Digital Output Margining: ±1%,
±3% or ±5%, Low Output Noise: 25µVRMS (10Hz to 100kHz), Parallelable: Use Tw o for a 10A Output,
Stable with Low ESR Ceramic Output Capacitors (15µF Minimum), 28-Lead 4mm × 5mm QFN Package.
LT3071Has Analog Margining.
LT3080/
LT3080-1
1.1A, Parallelable, Low Noise,
Low Dropout Linear Regulator
300mV Dropout Voltage (2-Supply Operation), Low Noise: 40µVRMS, VIN: 1.2V to 36V, VOUT: 0V to 35.7V,
Current-Based Reference with 1-Resistor VOUT Set; Directly Parallelable (No Op Amp Required),
Stable with Ceramic Capacitors, TO-220, DD-Pak, SOT-223, MS8E and 3mm × 3mm DFN-8 Packages;
LT3080-1 Version Has Integrated Internal Ballast Resistor
LT3081 1.5A Single Resistor Rugged
Linear Regulator with Monitors
Extended Safe Operating Area (SOA). Output Current: 1.5A Stable with/without Input/Output
Capacitors. VIN Range: 1.2V to 36V. 50μA Set Pin Current: TSSOP-16, TO-220, DD-Pak, 4mm x 4mm
DFN-12 Packages.
LT3082 200mA, Parallelable, Single
Resistor, Low Dropout Linear
Regulator
Outputs May Be Paralleled for Higher Output, Current or Heat Spreading, Wide Input Voltage
Range: 1.2V to 40V Low Value Input/Output Capacitors Required: 2.2µF, Single Resistor Sets Output
Voltage 8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages
LT3085 500mA, Parallelable, Low Noise,
Low Dropout Linear Regulator
275mV Dropout Voltage (2-Supply Operation), Low Noise: 40µVRMS, VIN: 1.2V to 36V,
VOUT: 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set; Directly Parallelable
(No Op Amp Required), Stable with Ceramic Capacitors, MS8E and 2mm × 3mm DFN-6 Packages
LT3092 200mA 2-Terminal Programmable
Current Source
Programmable 2-Terminal Current Source, Maximum Output Current = 200mA, Wide Input Voltage
Range: 1.2V to 40V, Resistor Ratio Sets Output Current, Initial Set Pin Current Accuracy = 1%, Current
Limit and Thermal Shutdown Protection, Reverse-Voltage Protection, Reverse-Current Protection,
8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages.
LT3083 Adjustable 3A Single Resistor
Low Dropout Regulator
Low Noise: 40µVRMS, 50µA Set Pin Current, Output Adjustable to 0V, Wide Input Voltage Range: 1.2V to 23V
(DD-Pak and TO-220), Low Dropout Operation: 310mV (2 Supplies)
RUN/SS
0.47µF
47µF
1µF
1µF
1000pF
VIN
6.3V TO
36V
6.8µH
VIN BD
LT3680
15k 590k
1k
10k
3089 TA11
2N3904
MTD2955
CMDSH-4E
MBRA340T3
GND
BOOST
IN OUT
IMON ILIM
1k 1k
VCSW
FB
63.4k
RT
PG
SYNC
15k
6.04k
LT3089
500k
22µF
6V
VOUT
0V TO 25V,
0.8A
TEMP SET
0.1µF