SPICE Device Model SI4884DY N-Channel Reduced Qg, Fast Switching MOSFET Characteristics * N-channel Vertical DMOS * Macro-Model (Sub-circuit) * Level 3 MOS * Applicable for Both Linear and Switch Mode * Applicable Over a -55 to 125C Temperature Range * Models Gate Charge, Transient, and Diode Reverse Recovery Characteristics Description feedback capacitor network is used to model gate charge characteristics while avoiding convergence problems of switched Cgd model. Model parameter values are optimized to provide a best fit to measure electrical data and are not intended as an exact physical description of a device. The attached SPICE Model describes typical electrical characteristics of the n-channel vertical DMOS. The sub-circuit model was extracted and optimized over a 25C to 125C temperature range under pulse conditions for 0 to 10 volts gate drives. Saturated output impedance model accuracy has been maximized for gate biases near threshold. A novel gate-to-drain D Model Sub-circuit 4 R1 M2 M1 G CGS 3 DBD 1 2 S This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate data sheet of the same number for guaranteed specification limits. Siliconix 4/17/01 Document: 71601 1 SPICE Device Model SI4884DY Model Evaluation N-Channel Device (TJ=25C Unless Otherwise Noted) Parameter Static Gate Threshold Voltage On-State Drain Current a Drain-Source On-State Resistance a Symbol Test Conditions Typical Unit VGS(th) ID(on) rDS(on) VDS = VGS, ID= 250A VDS 5V, VGS = 10V VGS = 10V, ID = 12A VGS = 4.5V, ID = 10A VDS = 15V, ID = 12A IS = 2.3A, VGS = 0V 1.73 508 0.0087 0.0132 34 0.74 V A Forward Transconductance a Diode Forward Voltage a Dynamic b Total Gate Charge Gate-Source Charge gfs VSD Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Qgd td(on) tr td(off) Fall Time Source-Drain Reverse Recovery Time Qg Qgs tf trr VDS = 15V, VGS = 5V, ID = 12A VDD = 15V, RL = 15 ID 1A, VGEN =10V, RG = 6 IF = 2.3A, di/dt = 100A/s S V 15.3 5.8 nC 4.8 10 14 30 ns 52 44 Notes: a) Pulse test: pulse width 300 s, duty cycle 2% b) Guaranteed by design, not subject to production testing Siliconix 4/17/01 Document: 71601 2 SPICE Device Model SI4884DY Comparison of Model with Measured Data (TJ=25C Unless Otherwise Noted) 50 50 125C -55C ID - Drain Current (A) ID - Drain Current (A) Vgs= 10,7,6,5,4V 40 30 20 10 40 30 20 25C 10 Vgs = 3V 0 0 2 4 6 8 VDS - Drain-to-Source Voltage (V) 6 0.15 4 0.10 2 0.05 rDS(on) 0 0 2 4 6 8 rDS(on) - On-Resistance (Ohm) Sqrt (IDsat) (A) Sqrt( IDsat) 0.5 1 1.5 2 2.5 3 3.5 VGS - Gate-to-Source (V) 4 0.00 10 0.025 0.020 Vgs = 4.5V 0.015 0.010 Vgs = 10V 0.005 0.000 0 10 VGS - Gate-to-Source Voltage (V) 20 30 40 50 ID - Drain Current (A) 2500 15 10 Vds 2000 Ciss 1500 Vds (V) Capacitance (pF) 4.5 0.030 0.20 rDS(on) - On-Resistance (Ohm) 8 0 10 1000 Vgs 12 8 9 6 6 4 3 2 Coss 500 Crss 0 0 5 10 15 20 25 30 VDS - Drain-to-Source Voltage ( V ) Siliconix 4/17/01 Document: 71601 0 0 5 10 15 20 25 Qg (nC) 3 0 30 Vgs (V) 0