The A6211 is a single IC switching regulator that provides
constant-current output to drive high-power LEDs. It integrates
a high-side N-channel DMOS switch for DC-to-DC step- down
(buck) conversion. A true average current is output using a
cycle-by-cycle, controlled on-time method.
Output current is user-selectable by an external current sense
resistor. Output voltage is automatically adjusted to drive
various numbers of LEDs in a single string. This ensures the
optimal system efficiency.
LED dimming is accomplished by a direct logic input pulse-
width modulation (PWM) signal at the enable pin.
The device is provided in a compact 8-pin narrow SOIC package
(suffix LJ) with exposed pad for enhanced thermal dissipation.
It is lead (Pb) free, with 100% matte-tin leadframe plating.
A6211-DS, Rev. 5
Supply voltage 6 to 48 V
True average output current control
3 A maximum output over operating temperature range
Cycle-by-cycle current limit
Integrated MOSFET switch
Dimming via direct logic input or power supply voltage
Internal control loop compensation
Undervoltage lockout (UVLO) and thermal shutdown
protection
Low power shutdown (1 µA typical)
Robust protection against:
Adjacent pin-to-pin short
Pin-to-GND short
Component open/short faults
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
Package: 8-pin SOICN with exposed ther-
mal pad (suffix LJ): APPLICATIONS:
General illumination
Scanners and multifunction printers (light bars)
Architectural lighting
Industrial lighting
Display case lighting / MR16
Typical Application Circuit
Not to scale
A6211
C1
R1
GND
VIN
V
IN
(6 to 48 V)
1
2
3
4
8
7
6
5
SW
GND
PAD
VCC
A6211
BOOT
TON
EN
CS
C5
C4 D1
L1 LED+
LED
RSENSE
EN
Enable/PWM Dimming
(100 Hz to 2 kHz)
. . .
FEATURES AND BENEFITS DESCRIPTION
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
2
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Absolute Maximum Ratings
Characteristic Symbol Notes Rating Unit
Supply Voltage VIN –0.3 to 50 V
Bootstrap Drive Voltage VBOOT –0.3 to VIN + 8 V
Switching Voltage VSW –1.5 to VIN + 0.3 V
Linear Regulator Terminal VCC VCC to GND –0.3 to 7 V
Enable and TON Voltage VEN , VTON –0.3 to VIN + 0.3 V
Current Sense Voltage VCS –0.3 to 7 V
Operating Ambient Temperature TAG temperature range –40 to 105 °C
Maximum Junction Temperature TJ(max) 150 °C
Storage Temperature Tstg –55 to 150 °C
Selection Guide
Part Number Operating Ambient
Temperature, TA
Package Packing
A6211GLJTR-T –40°C to 105°C 8-pin SOICN with exposed thermal pad 3000 pieces per 13-in reel
Pinout Diagram
Terminal List Table
Number Name Function
1 VIN Supply voltage input terminals
2TON Regulator on-time setting resistor terminal
3 EN Logic input for Enable and PWM dimming
4 CS Drive output current sense feedback
5 VCC Internal linear regulator output
6 GND Ground terminal
7 BOOT DMOS gate driver bootstrap terminal
8 SW Switched output terminals
PAD Exposed pad for enhanced thermal dissipation; connect to GND
SW
BOOT
GND
VCC
VIN
TON
EN
CS
1
2
3
4
8
7
6
5
PAD
Thermal Characteristics*: may require derating at maximum conditions; see application section for optimization
Characteristic Symbol Test Conditions* Value Unit
Package Thermal Resistance
(Junction to Ambient) RθJA
On 4-layer PCB based on JEDEC standard 35 °C/W
On 2-layer generic test PCB with 0.8 in.2 of copper area each side 62 °C/W
Package Thermal Resistance
(Junction to Pad) RθJP 2 °C/W
*Additional thermal information available on the Allegro website.
SPECIFICATIONS
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
3
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
+
+
+
VIL
= 0.4 V
VIH = 1.8 V
0.2 V
BOOT
CVCC CBOOT L1
D1
LED String
VCC
Shutdown
VIN
VIN
CCOMP
EN
TON
RON
CS
GND
RSENSE
SW
On-Time
Current
Generator
On-Time
Timer
IC and Driver
Control Logic
Level Shift
Gate Drive
UVLO
VCC
UVLO
Off-Time
Timer
VREG 5.3 V
+
Buck Switch
Current Sense
Current Limit
Off-Time
Timer ILIM
Thermal
Shutdown
VCC UVLO
PAD
Average
Functional Block Diagram
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
4
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Characteristics Symbol Test Conditions Min. Typ. Max. Unit
Input Supply Voltage VIN TA = 25°C 6 48 V
VIN Undervoltage Lockout Threshold VUVLO VIN increasing 5.3 V
VIN Undervoltage Lockout Hysteresis VUVLO
_
HYS VIN decreasing 150 mV
VIN Pin Supply Current IIN VCS = 0.5 V, EN = high 5 mA
VIN Pin Shutdown Current IINSD EN shorted to GND 1 10 µA
Buck Switch Current Limit Threshold ISWLIM 3.0 4.0 5.0 A
Buck Switch On-Resistance RDS(on) VBOOT = VIN + 4.3 V, TA = 25°C, ISW = 1 A 0.25 0.4 Ω
BOOT Undervoltage Lockout
Threshold VBOOTUV VBOOT to VSW increasing 1.7 2.9 4.3 V
BOOT Undervoltage Lockout
Hysteresis VBOTUVHYS VBOOT to VSW decreasing 370 mV
Switching Minimum Off-Time tOFFmin VCS = 0 V 110 150 ns
Switching Minimum On-TIme tONmin 110 150 ns
Selected On-Time tON VIN = 24 V, VOUT = 12 V, RON = 137 kΩ 800 1000 1200 ns
Regulation Comparator and Error Amplier
Load Current Sense Regulation
Threshold
1VCSREG VCS decreasing, SW turns on 187.5 200 210 mV
Load Current Sense Bias Current ICSBIAS VCS = 0.2 V, EN = low 0.9 µA
Internal Linear Regulator
VCC Regulated Output VCC 0 mA < ICC < 5 mA, VIN > 6 V 5.1 5.4 5.7 V
VCC Current Limit
2ICCLIM VIN = 24 V, VCC = 0 V 5 20 mA
Enable Input
Logic High Voltage VIH VEN increasing 1.8 V
Logic Low Voltage VIL VEN decreasing 0.4 V
EN Pin Pull-down Resistance RENPD VEN = 5 V 100
Maximum PWM Dimming Off-Time tPWML
Measured while EN = low, during dimming
control, and internal references are powered-on
(exceeding tPWML results in shutdown)
10 17 ms
Thermal Shutdown
Thermal Shutdown Threshold TSD 165 °C
Thermal Shutdown Hysteresis TSDHYS 25 °C
1 In test mode, a ramp signal is applied at CS pin to determine the CS pin regulation threshold voltage. In actual application, the average CS pin
voltage is regulated at VCSREG regardless of ripple voltage.
2 The internal linear regulator is not designed to drive an external load
ELECTRICAL CHARACTERISTICS: Valid at VIN = 24 V, for TA = –40°C to 105°C, typical values at TA = 25°C, unless
otherwise noted
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
5
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
CHARACTERISTIC PERFORMANCE
Panel 1B. VIN = 24 V
Panel 1C. VIN = 30 V
Panel 1A. VIN = 19 V
t
C1,C2
C3
C4
VIN
VOUT
iLED
VEN
Figure 1: Startup waveforms from off-state at various input voltages; note that the rise time of the LED current
depends on input/output voltages, inductor value, and switching frequency
• Operating conditions: LED voltage = 15 V, LED current = 1.3 A, R1 = 63.4 kΩ (frequency = 1 MHz in steady state),
VIN = 19 V (panel 1A), 24 V (panel 1B) and 30 V (panel 1C)
• Oscilloscope settings: CH1 (Red) = VIN (10 V/div), CH2 (Blue) = VOUT (10 V/div),
CH3 (Green) = iLED (500 mA/div), CH4 (Yellow) = Enable (5 V/div), time scale = 50 µs/div
t
C1,C2
C3
C4
VIN
VOUT
iLED
VEN
t
C1,C2
C3
C4
VIN
VOUT
iLED
VEN
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
6
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
t
t
Figure 2: PWM operation at various duty cycles; note that there is no startup delay during PWM dimming opera-
tion
• Operating conditions: at 200 Hz, VIN = 24 V, VOUT = 15 V, R1 = 63.4 kΩ, duty cycle = 50% (panel 2A) and 2% (panel 2B)
• CH1 (Red) = VIN (10 V/div), CH2 (Blue) = VOUT (10 V/div),
CH3 (Green) = iLED (500 mA/div), CH4 (Yellow) = Enable (5 V/div), time scale = 1 ms/div (panel 2A) and 50 µs/div (panel 2B)
Panel 2A: Duty cycle = 50% and time scale = 1 ms/div
Panel 2B: Duty cycle = 2% and time scale = 50 µs/div
C1,C2
C1,C2
C3
C3
C4
C4
VIN
VIN
VOUT
VOUT
iLED
iLED
VEN
VEN
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
7
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
95
90
85
80
75
70
0 0.5 1.0 1.5 2.0 2.5 3.0
Efficiency, η (%)
LED Current, i
LED
(A)
V
IN
= 24 V, V
OUT
= 15 V
V
IN
= 12 V, V
OUT
= 5.5 V
V
IN
= 12 V, V
OUT
= 3.5 V
95
90
85
80
75
70
0 0.5 1.0 1.5 2.0 2.5 3.0
Efficiency, η (%)
LED Current, i
LED
(A)
f
SW
= 500 kHz
f
SW
= 1 MHz
f
SW
= 2 MHz
1
0.1
0.01
0.001
0.1 1001 10
Duty Cycle (%)
LED Current (A)
iLED = 3 A
iLED = 2 A
iLED = 1.4 A
Figure 3: Efciency versus LED Current at various LED
voltages
Operating conditions: fSW = 1 MHz
Figure 4: Efciency versus LED Current at various
switching frequencies. Operating conditions: VIN = 12
V, VOUT = 5.5 V
Figure 5: Average LED Current versus PWM dimming percentage
Operating conditions: VIN = 12 V, VOUT = 3.5 V, fSW = 1 MHz, fPWM = 200 Hz, L = 10 µH
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
8
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
The A6211 is a buck regulator designed for driving a high-current
LED string. It utilizes average current mode control to maintain
constant LED current and consistent brightness. The LED current
level is easily programmable by selection of an external sense
resistor, with a value determined as follows:
iLED = VCSREG / RSENSE
where VCSREG = 0.2 V typical.
Switching Frequency
The A6211 operates in fixed on-time mode during switching. The
on-time (and hence switching frequency) is programmed using
an external resistor connected between the VIN and TON pins, as
given by the following equation:
tON = k × (RON + RINT ) × ( VOUT / VIN )
fSW = 1 / [ k × (RON + RINT )]
where k = 0.0139, with fSW in MHz, tON in µs, and RON and RINT
(internal resistance, 5 kΩ) in kΩ (see Figure 6).
Enable and Dimming
The IC is activated when a logic high signal is applied to the EN
(enable) pin. The buck converter ramps up the LED current to a
target level set by RSENSE.
When the EN pin is forced from high to low, the buck converter
is turned off, but the IC remains in standby mode for up to 10 ms.
If EN goes high again within this period, the LED current is
turned on immediately. Active dimming of the LED is achieved
by sending a PWM (pulse-width modulation) signal to the EN
pin. The resulting LED brightness is proportional to the duty cycle
(tON
/ Period ) of the PWM signal. A practical range for PWM dim-
ming frequency is between 100 Hz (Period = 10 ms) and 2 kHz.
At a 200 Hz PWM frequency, the dimming duty cycle can be
varied from 100% down to 1% or lower.
If EN is low for more than 17 ms, the IC enters shutdown mode
to reduce power consumption. The next high signal on EN will
initialize a full startup sequence, which includes a startup delay
of approximately 130 µs. This startup delay is not present during
PWM operation.
The EN pin is high-voltage tolerant and can be directly connected
to a power supply. However, if EN is higher than the VIN voltage
at any time, a series resistor (1 kΩ) is required to limit the current
FUCNTIONAL DESCRIPTION
Figure 6: Switching Frequency versus RTON Resistance
Figure 7: Simplied Buck Controller Equations, and Reference Circuit and Waveforms
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0 20 40 60 80 100 120 140 160 180 200 220 240 260
fsw (MHz)
R
TON
(kΩ)
• During SW on-time:
iRIPPLE = [(VIN
VOUT) / L] × tON = [(VIN
VOUT) / L] × T × D
iRIPPLE = [(VOUT
VD) / L] × tOFF = [(VOUT
VD) / L] × T × (1 – D)
VOUT =
VIN × D
VD × (1 – D)
VOUT =
(
VIN Iav × RDS(on)
) × D
VD × (1 – D) –
RL × Iav
where D = tON / T.
where RL is the resistance of the inductor.
• During SW off-time:
Therefore (simplified equation for Output Voltage):
More precisely:
If VD << VOUT
, then VOUT VIN × D.
VSW
iL
t
t
VIN
i(max)
iav
i(min)
0
iRIPPLE
tON tOFF
T
–VD
CIN
VIN A6211
SW VOUT
RSENSE
L
iL
MOS
D
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
9
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
flowing into the EN pin. This series resistor is not necessary if
EN is driven from a logic input.
PWM Dimming Ratio
The brightness of the LED string can be reduced by adjusting the
PWM duty cycle at the EN pin as follows:
Dimming ratio = PWM on-time / PWM period
For example, by selecting a PWM period of 5 ms (200 Hz PWM
frequency) and a PWM on-time of 50 µs, a dimming ratio of 1%
can be achieved.
In an actual application, the minimum dimming ratio is deter-
mined by various system parameters, including: VIN
, VOUT
,
inductance, LED current, switching frequency, and PWM
frequency. As a general guideline, the minimum PWM on-time
should be kept at 50 µs or longer. A shorter PWM on-time is
acceptable under more favorable operating conditions.
Output Voltage and Duty Cycle
Figure 7 provides simplified equations for approximating output
voltage. Essentially, the output voltage of a buck converter is
approximately given as:
VOUT = VIN × D – VD1 × (1 – D ) ≈ VIN × D, if VD1<< V IN
D = tON / (tON + tOFF )
where D is the duty cycle, and VD1 is the forward drop of the
Schottky diode D1 (typically under 0.5 V).
Minimum and Maximum Output Voltages
For a given input voltage, the maximum output voltage depends
on the switching frequency and minimum tOFF . For example, if
tOFF(min) = 150 ns and fSW = 1 MHz, then the maximum duty
cycle is 85%. So for a 24 V input, the maximum output is 20.3 V.
This means up to 6 LEDs can be operated in series, assuming
Vf = 3.3 V or less for each LED.
The minimum output voltage depends on minimum tON and
switching frequency. For example, if the minimum tON = 150 ns
and fSW = 1 MHz, then the minimum duty cycle is 15%. That
means with VIN = 24 V, the minimum VOUT = 3.2 V (one LED).
To a lesser degree, the output voltage is also affected by other
factors such as LED current, on-resistance of the high-side
switch, DCR of the inductor, and forward drop of the low-side
diode. The more precise equation is shown in figure 7.
As a general rule, switching at lower frequencies allows a wider
range of VOUT , and hence more flexible LED configurations.
This is shown in Figure 8.
Figure 8 shows how the minimum and maximum output volt-
ages vary with LED current (assuming RDS(on) = 0.4 Ω, inductor
DCR = 0.1 Ω, and diode Vf = 0.6 V).
If the required output voltage is lower than that permitted by the
minimum tON , the controller will automatically extend the tOFF ,
in order to maintain the correct duty cycle. This means that the
switching frequency will drop lower when necessary, while the
LED current is kept in regulation at all times.
Figure 8: Minimum and Maximum Output Voltage ver-
sus Switching Frequency (VIN = 24 V, iLED = 2 A, mini-
mum tON and tOFF = 150 ns)
Figure 9: Minimum and Maximum Output Voltage ver-
sus iLED current (VIN = 9 V, fSW = 1 MHz, minimum tON
and tOFF = 150 ns)
24
22
20
18
16
14
12
10
8
6
4
2
0
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VOUT ( V )
fsw (MHz)
V
OUT
(max) (V)
V
OUT
(min) (V)
9
8
7
6
5
4
3
2
1
0
0 0.5 1.0 1.5 2.0 2.5 3.0
VOUT ( V )
iLED (A)
V
OUT
(max) (V)
V
OUT
(min) (V)
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
10
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Thermal Budgeting
The A6211 is capable of supplying a 3 A current through its
high-side switch. However, depending on the duty cycle, the
conduction loss in the high-side switch may cause the package to
overheat. Therefore care must be taken to ensure the total power
loss of package is within budget. For example, if the maximum
temperature rise allowed is T = 50 K at the device case surface,
then the maximum power dissipation of the IC is 1.4 W. Assum-
ing the maximum RDS(on) = 0.4 Ω and a duty cycle of 85%, then
the maximum LED current is limited to 2 A approximately. At a
lower duty cycle, the LED current can be higher.
Fault Handling
The A6211 is designed to handle the following faults:
Pin-to-ground short
Pin-to-neighboring pin short
Pin open
External component open or short
Output short to GND
The waveform in Figure 10 illustrates how the A6211 responds
in the case in which the current sense resistor or the CS pin is
shorted to GND. Note that the SW pin overcurrent protection is
tripped at around 3.75 A, and the part shuts down immediately.
The part then goes through startup retry after approximately
380 µs of cool-down period.
As another example, the waveform in Figure 11 shows the fault
case where external Schottky diode D1 is missing or open. As
LED current builds up, a larger-than-normal negative voltage is
developed at the SW node during off-time. This voltage trips the
missing Schottky detection function of the IC. The IC then shuts
down immediately, and waits for a cool-down period before retry.
Component Selections
The inductor is often the most critical component in a buck con-
verter. Follow the procedure below to derive the correct param-
eters for the inductor:
1. Determine the saturation current of the inductor. This can be
done by simply adding 20% to the average LED current:
iSAT ≥ iLED × 1.2.
2. Determine the ripple current amplitude (peak-to-peak value).
As a general rule, ripple current should be kept between 10%
and 30% of the average LED current:
0.1 < iRIPPLE(pk-pk) / iLED < 0.3.
3. Calculate the inductance based on the following equations:
L = (VIN – VOUT
) × D × t / iRIPPLE , and
D = (VOUT + VD1
) / ( VIN + VD1 ) ,
where
D is the duty cycle,
t is the period 1/ fSW , and
VD1 is the forward voltage drop of the Schottky diode
D1 (see Figure 7).
Figure 10: A6211 overcurrent protection tripped in the
case of a fault caused by the sense resistor pin shorted
to ground; shows switch node, VSW (ch1, 10 V/div.),
output voltage, VOUT (ch2, 10 V/div.), LED current, iLED
(ch3, 1 A/div.), t = 100 µs/div.
t
C1
C3
C2
VSW
VOUT
iLED
Figure 11: Startup waveform with a missing Schottky
diode; shows Enable, VEN (ch1, 5 V/div.), swtich node,
VSW (ch2, 5 V/div.), output voltage, VOUT (ch3, 5 V/div.),
LED current, iLED (ch4, 500 mA/div.), t = 100 µs/div.
t
C1
C3
C4
C2
VSW
VEN
Negative voltage
developed at SW
pin during off-time
VOUT
iLED
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
11
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
VIN
SW
D1
LED+
LED–
L1
CS
. . .
Iripple
Vripple Vripple
RSENSE
VIN
SW
D1
LED+
LED–
L1
CS
C1
. . .
Iripple
RSENSE
Figure 13: Ripple current and voltage, with and without Shunt Capacitor
Without output capacitor:
Ripple current through LED string is propor-
tional to ripple voltage at CS pin.
With a small capacitor across LED string:
Ripple current through LED string is reduced,
while ripple voltage at CS pin remains high.
Inductor Selection Chart
The chart in Figure 12 summarizes the relationship between
LED current, switching frequency, and inductor value. Based on
this chart: Assuming LED current = 2 A and fSW =1 MHz, then
the minimum inductance required is L = 10 µH in order to keep
the ripple current at 30% or lower. (Note: VOUT = VIN / 2 is the
worst case for ripple current). If the switching frequency is lower,
then either a larger inductance must be used, or the ripple current
requirement has to be relaxed.
Additional Notes on Ripple Current
For consistent switching frequency, it is recommended to
choose the inductor and switching frequency to ensure the
inductor ripple current percentage is at least 10% over normal
operating voltage range (ripple current is lowest at lowest
VIN).
If ripple current is less than 10%, the switching frequency may
jitter due to insufficient ripple voltage at CS pin. However, the
average LED current is still regulated.
There is no hard limit on the highest ripple current percentage
allowed. A 60% ripple current is still acceptable, as long
as both the inductor and LEDs can handle the peak current
(average current × 1.3 in this case). However, care must be
taken to ensure the valley of the inductor ripple current never
drops to zero at the highest input voltage (which implies a
200% ripple current).
In general, allowing a higher ripple current percentage enables
lower-inductance inductors to be used, which results in smaller
Figure 12: Inductance selection based on ILED and fSW ;
VIN = 24 V, VOUT = 12 V, ripple current = 30%
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Switching Frequency, f SW
(MHz)
LED Current, ILED (A)
L=15 µH
L=22 µH
L=33 µH
L=47 µH
L=10 µH
size and lower cost. The only down-side is the core loss of
the inductor increases with larger ripple currents. But this is
typically a small factor.
If lower ripple current is required for the LED string, one
solution is to add a small capacitor (such as 2.2 µF) across the
LED string from LED+ to LED– . In this case, the inductor
ripple current remains high while the LED ripple current is
greatly reduced.
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
12
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Figure 14. Waveforms showing the effects of adding a small lter capacitor across the LED string
• Operating conditions: at 200 Hz, VIN = 24 V, VOUT = 15 V, fSW = 500 kHz, L = 10 µH, duty cycle = 50%
• CH1 (Red) = VIN (10 V/div), CH2 (Blue) = VOUT (10 V/div),
CH3 (Green) = iLED (500 mA/div), CH4 (Yellow) = Enable (5 V/div), time scale = 1 ms/div
Panel 14A: Operation without using any output
capacitor across the LED string
Panel 14B: Operation with a 0.68 µF ceramic
capacitor connected across the LED string
t
C1,C2
C3
C4
VIN
VOUT
iLED
VEN
t
C1,C2
C3
C4
VIN
VOUT
iLED
VEN
Output Filter Capacitor
The A6211 is designed to operate without an output filter capaci-
tor, in order to save cost. Adding a large output capacitor is not
recommended.
In some applications, it may be required to add a small filter
capacitor (up to several µF) across the LED string (between
LED+ and LED-) to reduce output ripple voltage and current. It is
important to note that:
The effectiveness of this filter capacitor depends on many
factors, such as: switching frequency, inductors used, PCB
layout, LED voltage and current, and so forth.
The addition of this filter capacitor introduces a longer delay
in LED current during PWM dimming operation. Therefore
the maximum PWM dimming ratio is reduced.
The filter capacitor should NOT be connected between LED+
and GND. Doing so may create instability because the control
loop must detect a certain amount of ripple current at the CS
pin for regulation.
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
13
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Application Circuit
The application circuit in Figure 15 shows a design for driving
a 15 V LED string at 1.3 A (set by RSENSE
). The switching fre-
quency is 500 kHz, as set by R1. A 0.68 µF ceramic capacitor is
added across the LED string to reduce the ripple current through
the LEDs (as shown in Figure 14B).
LED+
LED–
VIN
TON
EN
CS
SW
BOOT
GND
VCC
A6211
1
2
3
4
8
7
6
5
V
IN
= 24 to 48 V
C1
47 µF
50 V
C2
4.7uF
50V
EN
C4
0.1 µF
R1
140
L1
10 µH / 2 A
C5
0.1 µF
RSENSE
0.15 Ω
GND
D1
60 V / 2 A
C3
0.68 µF
50 V
LED
string
(
15 V)
...
PAD
Figure 15: Application Circuit Diagram
Suggested Components
Symbol Part Number Manufacturer
C1 EMZA500ADA470MF80G United Chemi-Con
C2 UMK316BJ475KL-T Taiyo Yuden
C3 CGA5L2X5R1H684K160AA TDK
L1 NR8040T100M Taiyo Yuden
D1 B250A-13-F Diodes, Inc.
RSENSE RL1632R-R150-F Susumu
VBAT
GND
VIN
100 kΩ
VBAT
12 V
0
LED
Current
1A
0
VBAT pulsed on/off at 200 Hz, with duty cycle
between 1 % and 99%
1
2
3
4
VIN
TON
EN
CS
SW
BOOT
GND
VCC
8
7
6
5
A6211 LED+
LED–
LED
String
(~6 V)
RSENSE
0.2 Ω
Figure 16: PWM Dimming of LED Current by Using Pulsed Power Supply Line
Additional Application Circuits
The following are some application examples to expand the capa-
bility of the A6211:
Figure 16 shows PWM dimming of LED current by pulsing
the power supply line.
Figure 17 shows analog dimming of LED current by an
external DC voltage.
Figure 18 shows thermal de-rating of LED current by an NTC
resistor.
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
14
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
V= 12 V
IN
GND
200 kΩ
25 kΩ 1 kΩ
1
2
3
4
VIN
TON
EN
EN
CS
SW
BOOT
GND
VCC
8
7
6
5
A6211 LED+
LED–
LED
String
(~6 V)
RSENSE
0.2 Ω
R1
C1
47 µF
50 V
C2
4.7 µF
50 V
C4
0.1 µF
C5
0.1 µF
V= 0.2 V
CS
ADIM
ADIM
iADIM
Analog Dimming
Voltage: 0 to 5.2 V
D1
60 V 2A
C3
open
L1
47 µH 2A
V:
SENSE
0.22 V to 0 V
i:
LED
1.04 A to 0A
iLED
i= (0.2 V– 1000)/R
LED ADIM SENSE
i= (V 0.2)/25 k
ADIM ADIM
100%
0
0.2 V5.2 V
Figure 17: Analog Dimming of LED Current with an External DC Voltage
GND
200 kΩ
30 kΩ 1 kΩ
1
2
3
4
VIN
TON
EN
CS
SW
BOOT
GND
VCC
8
7
6
5
A6211 LED+
LED–
LED
String
(~6 V)
RSENSE
0.2 Ω
R1
C1
47 µF
50 V
C2
4.7 µF
50 V
C4
0.1 µF
C5
0.1 µF
V= 0.2 V
CS
V= 5.2 V
CC
i:
ADIM
0.02 mA @ 25ºC
0.096 mA @ 100ºC
NTC:
220 k @ 25ºC
22 k @ 100ºC
D1
60 V 2A
C3
open
L1
47 µH 2A
V:
SENSE
0.18 V @ 25ºC
0.104 V @ 100ºC
0.9 A@ 25ºC
0.52 A@ 100ºC
i= (0.2 V– 1000)/R
LED ADIM SENSE
i= (V 0.2)/(R + 30 k)
ADIMCC NTC
Figure 18: Thermal Foldback of LED Current using NTC Resistor
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
15
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Component Placement and PCB Layout
Guidelines
PCB layout is critical in designing any switching regulator. A
good layout reduces emitted noise from the switching device,
and ensures better thermal performance and higher efficiency.
The following guidelines help to obtain a high quality PCB
layout. Figure 19 shows an example for components placement.
Figure 20 shows the three critical current loops that should be
minimized and connected by relatively wide traces.
1. When the upper FET (integrated inside the A6211) is on,
current ows from the input supply/capacitors, through the
upper FET, into the load via the output inductor, and back to
ground as shown in loop 1. This loop should have relatively
wide traces. Ideally this connection is made on both the top
(component) layer and via the ground plane.
2. When the upper FET is off, free-wheeling current ows from
ground through the asynchronous diode D1, into the load via
the output inductor, and back to ground as shown in loop 2.
This loop should also be minimized and have relatively wide
traces. Ideally this connection is made on both the top (com-
ponent) layer and via the ground plane.
3. The highest di/dt occurs at the instant the upper FET turns on
and the asynchronous diode D1 undergoes reverse recovery
as shown in loop 3. The ceramic input capacitors C2 must
deliver this high instantaneous current. C1 (electrolytic
capacitor) should not be too far off C2. Therefore, the loop
from the ceramic input capacitor through the upper FET and
asynchronous diode to ground should be minimized. Ideally
this connection is made on both the top (component) layer
and via the ground plane.
4. The voltage on the SW node (pin 8) transitions from 0 V to
VIN very quickly and may cause noise issues. It is best to
place the asynchronous diode and output inductor close to the
A6211 to minimize the size of the SW polygon.
5. Keep sensitive analog signals (CS, and R1 of switching fre-
quency setting) away from the SW polygon.
6. For accurate current sensing, the LED current sense resistor
RSENSE should be placed close to the IC.
7. Place the boot strap capacitor C4 near the BOOT node (pin 7)
and keep the routing to this capacitor short.
8. When routing the input and output capacitors (C1, C2, and
C3 if used), use multiple vias to the ground plane and place
the vias as close as possible to the A6211 pads.
9. To minimize PCB losses and improve system efciency, the
input (VIN) and output (VOUT) traces should be wide and
duplicated on multiple layers, if possible.
Figure 20: Three Different Current Loops in a Buck
Converter
Figure 19: Example Layout for the A6211 Evaluation
Board
VIN CIN COUT
D1
L1
LED
SW
Loop 2
Loop 1
Loop 3
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
16
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10. Connection to the LED array should be kept short. Exces-
sively long wires can cause ringing or oscillation. When
the LED array is separated from the converter board and an
output capacitor is used, the capacitor should be placed on the
converter board to reduce the effect of stray inductance from
long wires.
Thermal Dissipation
The amount of heat that can pass from the silicon of the A6211
to the surrounding ambient environment depends on the thermal
resistance of the structures connected to the A6211. The thermal
resistance, RθJA
, is a measure of the temperature rise created by
power dissipation and is usually measured in degrees Celsius per
watt (°C/W).
The temperature rise, ΔT, is calculated from the power dissipated,
PD
, and the thermal resistance, RθJA
, as:
ΔT = PD × RθJA
A thermal resistance from silicon to ambient, RθJA
, of approxi-
mately 35°C/W can be achieved by mounting the A6211 on a
standard FR4 double-sided printed circuit board (PCB) with a
copper area of a few square inches on each side of the board
under the A6211. Additional improvements in the range of 20%
may be achieved by optimizing the PCB design.
Ø0.3 mm via
Top-layer
exposed copper
Signal traces
LJ package
exposed
thermal pad
LJ package
footprint
0.7 mm
0.7 mm
Figure 21: Suggested PCB Layout for Thermal Optimization (Maximum Available Bottom-Layer Copper Recom-
mended)
Optimizing Thermal Layout
The features of the printed circuit board, including heat conduc-
tion and adjacent thermal sources such as other components, have
a very significant effect on the thermal performance of the device.
To optimize thermal performance, the following should be taken
into account:
The device exposed thermal pad should be connected to as
much copper area as is available.
Copper thickness should be as high as possible (for example,
2 oz. or greater for higher power applications).
The greater the quantity of thermal vias, the better the
dissipation. If the expense of vias is a concern, studies have
shown that concentrating the vias directly under the device in
a tight pattern, as shown in Figure 21, has the greatest effect.
Additional exposed copper area on the opposite side of the
board should be connected by means of the thermal vias. The
copper should cover as much area as possible.
Other thermal sources should be placed as remote from the
device as possible.
Place as many vias as possible to the ground plane around the
anode of the asynchronous diode.
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
17
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
For Reference Only Not for Tooling Use
(Reference DWG-2869)
Dimensions in millimeters NOT TO SCALE
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
3.30
2
1
8
C
1.27
5.602.41
1.75
0.65
2.41 NOM
3.30 NOM
C
1.27 BSC
A
B
C
B
21
8
C
SEATING
PLANE
C0.10
8X
0.25 BSC
1.04 REF
1.70 MAX
4.90 ±0.10
3.90 ±0.10 6.00 ±0.20
0.51
0.31 0.15
0.00
0.25
0.17
1.27
0.40
A
Branded Face SEATING PLANE
GAUGE PLANE
PCB Layout Reference View
Terminal #1 mark area
Exposed thermal pad (bottom surface)
Reference land pattern layout (reference IPC7351 SOIC127P600X175-9AM);
all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
CUSTOMER PACKAGE DRAWING
Figure 22: Package LJ, 8-Pin Narrow SOIC with Exposed Thermal Pad
Constant-Current 3-Ampere PWM Dimmable
Buck Regulator LED Driver
A6211
18
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
For the latest version of this document, visit our website:
www.allegromicro.com
Revision History
Revision Revision Date Description of Revision
1 October 21, 2013 Update applications information
2 March 27, 2014 Revised VCC Spec and Suggested Components Table
3 January 5, 2014 Added new application circuit diagrams
4 January 29, 2016 Revised VCC Absolute Maximum Rating from 14 to 7 V
5 March 17, 2016 Added Load Current Sense Regulation Threshold footnote (page 4); updated Additional Notes on
Ripple Current (page 11).
Copyright ©2016, Allegro MicroSystems, LLC
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permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
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