N-Channel Dual JFET
U421 – U426
FEATURES
••Ultra Low Input Bias Current . . . . . . . 250 Fempto Amps
••Low Operating Current
••T i ght Mat ching Ch aracterist i cs
APPLICATIONS
••Ultra Low Leakage FET Input Op Amps
••Electrometer
••Infrared Detectors
••pH Meters
DESCRIPTION
The Calogic U421 Series are Dual N-Channel JFETs on a
monolithic structure designed specifically for very high input
impedance for differential amplification and impedance
matching. This series features ultra low input bias current
(250 fempto amps, U421) while offering high gain at low
operating currents and tight matchi ng characteristics. These
devi ces are available in chip form for hybrid designs as well
as a he rme tic TO -78 packa ge.
ORDERING INFORMAT ION
Part Package Temperature Range
U421-U426 TO-78 Hermetic Package -55 oC to +150oC
XU421-U4 26 Sorte d Chips in Carrier s -55oC to +150oC
PIN CONFIGURATIO N
CORPORATION
S2G1 D2 D1 G2 S1
C
TO-78
1
2
345
BOTTOM VIEW
1
2
3
4
5
6
7
7
6
SOURCE 1
DRAIN 1
GATE 1
CASE/BODY
SOURCE 2
DRAIN 2
GATE 2
CJ4
U421 – U426
CORPORATION
ABSOLUTE M AXIM UM R A T INGS (TA = 2 5oC unless otherwise noted )
Gate- to- Gate Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . ±40V
Gate- Dr ain or Gate -So urce Voltage . . . . . . . . . . . . . . . . -40 V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
Device Dissip ation (Ea ch Side), TA = 2 5oC
(Derate 3.2 mW/ oC to 150oC). . . . . . . . . . . . . . 400mW
Total Device Dissipat ion, TA = 2 5 oC
(Derate 6.0 mW/ oC to 150oC ). . . . . . . . . . . . . 7 50 mW
Stor age Temper at ure R a nge. . . . . . . . . . . . . -65oC to +150 oC
ELECTRICA L CHARACTERI STICS (2 5 oC unless oth erw ise noted)
SYMBOL CHARACTERISTIC U421-3 U424-6 UNIT TEST CONDITIONS
MIN TYP MAX MIN TYP MAX
STATIC
BVGSS Gate-Source Breakdown Voltage -40 -60 -40 -60 VIG = -1 µA, VDS = 0
BVG1G2 Gate-Gate Breakdown Voltage ±40 ±40 IG = -1 µA, ID = 0, IS = 0
IGSS Gate Reverse Current
(1) 1.0 3.0 pA T = +25oCVGS = -20V,
VDS = 0
1.0 3.0 nA T = +125oC
IG Gate Operating Current
(1) .25 0.5 pA T = +25oCVDG = 10V,
ID = 30µA
.250 -500 T = +125oC
VGS (off) Gate-Source Cutoff Voltage -0.4 -2.0 -0.4 -2.0 VVDS = 10V, ID = 1nA
VGS Gate-Source Voltage -1.8 -2.9 VDG = 10V, ID = 30µA
IDSS Saturation Drain Current 60 1000 60 1800 µAVDS = 10V, VGS = 0
DYNAMIC
gfs Common-Source Forward Transconductance 300 1500 300 1500
VDS = 10V,
VGS = 0
f = 1 kHz
gos Common-Source Output Conductance 10 10
Ciss Common-Source Input Capacitance 3.0 3.0 pF f = 1MHz
Crss Common-Source Reverse Transfer Capacitance 1.5 1.5
gfs Common-Source Forward Transconductance 120 350 120 350
VDG = 10V,
ID = 30µA
f = 1kHz
gos Common-Source Output Conductance 3.0 3.0
enEquivalent Short Circuit In put 20 70 20 70 nV/ Hz f = 10Hz
10 10 f = 1kHz
NF Noise Figure 1.0 1.0 dB f = 10 Hz
RG = 10 MΩ
SYMBOL CHARACTERISTIC U421,4 U422,5 U423,6 UNIT TEST CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX
MATCH
| VGS1-VGS2 | Differe nt ial Gate -Sou r ce Vo lta ge 10 15 25 mV VDG = 10V, ID = 30 µA
| VGS1-VGS2 |
∆T Differential Gate-Source Voltage
Change with Temperature (2) 10 25 40 V/ oCVDG = 10V, ID = 30µA,
TA = -55oC, TB = 25oC,
TC = 125oC
CMRR Common Mode Rejectio n Rati o (3) 90 95 80 90 80 90 dB ID = 30µA, VDG = 10 to 20 V
NOTES:
1. Approximately doubles for every 10oC increase in TA.
2. Measured at endpoints TA, TB and TC.
3. CMRR = 20log10 [ ] V
DD = 10V.
4. Case lead not connected.
VDD
VGS1-VGS2
ELECTRICA L CHARACTERI STIC S (25oC Unless other wise note d)
