NDS351AN es FAIRCHILD es SEMICONDUCTOR m NDS351AN N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMCIA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. April 1997 Features mB 1.2A, 30 V. Rosin = 0.25 Q @ Vig = 4.5 V Rosow = 0.16 Q @ V,, = 10 V. = industry standard outline SOT-23 surface mount package using proprietary SuperSOT-3 design for superior thermal and electrical capabilities. = High density cell design for extremely low R, DS(ON)" Exceptional on-resistance and maximum DC current capability. = Compact industry standard SOT-23 surface mount SuperSOT-3 G Absolute Maximum Ratings T, = 25C unless otherwise noted Symbol | Parameter NDS351AN Units Voss Drain-Source Voltage 30 V Voss Gate-Source Voltage - Continuous 20 V I, Maximum Drain Current - Continuous (Note 1a) 12 A - Pulsed +10 Py Maximum Power Dissipation (Note 1a) 0.5 w (Note 1b) 0.46 T,.T srg | Operating and Storage Temperature Range -55 to 150 Cc THERMAL CHARACTERISTICS Rosa Thermal Resistance, Junction-to-Ambient (Note 1a) 250 CW Poic Thermal Resistance, Junction-to-Case (Note 1) 75 CW 3-128 NDS351AN Rev. CElectrical Characteristics (1, = 25C unless otherwise noted) Symbol | Parameter Conditions | Min | Typ | Max | Units OFF CHARACTERISTICS BV oss Drain-Source Breakdown Voltage Ves = 0 V, |, = 250 PA 30 V loss Zero Gate Voltage Drain Current Vos = 24 V, Vggs= OV 1 pA __| t,=128 10 | pA losse Gate - Body Leakage, Forward Vog = 20 Vig = OV 100 nA lessa Gate - Body Leakage, Reverse Veg = 20 V, Vag = OV -100 nA ON CHARACTERISTICS (note 2) Vessitn; Gate Threshald Voltage Vos = Veg: Ip = 250 PA 0.8 1.7 2 Vv T,=125C | 05 1.3 1.5 Roscony Static Drain-Source On-Resistance Vag 2 4.5V, 1,=1.2A 0.19 | 0.25 Q [ T,=125C 0.28 | 0.37 Veg = 10V,1,=1.4A 0.125 | 0.16 loo On-State Drain Current Veg = 4.5 V, Vpg = 5 V 3.5 Ors Forward Transconductance Vog = 5 V, [p= 1.2 A, 1.8 Ss DYNAMIC CHARACTERISTICS C., Input Capacitance Vos = 10V, Veg = OV, 125 pF Coss Output Capacitance 1 = 1.0 MHz | 400 pF Ci. Reverse Transfer Capacitance 90 pF SWITCHING CHARACTERISTICS note 2) toons Turn - On Delay Time Vop = 10V, 1, = 1A, 6 15 ns t, Turn - On Rise Time Ves = 10 V, Rog,= 50 2 15 30 ns boty Tum - Off Delay Time 14 30 ns i, Turn - Off Fall Time 18 40 ns Q, Total Gate Charge Vog = 10V,1, =1.2A, 19 2.7 nc Q.. Gate-Source Charge Ves = 4.5V 0.5 nC Qa, Gate-Drain Charge 0.9 ac 3-129 NDS351AN Rev. C NVLSESQNNDS351AN Electrical Characteristics (1, = 25c unless otherwise noted) Symbol | Parameter Conditions | Min | Typ Max | units DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS guaranteed by design while R,,,, is determined by the users board design. Ppl!) = TyTa TT tA 2 Faatd ~ RasctRocad [9 x Rosomer, a. 250C/W when mounted on a 0.02 in pad of 202 copper. b. 270C/W when mounted on a 0.001 in pad of 20z copper. Scale 1: 1 on letter size pape: 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%. Typical A, using the board layouts shown below on 4.5x5" FR-4 PCB ina still air environment: I, Maximum Continuous Drain-Source Diode Forward Current 0.42 A lou Maximum Pulsed Drain-Source Diode Forward Current 5 A Veo Drain-Source Diode Forward Voltage Veg = OV, I= 1.2 A (ote 2) 0.8 1.2 V Notes: 1. R,,, is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R, is 3-130 NOS351AN Rev. CTypical Electrical Characteristics Oo G o1 ah z g > Z a 1 2 Ww & NG 3 Za 3 zz 3 36 5 28 8 5 z a8 t ag oO < a 5 1 2 3 0 1 2 a 4 Vos+ ORAIN-SOURCE VOLTAGE () by , DRAIN CURRENT (A) Figure 1. On-Region Characteristics . Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.8 8 8 1.6 os az < RB 214 zo 2 zo 3 Z 12 5% 55 a2 s co 2 8 0.8 Zz cz < z e 06 .50 -25 0 25 50 75 100 125 150 945 1 2 4 J, . JUNCTION TEMPERATURE (C) |p DRAIN CURRENT (A) Figure 3. On-Resistance Variation Figure 4. On-Resistance Variation with Temperature . with Drain Current and Temperature. 5 | : 1 12 T = 55C /; . w Vg = 5.0 J 25C | 9 / ! Bada Vos= Ves = / s05"c a$ Ip = 250pA & : Ha : yy Ha G3 t Si & i zo 2 / 9 z 09 x Ze 65 = > 908 a i a7 2 3 1 yy 0.7 E << a ot 0.6 0.5 1 18 2 2.5 3 3.6 4 45 $s 50 -25 0 25 50 75 100-125 150 Ves , GATE TO SOURCE VOLTAGE (V) Ty, JUNCTION TEMPERATURE (C) Figure 5. Transfer Characteristics. Figure 6. Gate Threshold Variation with Temperature . 3-1 31 NDS351AN Rev. CNDS351AN Typical Electrical Characteristics (continued) 4 4 BV pss NORMALIZED DRAIN-SOURCE BREAKDOWN VOLTAGE 0.96 Ll i a | 0.92 ! -50 725 oO 25 50 75 100 125 150 T, . JUNCTION TEMPERATURE (C) Figure 7. Breakdown Voltage Variation with Temperature. o a 2 Q 3 n 3 eo a CAPACITANCE (pF) 8 wo 50 041 0.2 0.5 1 2 5 10 Vos: DRAIN TO SOURCE VOLTAGE (V} 20 30 Figure 9. Capacitance Characteristics. Ves R SN GEN [LP Sowa Ly Figure 11. Switching Test Circuit. 0.01 0.001 |, REVERSE DRAIN CURRENT (A) 0.0001 ~ sect o 0.2 0.4 0.6 08 1 1.2 Vgp BODY DIODE FORWARD VOLTAGE (V) Figure 8. Body Diode Forward Voltage Variation with Source Current and Temperature. , GATE-SOURCE VOLTAGE (V) Vos 0 1 2 3 4 Q, , GATE CHARGE (nC) Figure 10. Gate Charge Characteristics . tacott) INVERTED 90% ~t-- PULSE WIDTH ~~~! Figure 12. Switching Waveforms. 3-132 NDS351AN Rev. CTypical Electrical Characteristics (continued) Power Dissipation versus Copper Mounting Pad Area. r(), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE STEADY-STATE POWER DISSIPATION (W) o | 4 Pp Ty = -55'C [ee at a 290 = L 9 425C Co ese 1: _ 2 3 4 - 3 |p: DRAIN CURRENT (A) Figure 13. Transconductance Variation with Drain Current and Temperature. to ee i 0.8 [rn pi 06 7%, - _ tb 0.4 - yp 02 . | oo | { 4.5x5" FR-4 Board f Ta = 25C Still Air og ee _ _ 0 0.1 0.2 03 0.4 20z COPPER MOUNTING PAD AREA (in) Figure 15. SuperSOT-3 Maximum Steady-State 0.001 0.01 = NM os aa 2 w& Ip, DRAIN CURRENT (A) e 2 2 o 2 = a2 Figure 14, Maximum Safe Operating Area. Veg = 4.5V SINGLE PULSE FeJA =See Note 1b Ta = 25C at dt. as 1 20 30 50 2 8 Vos: DRAI N-SQURCE VOLTAGE (V) 410 _ STEADY-STATE DRAIN CURRENT (A) D 1 ~ | I Figure 16. Maximum Steady-State Drain Current versus Copper Mounting Pad Area. 0.1 1 ty, TIME (sec) Figure 17. Transient Thermal Response Curve. Note : Characterization performed using the conditions described in note 1b. Transient thermal response will change depending an the circuit board design. 0.1 202 COPPER MOUNTING PAD AREA (in j ! A.5*xS' FR-4 Board} en Ty = 25C Stil Air Vag = 4.5 i { te a re 0.2 0.3 0.4 Rasa =r() * Raa R gia = See Note 1b fi the at tg Ty-Ta =P * Rega tt) Duty Cycle, D =t; Az 300 3-133 NDS351AN Rev. C NVISESGN