Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES MAY 1994
1994 Integrated Device Technology, Inc. DSC-1010/4
CMOS STATIC RAM
64K (16K x 4-BIT)
with Output Control
IDT6198S
IDT6198L
FEATURES:
• High-speed (equal access and cycle times)
— Military: 20/25/35/45/55/70/85ns (max.)
— Commercial: 15/20/25/35ns (max.)
• Output Enable (
OE
) pin available for added system flexibility
• Low-power consumption
• JEDEC compatible pinout
• Battery back-up operation—2V data retention (L version
only)
• 24-pin CERDIP, high-density 28-pin leadless chip carrier,
and 24-pin SOJ
• Produced with advanced CMOS technology
• Bidirectional data inputs and outputs
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT6198 is a 65,536-bit high-speed static RAM orga-
nized as 16K x 4. It is fabricated using IDT’s high-perfor-
mance, high-reliability technology—CMOS. This state-of-the-
art technology, combined with innovative circuit design tech-
niques, provides a cost-effective approach for memory inten-
sive applications. Timing parameters have been specified to
meet the speed demands of the IDT79R3000 RISC proces-
sors.
Access times as fast as 15ns are available. The IDT6198
offers a reduced power standby mode, ISB1, which is activated
when
CS
goes HIGH. This capability significantly decreases
system, while enhancing system reliability. The low-power
version (L) also offers a battery backup data retention capa-
bility where the circuit typically consumes only 30µW when
operating from a 2V battery.
All inputs and outputs are TTL-compatible and operate
from a single 5V supply.
The IDT6198 is packaged in either a 24-pin 300 mil CERDIP,
28-pin leadless chip carrier or 24-pin J-bend small outline IC.
Military grade product is manufactured in compliance with
the latest revision of MIL-STD-883, Class B, making it ideally
suited to military temperature applications demanding the
highest level of performance and reliability.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
A0
DECODER 65,536-BIT
MEMORY ARRAY
COLUMN I/O
2987 drw 01
INPUT
DATA
CONTROL
W
E
CS
VCC
GND
A13
I/O0
I/O1
I/O2
I/O3
OE
FUNCTIONAL BLOCK DIAGRAM
1
6.3
6.3 2
IDT6198S/L
CMOS STATIC RAM 64K (16K x 4-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
DIP/SOJ
TOP VIEW
5
6
7
8
9
10
11
L28-2
26
25
24
23
13 14 15 16 17
321
28 27
INDEX
A
5
A
6
A
13
A
12
CS
12
22
21
A
3
A
4
2987 drw 03
A
7
A
820
19
18
A
11
4
OE
GND
WE
A
0
V
CC
A
2
A
1
NC
NC
A
10
A
9
I/O
3
I/O
2
I/O
1
I/O
0
NC
NC
NC
LCC
TOP VIEW
PIN DESCRIPTIONS
Name Description
A0–A13 Address Inputs
CS
Chip Select
WE
Write Enable
OE
Output Enable
I/O0–I/O3Data Input/Output
VCC Power
GND Ground
2987 tbl 01
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Rating Com’l. Mil. Unit
VTERM Terminal Voltage –0.5 to +7.0 –0.5 to +7.0 V
with Respect
to GND
TAOperating 0 to +70 –55 to +125 °C
Temperature
TBIAS Temperature –55 to +125 –65 to +135 °C
Under Bias
TSTG Storage –55 to +125 –65 to +150 °C
Temperature
PTPower Dissipation 1.0 1.0 W
IOUT DC Output 50 50 mA
Current
NOTE: 2987 tbl 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Parameter(1) Conditions Max. Unit
CIN Input Capacitance VIN = 0V 7 pF
CI/O I/O Capacitance VOUT = 0V 7 pF
NOTE: 2987 tbl 04
1. This parameter is determined by device characterization, but is not
production tested.
TRUTH TABLE(1)
Mode
CS
CS WE
WE OE
OE
I/O Power
Standby H X X High-Z Standby
Read L H L DATAOUT Active
Write L L X DATAIN Active
Read L H H High-Z Active
NOTE: 2987 tbl 02
1. H = VIH, L = VIL, X = Don't Care
2987 drw 02
5
6
7
8
9
10
11
12
1
2
3
4
24
23
22
21
20
19
18
17
D24-1
&
SO24-4
A0
A1
A2
A3
A4
A5
A6
A7
VCC
A13
A11
A10
I/O3
16
15
GND
I/O2
I/O1
I/O0
CS
14
13
A12
NC
WE
A8
A9
OE
6.3 3
IDT6198S/L
CMOS STATIC RAM 64K (16K x 4-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
RECOMMENDED DC OPERATING
CONDITIONS
Symbol Parameter Min. Typ. Max. Unit
VCC Supply Voltage 4.5 5.0 5.5 V
GND Supply Voltage 0 0 0 V
VIH Input High Voltage 2.2 — 6.0 V
VIL Input Low Voltage –0.5(1) — 0.8 V
NOTE: 2987 tbl 05
1. VIL (min.) = –3.0V for pulse width less than 20ns, once per cycle.
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
Grade Temperature GND VCC
Military –55°C to +125°C 0V 5V ± 10%
Commercial 0°C to +70°C 0V 5V ± 10%
2987 tbl 06
DC ELECTRICAL CHARACTERISTICS
VCC = 5.0V ± 10% IDT6198S IDT6198L
Symbol Parameter Test Condition Min. Max. Min. Max. Unit
|ILI| Input Leakage Current VCC = Max., MIL. — 10 — 5 µA
VIN = GND to VCC COM’L. — 5 — 2
|ILO| Output Leakage Current VCC = Max.,
CS
= VIH, MIL. — 10 — 5 µA
VOUT = GND to VCC COM’L. — 5 — 2
VOL Output Low Voltage IOL = 10mA, VCC = Min. 0.5 — 0.5 V
IOL = 8mA, VCC = Min. — 0.4 — 0.4
VOH Output High Voltage IOH = –4mA, VCC = Min. 2.4 — 2.4 — V
2987 tbl 07
DC ELECTRICAL CHARACTERISTICS(1)
(VCC = 5V ± 10%, VLC = 0.2V, VHC = VCC - 0.2V)
6198S15 6198S20 6198S25 6198S35 6198S45 6198S55/70/85
6198L15 6198L20 6198L25 6198L35 6198L45 6198L55/70/85
Symbol Parameter Power Com’l. Mil. Com’l. Mil. Com’l. Mil. Com’l. Mil. Com’l. Mil. Com’l. Mil. Unit
ICC1 Operating Power S 100 — 100 105 100 105 100 105 — 105 — 105 mA
Supply Current
CS
= VIL, Outputs Open L 75 — 70 80 70 80 70 80 — 80 — 80
VCC = Max., f = 0(2)
ICC2 Dynamic Operating S 135 — 130 160 125 155 125 140 — 140 — 140 mA
Current
CS
= VIL, Outputs Open L 125 — 115 130 105 120 105 115 — 110 — 110
VCC = Max., f = fMAX(2)
ISB Standby Power Supply S 60 — 55 70 50 60 45 50 — 50 — 50 mA
Current (TTL Level)
CS
≥ VIH, VCC = Max., L 45 — 40 50 35 40 30 35 — 35 — 35
Outputs Open, f = fMAX(2)
ISB1 Full Standby Power S 20 — 15 25 15 20 15 20 — 20 — 20 mA
Supply Current (CMOS
Level)
CS
≥ VHC, L 1.5 — 0.5 1.5 0.5 1.5 0.5 1.5 — 1.5 — 1.5
VCC=Max., VIN ≥ VHC or
VIN ≤ VLC, f = 0(2)
NOTES: 2987 tbl 06
1. All values are maximum guaranteed values.
2. At f = fMAX address and data inputs are cycling at the maximum frequency of read cycles of 1/tRC. f = 0 means no input lines change.
6.3 4
IDT6198S/L
CMOS STATIC RAM 64K (16K x 4-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES
(L Version Only) VLC = 0.2V, VHC = VCC - 0.2V Typ. (1) Max.
VCC @VCC @
Symbol Parameter Test Condition Min. 2.0v 3.0V 2.0V 3.0V Unit
VDR VCC for Data Retention — 2.0 — — — — V
ICCDR Data Retention Current MIL. — 10 15 600 900 µA
COM’L. — 10 15 150 225
tCDR(3) Chip Deselect to Data
CS
≥ VHC 0————ns
Retention Time VIN ≥ VHC or ≤ VLC
tR(3) Operation Recovery Time tRC(2) ————ns
|ILI|(3) Input Leakage Current — — — 2 2 µA
NOTES: 2987 tbl 09
1. TA = +25°C.
2. tRC = Read Cycle Time.
3. This parameter is guaranteed by device characterization but is not production tested.
LOW VCC DATA RETENTION WAVEFORM
2987 drw 04
DATA
RETENTION
MODE
4.5V 4.5V
VDR ≥2V
VIH VIH
tR
tCDR
VCC
CS
VDR
2987 drw 06
480Ω
5pF*
255Ω
DATAOUT
5V
2987 drw 05
480
Ω
30pF*
255
Ω
DATA
OUT
5V
AC TEST CONDITIONS
Input Pulse Levels GND to 3.0V
Input Rise/Fall Times 5ns
Input Timing Reference Levels 1.5V
Output Reference Levels 1.5V
AC Test Load See Figures 1 and 2
2987 tbl 10
Figure 1. AC Test Load Figure 2. AC Test Load
(for tOLZ, tCLZ, tOHZ, tWHZ, tCHZ and tOW)
*Includes scope and jig capacitances
6.3 5
IDT6198S/L
CMOS STATIC RAM 64K (16K x 4-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ± 10%, All Temperature Ranges)
6198S15(1) 6198S20 6198S25 6198S35 6198S45/55(2) 6198S70/85(2)
6198L15(1) 6198L20 6198L25 6198L35 6198L45/55(2) 6198L70/85(2)
Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
Read Cycle
tRC Read Cycle Time 15 — 20 — 25 — 35 — 45/55 — 70/85 — ns
tAA Address Access Time — 15 — 19 — 25 — 35 — 45/55 — 70/85 ns
tACS Chip Select Access Time — 15 — 20 — 25 — 35 — 45/55 — 70/85 ns
tCLZ(3) Chip Select to Output in Low-Z 5 — 5 — 5 — 5 — 5 — 5 — ns
tOE Output Enable to Output Valid — 8 — 9 — 11 — 18 — 25/35 — 45/55 ns
tOLZ(3) Output Enable to Output in Low-Z 5 — 5 — 5 — 5 — 5 — 5 — ns
tCHZ(3) Chip Select to Output in High-Z 2 7 2 8 2 10 2 14 — 15/20 — 25/30 ns
tOHZ(3) Output Disable to Output in High-Z 2 7 2 8 2 9 2 15 — 15/20 — 25/30 ns
tOH Output Hold from Address Change 5 — 5 — 2 — 5 — 5 — 5 — ns
tPU(3) Chip Select to Power Up Time 0 — 0 — 0 — 0 — 0 — 0 — ns
tPD(3) Chip Deselect to Power Down Time — 15 — 20 — 25 — 35 — 45/55 — 70/85 ns
NOTES: 2987 tbl 11
1. 0° to +70°C temperature range only.
2. –55°C to +125°C temperature range only.
3. This parameter is guaranteed by device characterization but is not production tested.
NOTES:
1.
WE
is HIGH for Read cycle.
2. Device is continuously selected,
CS
is LOW.
3. Address valid prior to or coincident with
CS
transition LOW.
4.
OE
is LOW.
5. Transition is measured ±200mV from steady state voltage.
ADDRESS
CS
DATAOUT
OE
2987 drw 07
tRC
tAA tOH
tACS
tCLZ (5) tCHZ (5)
tOE
tOLZ (5) tOHZ (5)
DATA VALID
TIMING WAVEFORM OF READ CYCLE NO. 1(1)
6.3 6
IDT6198S/L
CMOS STATIC RAM 64K (16K x 4-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF READ CYCLE NO. 2(1, 2, 4)
ADDRESS
DATAOUT
2987 drw 08
tRC
tAA tOH
tOH
DATA VALIDPREVIOUS DATA VALID
TIMING WAVEFORM OF READ CYCLE NO. 3(1, 3, 4)
DATAOUT
CS
ICC
ISB
VCC SUPPLY
CURRENT
2987 drw 09
tACS
(5)
tCLZ tCHZ
tPD
tPU
(5)
DATA VALID
NOTES:
1.
WE
is HIGH for Read cycle.
2. Device is continuously selected,
CS
is LOW.
3. Address valid prior to or coincident with
CS
transition LOW.
4.
OE
is LOW.
5. Transition is measured ±200mV from steady state voltage.
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ± 10%, All Temperature Ranges)
6198S15(1) 6198S20 6198S25 6198S35 6198S45/55(2) 6198S70/85(2)
6198L15(1) 6198L20 6198L25 6198L35 6198L45/55(2) 6198L70/85(2)
Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
Write Cycle
tWC Write Cycle Time 14 — 17 — 20 — 30 — 40/50 — 60/75 — ns
tCW Chip Select to End-of-Write 14 — 17 — 20 — 25 — 35/50 — 60/75 — ns
tAW Address Valid to End-of-Write 14 — 17 — 20 — 25 — 35/50 — 60/75 — ns
tAS Address Set-up Time 0 — 0 — 0 — 0 — 0 — 0 — ns
tWP Write Pulse Width 14 — 17 — 20 — 25 — 35/50 — 60/75 — ns
tWR Write Recovery Time 0 — 0 — 0 — 0 — 0 — 0 — ns
tWHZ(3) Write Enable to Output in High-Z — 5 — 6 — 7 — 10 — 15/25 — 30/40 ns
tDW Data Valid to End-of-Write 10 — 10 — 13 — 15 — 20/25 — 30/35 — ns
tDH Data Hold Time 0 — 0 — 0 — 0 — 0 — 0 — ns
tOW(3) Output Active from End-of-Write 5 — 5 — 5 — 5 — 5 — 5 — ns
NOTES: 2987 tbl 12
1. 0° to +70°C temperature range only.
2. –55°C to +125°C temperature range only.
3. This parameter is guaranteed by device characterization, but is not production tested.
6.3 7
IDT6198S/L
CMOS STATIC RAM 64K (16K x 4-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (
WE
WE
CONTROLLED TIMING)(1, 2, 3, 7)
CS
DATAIN
ADDRESS
WE
DATAOUT
OE
2987 drw 10
tAW
tWR
tDW
tWC
tWP
tDH
tWZ tOW
(4)
tAS
(6)
(4)
(6)
DATA VALID
NOTES:
1.
WE
or
CS
must be HIGH during all address transitions.
2. A write occurs during the overlap ( tWP) of a LOW
CS
and a LOW
WE
.
3. tWR is measured from the earlier of
CS
or
WE
going HIGH to the end of the write cycle.
4. During this period, I/O pins are in the output state so that the input signals must not be applied.
5. If the
CS
LOW transition occurs simultaneously with or after the
WE
LOW transition, the outputs remain in a high-impedance state.
6. Transition is measured ±200mV from steady state.
7. If
OE
is LOW during a
WE
controlled write cycle, the write pulse width must be the larger of tWP or (tWHZ + tDW) to allow the I/O drivers to turn off and data
to be placed on the bus for the required tDW. If
OE
is HIGH during a
WE
controlled write cycle, this requirement does not apply and the write pulse can
be as short as the specified tWP.
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (
CS
CS
CONTROLLED TIMING)(1, 2, 3)
CS
DATAIN
ADDRESS
WE
t
tWR
2987 drw 11
tAW
tDW
tWC
tCW
tDH
tAS
DATA VALID
6.3 8
IDT6198S/L
CMOS STATIC RAM 64K (16K x 4-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
X
Power
XX
Speed
X
Package
X
Process/
Temperature
Range
Blank Commercial (0°C to +70°C)
BMilitary (–55°C to +125°C)
Compliant to MIL-STD-883, Class B
D
L
Y
300 mil CERDIP (D24-1)
Leadless Chip Carrier (L28-2)
Small Outline IC J-Bend (SO24-4)
15
20
25
35
45
55
70
85
Commercial Only
Military Only
Military Only
Military Only
Military Only
S
LStandard Power
Low Power
IDT6198
Speed in nanoseconds
2987 drw 12
Device
Type
