The Smart Timing Choice
The Smart Timing Choice
SiTime Corporation 990 Almanor Avenue, Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com
Rev. 1.06 Revised October 3, 2014
SiT9120
Standard Frequency Differential Oscillator
Features Applications
31 standard frequencies from 25 MHz to 212.5 MHz 10GB Ethernet, SONET, SATA, SAS, Fibre Channel,
PCI-Express
LVPECL and LVDS output signaling types
0.6 ps RMS phase jitter (random) over 12 kHz to 20 MHz bandwidthTelecom, networking, instrumentation, storage, servers
Frequency stability as low as ±10 ppm
Industrial and extended commercial temperature ranges
Industry-standard packages: 3.2x2.5, 5.0x3.2 and 7.0x5.0 mmxmm
For any other frequencies between 1 to 625 MHz, refer to SiT9121
and SiT9122 datasheet
Electrical Characteristics
Parameter and Conditions Symbol Min. Typ. Max. Unit Condition
LVPECL and LVDS, Common Electrical Characteristics
Supply Voltage Vdd 2.97 3.3 3.63 V
2.25 2.5 2.75 V
2.25 – 3.63 V Termination schemes in Figures 1 and 2 - XX ordering code
Output Frequency Range f 25 – 212.5 MHz See last page for list of standard frequencies
Frequency Stability F_stab -10 – +10 ppm
Inclusive of initial tolerance, operating temperature, rated power
supply voltage, and load variations
-20 – +20 ppm
-25 – +25 ppm
-50 – +50 ppm
First Year Aging F_aging1 -2 – +2 ppm 25°C
10-year Aging F_aging10 -5 – +5 ppm 25°C
Operating Temperature Range T_use -40 – +85 °C Industrial
-20 – +70 °C Extended Commercial
Input Voltage High VIH 70% – – Vdd Pin 1, OE or ST
Input Voltage Low VIL – – 30% Vdd Pin 1, OE or ST
Input Pull-up Impedance Z_in – 100 250 kΩ Pin 1, OE logic high or logic low, or ST logic high
2––MΩ
Pin 1, ST logic low
Start-up Time T_start – 6 10 ms Measured from the time Vdd reaches its rated minimum value.
Resume Time T_resume – 6 10 ms In Standby mode, measured from the time ST pin crosses
50% threshold.
Duty Cycle DC 45 – 55 % Contact SiTime for tighter duty cycle
LVPECL, DC and AC Characteristics
Current Consumption Idd – 61 69 mA Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE Disable Supply Current I_OE – – 35 mA OE = Low
Output Disable Leakage Current I_leak – – 1 A OE = Low
Standby Current I_std – – 100 AST = Low, for all Vdds
Maximum Output Current I_driver – – 30 mA Maximum average current drawn from OUT+ or OUT-
Output High Voltage VOH Vdd-1.1 – Vdd-0.7 V See Figure 1(a)
Output Low Voltage VOL Vdd-1.9 – Vdd-1.5 V See Figure 1(a)
Output Differential Voltage Swing V_Swing 1.2 1.6 2.0 V See Figure 1(b)
Rise/Fall Time Tr, Tf – 300 500 ps 20% to 80%, see Figure 1(a)
OE Enable/Disable Time T_oe – – 115 ns f = 212.5 MHz - For other frequencies, T_oe = 100ns + 3 period
RMS Period Jitter T_jitt – 1.2 1.7 ps f = 100 MHz, VDD = 3.3V or 2.5V
– 1.2 1.7 ps f = 156.25 MHz, VDD = 3.3V or 2.5V
– 1.2 1.7 ps f = 212.5 MHz, VDD = 3.3V or 2.5V
RMS Phase Jitter (random) T_phj – 0.6 0.85 ps f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all
Vdds
LVDS, DC and AC Characteristics
Current Consumption Idd – 47 55 mA Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE Disable Supply Current I_OE – – 35 mA OE = Low
Differential Output Voltage VOD 250 350 450 mV See Figure 2