ST7537HS1 HOME AUTOMATION MODEM . . .. .. . . . . . HALF DUPLEX ASYNCHRONOUS 2400bps FSK MODEM Tx CARRIER FREQUENCY SYNTHESIZED FROM EXTERNAL CRYSTAL LOW DISTORTION Tx SIGNAL Rx SENSITIVITY BETTER THAN 1mVRMS CARRIER DETECTION WATCH-DOG INPUT RESET AND MASTER CLOCK OUTPUTS FOR MICROCONTROLLER POWER AMPLIFIER BIAS CURRENT CONTROL (HIGH IMPEDANCE IN Rx MODE) SIMPLE AND ECONOMICAL APPLICATION SCHEMATICS COMPATIBLE WITH CENELEC EN 50065-1 AND FCC SPECIFICATION CARRIER DETECT CLAMPING ON RxD PROGRAMMABLE (ALLOWING DEMODULATION ON VERY LOW RECEIVE LEVEL, 1mVRMS TYPICALLY) ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O PLCC28 (Plastic Chip Carrier) ORDER CODE : ST7537HS1 June 1995 IFO DEMI 27 26 AV 1 28 SS AV DD VCM 2 TxD PABC 9 21 CD TEST1 10 20 Rx/Tx TEST2 11 19 WD 7537H-01.EPS MCLK XTAL2 SS XTAL1 18 22 17 8 16 PABC 15 RxD 14 It is interfaced to the power line by an external driver, and a transformer (see Application Schematic Diagram). Its data transmission rate is 2400 bps and its carrier frequency is 132.45kHz. RAI 23 DV It mainly operates from a 10V power supply and a 5V power supply for the microcontroller digital interface. RxFO RSTO 7 DV DD The ST7537HS1 is a half duplex asynchronous FSK MODEM designed for home automation communication on the domestic electric mains which complies with the EN 50065-1 CENELEC standard. 3 6 ATO 13 PAFB 12 DVCC 24 TEST3 25 TEST4 5 TxIFI DESCRIPTION 4 PIN CONNECTIONS 1/9 ST7537HS1 PIN DESCRIPTION Pin Name Pin Number Pin Type VCM 1 Analog Common Mode Voltage AVDD 2 Supply Analog Power Supply : 10V 5 % Description RAI 3 Analog Receive Analog Input RxFO 4 Analog Receive Filter Output TxIFI 5 Analog Transmit and Intermediate Frequency Filters Test Input (mode TEST3) PAFB 6 Analog Power Amplifier Feed-back Input ATO 7 Analog Analog Transmit Output ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 8 Digital (10V) Power Amplifier Bias Current Control Complementary Output Power Amplifier Bias Current Control Output PABC 9 Digital (10V) TEST1 10 Digital Tx to Rx Automatic Mode Switching Control Input TEST2 11 Digital Automatic Mode Switching Time and Watch-dog Time Reduction Control Input TEST3 12 Digital TxIFI Selection Input TEST4 13 Digital Undelayed Reset Input DVDD 14 Supply Digital Power Supply : 10V 5% DVSS 15 Supply Digital Ground : 0V XTAL1 16 Digital (10V) XTAL2 17 Digital (10V) MCLK 18 Digital Master Clock Output WD 19 Digital Watch-dog Input Crystal Oscillator Input Crystal Oscillator Output Rx/Tx 20 Digital Rx or Tx Mode Selection Input CD 21 Digital Carrier Detect Output TxD 22 Digital Transmit Data Input RxD 23 Digital Receive Data Output RSTO 24 Digital Reset Output DVCC 25 Supply Digital Buffers Supply Voltage : 5V 5 % IFO 26 Analog Intermediate Frequency Filter Output DEMI 27 Analog Demodulator Input AVSS 28 Supply Analog Ground : 0V 2/9 7537H-01.TBL PABC ST7537HS1 BLOCK DIAGRAM 25 MUX Rx BAND-PASS S.C. FILTER I.F. BAND-PASS S.C. FILTER SMT. FILTER DV CC 1 26 IFO 17 XTAL2 CARRIER DETECTION CONTROL LOGIC TIME BASE RESET LOGIC CD 21 V CM 15 A.A. FILTER 4 DV SS 28 20dB GAIN RxFO AV SS 14 SMT. FILTER 3 DV DD 2 A.A. FILTER RAI AV DD REFERENCE VOLTAGE 16 XTAL1 18 MCLK 19 WD ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 24 RSTO 9 PABC 8 FSK MODULATOR 22 TxD 5 POST-DEMO S.C. FILTER RxD 23 TEST LOGIC TxIFI 27 DEMI CORRELATOR FSK DEMODULATOR 7537H-02.EPS PABC Tx BAND-PASS S.C. FILTER A.A. FILTER 6 MUX 7 OUTPUT AMPLIFIER ATO PAFB SMT. FILTER 20 Rx/Tx ST7537HS1 10 11 12 13 TEST1 TEST2 TEST3 TEST4 TRANSMIT SECTION RECEIVE SECTION The transmit mode is set when Rx/Tx = 0, if Rx/Tx is held at 0 longer than 1 second, then the device switches automatically in the Rx mode. A new activation of the Tx mode requires Rx/Tx to be returned to 1 for a minimum 2 microsecond period before being set to 0. The Transmit Data (TxD) enter asynchronously the FSK modulator with a nominal intra-message data rate of 2400 bps. The basic transmit frequencies are : - f(TxD=0) = 133.05kHz - f(TxD=1) = 131.85kHz These frequencies are synthesized from a 11.0592MHz crystal oscillator; their precision is the same as the crystal one's (100ppm). The modulated signal coming out of the FSK modulator is filtered by a switched-capacitor band-pass filter (Tx band-pass) in order to limit the output spectrum and to reduce the level of harmonic components. The final stage of the Tx path consists of an operational amplifier which needs a feed-back signal (PAFB) from the power amplifier as shown on Application Schematic Diagram. In Tx mode the Receive Data (RxD) signal is set to 1. The receive section is active when Rx/Tx = 1. The Rx signal is applied on RAI and filtered by a band-pass switched capacitor filter (Rx band-pass) centered on the carrier frequency and whose bandwidth is around 12kHz. The Rx filter output is amplified by a 20dB gain stage which provides symetrical limitations for large voltage. The resulting signal is down-converted by a mixer which receives a local oscillator synthesized by the FSK modulator block. Finally an intermediate frequency band-pass filter (IF bandpass) whose central frequency is 5.4kHz improves the signal to noise ratio before entering the FSK demodulator. The coupling of the intermediate frequency filter output (IFO) to the FSK demodulator input (DEMI) is made by an external capacitor C5 (100nF 10%, 10V) which cancels the Rx path offset voltage. The RxD output delivers the demodulated signal if the carrier detect (CD) signal is low and is set to high level when CD = 1. The RxD output can delivers the demodulated signal whatever the level of CD (0 or 1) if Rx/Tx = 1 and TxD = 0 (see Figure 1). 3/9 ST7537HS1 Figure 1 : Data Timing Chart Rx/Tx TxD RxD DATA ADDITIONAL DIGITAL AND ANALOG FUNCTIONS Time base DATA low respectively high, when the circuit is set in the receive mode (Rx/Tx=1) or when the transmit mode time out (1 second) is exceeded; in the same time the output ATO is put in a high impedance state. ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O A time base section delivers all the internal clocks from a crystal oscillator (11.0592MHz). The crystal is connected between XTAL1 and XTAL2 pins and needs two external capacitors C3 and C4 (22pF 10%, 10V) for proper operation. Reset and watch-dog The reset output (RSTO) is driven high when the supply voltage is lower than Vrh (typically 7.6V) with an hysteresis Vrh-Vrl (typically 300mV) or when no negative transition occurs on the watch-dog input (WD) for more than 1.5 second (see the timing chart on Figure 2). When a reset occurs RSTO is held high for at least 50ms. Signal detection The Carrier Detect output (CD) is driven low when the input signal amplitude on RAI is greater than VCD for at least TCD (typically 6ms see the timing chart on Figure 3). When the input signal desappears or becomes lower than VCD, CD is held low for at least Tcd before returning to a high level. VCD is the carrier detection threshold voltage which is set internally to detect 5mVRMS typically. External power amplifier bias control Two dedicated digital output (PABC and PABC) delivering a signal between 0V and 10V are driven 4/9 TESTING FEATURES - An additionnal amplifier allows the observation of the Rx band-pass filter output on pin RxFO. - A direct input to the Tx band-pass filter and to the IF filter (TxIFI) is selected when TEST3 = 1. - The 1 second normal duration of the Tx to Rx mode automatic switching is reduced to 488s and the 1.5 second watch-dog time out is reduced to 46.3s when TEST2 = 1. - When TEST1 = 1 the Tx to Rx mode automatic switching is desactivated and the functional mode of the circuit is fully controlled by Rx/Tx. - TEST4 is a reset input which allows an undelayed control of RSTO and of the internal state of the circuit. POWER SUPPLIES WIRING PRECAUTIONS The ST7537HS1 has two positive power supply terminals (AVDD,DVDD) and two ground terminals (AVSS,DVSS) in order to separate internal analog and digital supplies. The analog and digital terminals of each supply pair must be connected together externally for proper operation. The VDD must be protected against short-circuit for proper operation. 7537H-03.EPS CD ST7537HS1 ABSOLUTE MAXIMUM RATINGS Parameter AVDD/DVDD Value Supply Voltage (1) Unit - 0.3, + 12 V VI Digital Input Voltage DVSS - 0.3, DVDD + 0.3 V VO Digital Output Voltage (microcontroller interface) DVSS - 0.3, DVCC + 0.3 V VO Digital Output Voltage (PABC and PABC) DVSS - 0.3, DVDD + 0.3 V IO Digital Output Current - 5, + 5 mA V VI Analog Input Voltage AVSS - 0.3, AVDD + 0.3 VO Analog Output Voltage AVSS - 0.3, AVDD + 0.3 V IO Analog Output Current - 5, + 5 mA PD Power Dissipation 500 mW ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Toper Operating Temperature Tstg Storage Temperature Notes : 1. 2. 0, + 70 o C - 55, + 150 o C 7537H-02.TBL Symbol The voltages are referenced to AVSS and DVSS. Absolute maximum ratings are values beyond which damage to device may occur. Functional operation under these conditions is not implied. GENERAL ELECTRICAL CHARACTERISTICS (A/DVDD = 10V, A/DVSS = 0V, DVCC = 5V and 0oC Tamb 70oC, unless otherwise specificied) Parameter AVDD DVDD Supply Voltage AIDD + DIDD Supply Current DVCC Digital Output Supply Voltage DICC Digital Output Supply Current Test Conditions VIL Low Level Input Voltage Digital Inputs High Level Output Voltage IOH = -100A * Digital Outputs * Digital Outputs PABC and PABC Duty Cycle Unit 10.5 V mA 5.25 1.5 VOH DC Max. 10 4.75 High Level Input Voltage Low Level Output Voltage Typ. 9.5 30 VIH VOL Min. Digital Inputs V mA 4.2 V 0.8 4.9 9.8 V V V IOL = 100A * Digital Outputs * Digital Outputs PABC and PABC MCLK Output, CL = 15pF 40 0.1 0.2 V V 60 % 7537H-03.TBL Symbol Symbol VTAC Parameter Max Carrier Output AC Voltage HD2 Second Harmonic Distortion HD3 Third Harmonic Distortion FD FSK Peak-to-peak Deviation Test Conditions RL = 5.6k RL(AVSS) = 5.6k R(ATO, PAFB) = 1k Min. 0.8 Typ. Max. Unit 1.0 1.3 VRMS - 50 dB - 60 dB 1200 Hz 5/9 7537H-04.TBL TRANSMITTER ELECTRICAL CHARACTERISTICS (A/DVDD = 10V, A/DVSS = 0V, DVCC = 5V and 0oC Tamb 70oC, unless otherwise specificied) ST7537HS1 RECEIVER ELECTRICAL CHARACTERISTICS (A/DVDD = 10V, A/DVSS = 0V, DVCC = 5V and 0oC Tamb 70oC, unless otherwise specificied) Parameter VIN Input Sensitivity VIN Maximum Input Signal Test Conditions Min. Typ. Max. Unit 1 10 mVRMS 2 VRMS RIN Input Impedance GRx Receive Gain f = 132.45kHz 15 k BER Bit Error Rate (1) S/N = 15dB, S = 10mVRMS, N : white tDEM Demodulation Time Alternate 0 , 1 sequence 3 VCD Carrier Detection Level f = 132.45kHz, sine wave 5 20 dB 10-5 10-3 T bit 10 mVRMS ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 7537H-05.TBL Symbol Note 1 : This parameter is guaranteed by correlation ADDITIONAL DIGITAL AND ANALOG FUNCTIONS ELECTRICAL CHARACTERISTICS (A/DVDD = 10V, A/DVSS = 0V, DVCC = 5V and 0oC Tamb 70oC, unless otherwise specificied) Parameter Test Conditions Min. Typ. Max. Unit VRH High Level Reset Voltage See Figure 2 7.9 V VRL Low Level Reset Voltage See Figure 2 7.6 V tRST Reset Time See Figure 2 50 ms tWD Watch-dog Pulse Width See Figure 2 500 ns tWM Watch-dog Pulse Period See Figure 2 800 s tOUT Watch-dog Time Out See Figure 2 tCD Carrier Detection Time See Figure 3 3 1.5 s 6.5 ms 7537H-06.TBL Symbol Figure 2 : Reset and Watch-dog Timing Chart VRH DV DD VRL t RST t OUT t RST RSTO WD t WM 7537H-04.EPS t WD Figure 3 : Carrier Detection Timing Chart VC D RAI 6/9 t CD 7537H-05.EPS t CD CD ST7537HS1 FILTER TEMPLATES Frequency (kHz) 92 126.45 Ref 132.45 138.45 180 Min. -5 -5 Intermediate FrequencyFilter Gain (dB) Typ. -3 0 -3 Frequency (kHz) Max. - 30 -2 2.4 4.3 Ref 5.4 6.5 11.6 -2 - 30 Min. -4 -5 Gain (dB) Typ. -3 0 -3 Max. - 35 -1 7537H-07.TBL Receive and Transmit Filter -2 - 35 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O APPLICATION SCHEMATIC INFORMATIONS RESISTORS CAPACITORS R1 180 C1 1F R2 2.2 C2 470nF R3 2.2 C3 (2) 22pF 10% Ceramic 10V R4 2.2 C4 (2) 22pF 10% Ceramic 10V R5 2.2 C5 100nF 10% Ceramic 10V R6 180 C6 6.8nF 5% Plastic Film 50V R7 47k C7 100nF R8 1k R9 1k R11 47k INDUCTOR L1 10H 1.5 Ceramic 10V C8 2.2F C9 100nF C10 2.2F C11 (1) 100nF Ceramic 10V C12 (1) 100nF Ceramic 10V TRANSISTORS Q1 : 2N2907 Q2 : 2N2222 Q3 : 2N2222 Q4 : 2N2907 Q5 : 2N2907 Q6 : 2N2222 Paper, class X2 Ceramic 10V TRANSIL TRL1 : SGS-THOMSON P6KE6V8CP TRANSFORMER TR1 : TOKO T1002 N 7537H-08.TBL 5% Ceramic 50 CRYSTAL QTZ1 : 11.0592MHz parallel resonance Notes : 1. 2. These capacitors might not be necessary if the overall power supplies decoupling is sufficient. The value of these capacitors depends on the crystal parameters. 7/9 ST7537HS1 APPLICATION SCHEMATIC DIAGRAM +10V C7 Q5 C8 R11 C5 Thermal coupling R1 C10 Q2 2 AVDD DVDD C9 1 27 26 DEMI IFO R3 R9 VCM RAI 3 PAFB 6 ATO 7 PABC 8 PABC 9 RxFO 4 R2 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O S T 7 5 3 7 H S 1 MICROCONTROLLER INTERFACE 18 MCLK 19 WD 20 Rx/Tx 21 CD 22 TxD 23 RxD 24 RSTO R8 Q1 C11 Q3 C1 R5 TEST1 10 R4 L1 TEST2 11 Q4 TEST3 12 TEST4 13 R6 C6 25 DV CC TXIFI AVSS DV SS 28 XTAL1 XTAL2 16 17 15 5 R7 QTZ1 C12 C3 MAINS 50/60Hz TRL1 5V C2 C4 Q6 Thermal coupling 0V 8/9 7537H-06.EPS 14 ST7537HS1 PACKAGE MECHANICAL DATA 28 PINS - PLASTIC CHIP CARRIER B M M1 2 1 28 26 e3 E e F M1 25 M 4 5 F1 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 11 12 19 18 D2 A G (Seating Plane Coplanarity) A B D D1 D2 E e e3 F F1 G M M1 Min. 12.32 11.43 4.2 2.29 0.51 9.91 Millimeters Typ. Max. 12.57 11.58 4.57 3.04 10.92 Min. 0.485 0.450 0.165 0.090 0.020 0.390 1.27 7.62 0.46 0.71 D Inches Typ. Max. 0.495 0.456 0.180 0.120 0.430 0.050 0.300 0.018 0.028 0.101 1.24 1.143 0.004 PLCC28.TBL Dimensions PMPLCC28.EPS D1 0.049 0.045 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1995 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 9/9