AP3125A/V/L/R
Document number: DS36660 Rev. 2 - 2
July 2014
© Diodes Incorporated
A Product Line of
Diodes Incorporated
Operation Description
The AP3125A/V/L/R is specifically designed for off-line AC-DC
power supply used in LCD monitor, notebook adapter and battery
charger applications. It offers a cost effective solution with a
versatile protection function.
Start-up Current and UVLO
The start-up current of AP3125A/V/L/R is optimized to realize ultra
low current (1mA typical) so that VCC capacitor can be charged
more quickly. The direct benefit of low start-up current is the
availability of using large start-up resistor, which minimizes the
resistor power loss for high voltage AC input.
An UVLO comparator is included in AP3125A/V/L/R to detect the
voltage on VCC pin. It ensures that AP3125A/V/L/R can draw
adequate energy from hold-up capacitor during power-on. The turn-
on threshold is 16V and the turn-off threshold is 7.6V.
Current Sense Comparator and PWM Latch
The AP3125A/V/L/R operates as a current mode controller, the
output switch conduction is initiated by every oscillator cycle and is
terminated when the peak inductor current reaches the threshold
level established by the FB pin. The inductor current signal is
converted to a voltage signal by inserting a reference sense resistor
RS. The inductor current under normal operating conditions is
controlled by the voltage at FB pin. The relation between peak
inductor current (IPK) and VFB is:
Moreover, FOCP with 1.8V threshold is only about 100ns delay,
which can avoid some catastrophic damages such as secondary
rectifier short test. Few drive cycles can alleviate the destruction
range and get better protection.
Leading-edge Blanking
A narrow spike on the leading edge of the current waveform can
usually be observed when the power MOSFET is turned on. A
250ns leading-edge blank is built-in to prevent the false-triggering
caused by the turn-on spike. During this period, the current limit
comparator is disabled and the gate driver can not be switched off.
At the time of turning off the MOSFET, a negative undershoot
(maybe larger than -0.3V) can occur on the SENSE pin. So it is
strongly recommended to add a small RC filter or at least connect a
resistor “R” on this pin to protect the IC (Shown as Figure 1).
FB
SENSE
GATE
GND
CTRL 6
1
3
4
AP3125A/
V/L/R
VCC
5
2
Large undershoot (more than
-0.3V) may damage the SENSE pin
R
C
Necessary
Figure 1
Built-in Slope Compensation
It is well known that a continuous current mode SMPS may become
unstable when the duty cycle exceeds 50%. The built-in slope
compensation can improve the stability, so there is no need for
design engineer to spend much time on that.
FB Pin and Short Circuit Protection
This pin is normally connected to the opto-coupler and always
paralleled with a capacitor for loop compensation. When the voltage
at this pin is greater than 4.5V and lasts for about 70ms, the IC will
enter the protection mode. For AP3125A/V/L/R, the system will
enter hiccup mode to wait the VCC decreasing to low UVLO level,
then the IC will try to restart until the failure removed. And when this
voltage is less than 1.55V, the IC will stop the drive pulse
immediately. Therefore, this feature can be used for short circuit
protection, which makes the system immune from damage.
Normally, output short makes the VFB value to the maximum
because the opto-coupler is cut off.
VCC Maintain Mode
During light load or step load, VFB will drop and be lower than 1.55V,
thus the PWM drive signal will be stopped, and there is no more
new energy transferred due to no switching. Therefore, the IC
supply voltage may reduce to the shutdown threshold voltage and
system may enter the unexpected restart mode. To avoid this, the
AP3125A/V/L/R hold a so-called VCC maintain mode which can
supply energy to VCC.
When VCC decreases to a setting threshold, the VCC maintain
comparator will output some drive signal to make the system switch
and provide a proper energy to VCC pin. The VCC maintain function
will cooperate with the PWM and burst mode loop which can make
the output voltage variation be within the regulation. This mode is
very useful for reducing startup resistor loss and achieving a better
standby performance with a low value VCC capacitor. The VCC is
not easy to touch the shutdown threshold during the startup process
and step load. This will also simplify the system design. The
minimum VCC voltage is suggested to be designed a little higher
than VCC maintain threshold thus can achieve the best balance
between the standby and step load performance。
System Protection and Pin Fault Protection
The AP3125A/V/L/R provides versatile system and pin fault
protections. The OCP comparator realizes the cycle-by-cycle
current limiting (OCP). In universal input line voltage, the IC realizes
the constant over load protection (OLP). VCC over voltage
protection can be applied as the primary OVP or opto-coupler
broken protection. The AP3125A/V/L/R also has pin fault
connection protection including floating and short connection. The
floating pin protection includes the SENSE, FB, etc. The short pin
protection includes the CTRL pin short protection. When these pins
are floated or CTRL pin is shorted to ground, PWM switching will be
disabled, thus protecting the power system.
Latch Protection Function
For some applications, the system requires the latch protection
function. The CTRL pin has two kinds of modes to trigger the latch
protection: high level trigger and low level trigger. The low threshold
is 1V and high threshold voltage is 3V. Some version will have only
one mode. Once the latch protection is triggered, the IC will disable
the output signal, and the bulk capacitor provides the energy to IC
through the startup resistor to ensure the IC disable the output
(latch mode). This mode will be not released until the AC input is
shut off. So, the de-latch time is mainly depending on the HV
startup bulk capacitor value. Therefore, if the system wants a short
de-latch time, it is better for the startup resistor take power from the
point before the rectifier bridge as illustrated in Figure 2.