MB3793-42PNF-G-JN-ER-6E1 - CYPRESS SEMICONDUCTOR

Spansion® Analog and Microcontroller

Products

The following document contains information on Spansion analog and microcontroller products. Although the

document is marked with the name “Fujitsu”, the company that originally developed the specification, Spansion

will continue to offer these products to new and existing customers.

Continuity of Specifications

There is no change to this document as a result of offering the device as a Spansion product. Any changes that

have been made are the result of normal document improvements and are noted in the document revision

summary, where supported. Future routine revisions will occur when appropriate, and changes will be noted in a

revision summary.

Continuity of Ordering Part Numbers

Spansion continues to support existing part numbers beginning with “MB”. To order these products, please use

only the Ordering Part Numbers listed in this document.

For More Information

Please contact your local sales office for additional information about Spansion memory, analog, and

microcontroller products and solutions.

DS04-27402-5Ea

FUJITSU MICROELECTRONICS

DATA SHEET

2006.5

ASSP

BIPOLAR

POWER-VOLTAGE MONITORING IC

WITH WATCHDOG TIMER

MB3793-42

■DESCRIPTION

The MB3793 is an integrated circuit to monitor power voltage; it incorporates a watchdog timer.

A reset signal is output when the pow er is cut or f alls abruptly. When th e pow er recov ers normally after resetting,

a pow er-on r eset signal i s output to microprocessor unit s (MPUs). An inte rnal watchdog time r with tw o inputs for

system operation diagnosis can provide a fail-safe function for various application systems .

There is also a mask optio n th at can de te ct voltages of 4.9 to 2.4V in 0.1- V step s.

The model number and package code are as shown below.

■FEATURES

• Precise detection of power voltage fall: ±2.5%

• Detection voltage with hysteresis

• Low power dispersion: ICC = 27 µA (reference )

• Internal dual-input watchd og timer

• Watchdog timer halt function (by inhibit ion terminal)

• Independently-set watchdog and reset times

• Mask option for detection voltage (4.9 to 2.4 V, 0.1-V steps)

• Two types of packages (SOP-8pin : 2 types)

■APPLICATION

• Arcade Amusement etc.

Model No. Marking Code Detection voltage

MB3793-42 3793-A 4.2 V

MB3793-42

■PIN ASSIGNMENT

■PIN DESCRIPTION

Pin No. Symbol Description Pin No. Symbol Description

1 RESET Outputs reset 5 VCC Power supply

2 CTW Sets monitoring time 6 INH Inhibits watchdog timer function

3 CTP Sets power-on reset hold time 7 CK2 Inputs clock 2

4 G ND Ground 8 CK1 Inputs clock 1

RESET

CTW

CTP

GND

CK1

CK2

INH

VCC

(FPT-8P-M01)

(FPT-8P-M02)

(TOP VIEW)

MB3793-42

■BLOCK DIAGRAM

CTP

RESET

INH

CTW

CK1

CK2

VCC

GND

Comp. O

I1 ≅ 3 µAI2 ≅ 30 µA

R1 ≅

590 kΩ

RSFF2

RSFF1

Comp. S

−

VREF ≅ 1.24 V R2 ≅

240 kΩ

−

To VCC of all blocks

Output

buffer

Pulse generator 1

Pulse generator 2

To GND of all blocks

Watchdog

timer

Reference

voltage

generator

MB3793-42

■BLOCK FUNCTIONS

1. Comp. S

Comp. S is a comparator with hysteresis to compare the reference voltage with a voltage (VS) that is the result

of dividing the power voltage (VCC) by resistors R1 and R2. When VS falls below 1.24 V, a reset signal is output.

This function enables the MB 37 9 3 to dete ct an ab no rmality withi n 1 µs when the power is cut or falls abruptly.

2. Comp. O

Comp. O is a comparator to control the reset signal (RESET) output and compares the threshold voltage with

the voltage at t he CTP terminal for setting the power-on reset hold time. When the voltage at the CTP terminal

exceeds the threshold voltage, r esetting is canceled.

3. Reset output buffer

Since the reset (RESET) output buffer has CMOS organization, no pull-up resist or is needed.

4. Pulse generator

The pulse generator generates pulses when the voltage at the CK1 and CK2 input clock terminals changes to

High from Low level (positive-edge trigge r) and exceeds the threshold voltage; it sends the clock signal to the

watchdog timer.

5. Watchdog timer

The watchdog timer can monitor two clock pulses. Short-circuit the CK1 and CK2 clock ter minals to monitor a

single clock pulse.

6. Inhibition terminal

The inhibition (INH) ter minal forces the watchdog timer on/off. When this terminal is High level, the watchdog

timer is stopped.

7. Flip-flop cir cu it

The flip-flop circuit RSFF1 controls charging and discharging of the power-on reset hold time setting capacity

(CTP). The flip-flop circuit RSFF2 s witches th e charging accelerator f or ch arging CTP during rese tting on/off . This

circuit only functions during resetting and does not function at power-on reset.

MB3793-42

■ABSOLUTE MAXIMUM RATINGS

*: The power voltage is based on the ground vo ltage (0 V).

WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,

temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.

■RECOMMENDED OPERATING CONDITIONS

WARNING: The recommended operating conditions are req uired in order to ensure the normal operation of the

semiconductor device. All of the device’s electrical characteristics are warranted when the device is

operated within these ranges.

Always use semiconduct or devices within th eir recommended operating cond ition ranges. Operation

outside these ranges may adversely affect reliability and could result in device failure.

No warranty is made with respect to uses, operating conditions, or combinations not represented on

the data sheet. Users considering application outside the listed conditions are advised to contact their

representatives beforehand.

Parameter Symbol Rating Unit

Min Max

Power voltage* VCC −0.3 +7V

Input voltage*

CK1 VCK1

−0.3 +7VCK2 VCK2

INH VINH

Reset output voltage

(direct curren t) RESET IOL

IOH −10 +10 mA

Power dissipation (Ta ≤ +85°C) PD⎯200 mW

Storage temperature Tstg −55 +125 °C

Parameter Symbol Value Unit

Min Typ Max

Power supply voltage VCC 1.2 5.0 6.0 V

Reset (RESET) output current IOL

IOH −5⎯+5mA

Power-on reset hold time setting capacity CTP 0.001 0.1 10 µF

Watchdog timer monitoring time setting capacity CTW 0.001 0.1 1 µF

Watchdog timer monitoring time tWD 0.1 ⎯1500 ms

Operating ambient temperature Ta −40 +25 +85 °C

MB3793-42

■ELECTRICAL CHARACTERISTICS

1. DC Characteristics

*1: At cloc k input terminals CK1 and CK2, the pulse input frequency is 1 kHz an d the pulse amplitude is 0 V to VCC.

*2: Inhibition input is at High level.

(VCC = +5 V, Ta = +25°C)

Parameter Symbol Conditions Value Unit

Min Typ Max

Power current ICC1 Watchdog timer operation*1⎯27 50 µA

ICC2 Watchdog timer halt*2⎯25 45

Detection voltage

VSL VCC falling Ta = +25°C 4.10 4.20 4.30 V

Ta = −40 to +85°C 4.05 4.20 4.35

VSH VCC rising Ta = +25°C 4.20 4.30 4.40 V

Ta = −40 to +85°C 4.15 4.30 4.45

Detection voltage

hysteresis difference VSHYS VSH - VSL 50 100 150 mV

CK input threshold voltage VCIH ⎯(1.4) 1.9 (2.5) V

VCIL ⎯(0.8) 1.3 (1.8) V

CK input hysteresis VCHYS ⎯(0.4) 0.6 (0.8) V

INH input voltage VIIH ⎯3.5 ⎯VCC V

VIIL ⎯000.8V

Input current

(CK1,CK2,INH) IIH VCK = VCC ⎯01.0µA

IIL VCK = 0 V −1.0 0 ⎯µA

Reset output voltage VOH IRESET = −5 mA 4.5 4.75 ⎯V

VOL IRESET = +5 mA ⎯0.12 0.4 V

Reset-output minimum

power voltage VCCL IRESET = +50 µA⎯0.8 1.2 V

MB3793-42

2. AC Characteristics

*: The voltage range is 10% to 90% at testing the reset ou tput transition time.

(VCC = +5 V, Ta = +25°C)

Parameter Symbol Conditions Value Unit

Min Typ Max

Power-on reset hold time tPR CTP = 0.1 µF 80 130 180 ms

Watchdog time r monitoring time tWD CTW = 0.01 µF

CTP = 0.1 µF7.5 15 22.5 ms

Watchdog timer reset time tWR CTP = 0.1 µF 5 10 15 ms

CK input pulse duration tCKW ⎯500 ⎯⎯ns

CK input pulse cycle tCKT ⎯20 ⎯⎯µs

Reset (RESET) output transition time Rising tr* CL = 50 pF ⎯⎯500 ns

Falling tf* CL = 50 pF ⎯⎯500 ns

MB3793-42

■TIMING DIAGRAM

1. Basic operation (Positive clock pulse)

CTP

RESET

INH

CTW

CK1

CK2

VSH

VCC

VSL

VCCL

Vth

(1) (2) (3) (4) (5) (5) (6) (7) (8) (9) (10) (11) (12) (13) (14)

tPR tWD tPR

tWR

tCKW

MB3793-42

2. Basic operation (Negative clock puls e)

CTP

RESET

INH

CTW

CK1

CK2

VSH

VCC

VSL

VCCL

Vth

tPR tWD tPR

tWR

tCKW

(1) (2) (3) (4) (5) (5) (6) (7) (8) (9) (10) (11) (12) (13) (14)

MB3793-42

3. Single-clock input monitoring (Positive clock pulse)

CTP

RESET

CTW

CK1

Vth

CK2

tWR

tCKW

tCKT

tWD

Note: The MB3793 can monitor only one clock.

The MB3793 checks the clock signal at every other input pulse. Therefore, set watchdog

timer monitor t i me tWD to the time that allows the MB3793 to monitor the period twice as

long as the input clock pu lse.

MB3793-42

4. Inhibition operation (Positive clock pulse)

CTP

RESET

INH

CTW

CK1

CK2

VSH

VCC

VSL

VCCL

Vth

tPR tWD tPR

tWR

tCKW

(1) (2) (3) (4) (5) (5) (6) (7) (8) (9) (10) (11) (12) (13) (14)

MB3793-42

5. Cloc k pulse input (Positive clock pulse)

6. Inhibition input rising and falling time

CTW

CK1

CK2

Note: The MB3793 wa tchd og timer m onit or s Clock 1 (CK1) and Clock 2 (CK2) pulses al-

ternately. When a CK2 pulse is detected after detecting a CK1 pulse, the monitor-

ing time setting capacity (CTW) switches to charging from discharging.

When two consecutive pulses occur on one side of this alternation before switch-

ing, the second pulse is igno red. In the above figure, pulses *1 and *2 are ignored.

INH

90 %

10 %

90 %

10 %

VCC

0 V

tfitri

MB3793-42

■OPERATION SEQUENCE

The operat ion sequence is explained b y using “■ TIMING DIAGRAM 1. Basic operation (P osi tiv e clock pulse)”.

The following item numbers correspond to the numbers in “■ TIMING DIAGRAM 1. Basic operation (Positive

clock pulse)”.

(1)When the power voltage (VCC) reaches about 0. 8 V (VCCL), a reset signal is output.

(2)When VCC exceeds the rising-edge detection voltage (VSH), charging of power-on reset hold time setting

capacitance (CTP) is started. VSH is about 4.3 V.

(3)When the voltage at the CTP ter minal setting the power-on reset hold time exceeds the threshold voltage

(Vth), resetti ng is canceled and th e voltage at the RESET terminal changes to High lev el to start charging of

the wat chdog timer monitoring time setting capacitance (CTW). Vth is about 3.6 V.

The power-on reset hold time (tPR) can be calculated by the following equ ation.

tPR (ms) ≈ A × CTP (µF)

Where, A is about 1300.

(4)When the voltage at the CTW terminal setting the monitoring time reaches High leve l (VH), CTW switches to

discharging from chargin g. VH is about 1.24 V (reference value).

(5)When clock pulses are input to the CK2 ter minal during CTW discharging a fter clock pulses are in put to the

CK1 terminal—posit ive-edge trigger, CTW switches to charging.

(6)If clock pulse input does not occur at either the CK1 or CK2 clock terminals during the watchdog timer

monitoring time (tWD), the CTW v oltage falls below Lo w lev el (VL), a reset signal is ou tput , and t he voltage at

the RESET terminal changes to Low level. VL is about 0.24 V.

tWD can be calculated from the following equation.

tWD (ms) ≈ B × CTW (µF) + C × CTP (µF)

Where, B is about 1500. C is about 3; it is much smaller than B.

Hence, when CTP / CTW ≤ 10, the calculation can be simplified as follows:

tWD (ms) ≈ B × CTW (µF)

(7)When the voltage of the CTP terminal exceeds Vth again as a result of recharging CTP, resetting is canceled

and the watchdog timer restarts monitoring.

The watchdog timer reset time (tWR) can be calculated by the following equation.

tWR (ms) ≈ D × CTP (µF)

Where, D is about 100.

(8)When VCC f alls below the rising-edge detection v oltage (VSL), the voltage of the CTP terminal falls and a reset

signal is output, and the voltage at the RESET terminal changes to Low level. VSL is about 4.2 V.

(9)When VCC exceeds VSH, CTP begins charging.

(10)When the voltage of the CTP terminal exceeds Vth, resetting is canceled and the watchdog timer restarts.

(11)When an inhibition signal is input (INH terminal is High level), the watchdog timer is halted forcibly.

In this case, VCC monitoring is continued without the watchdog timer.

The watc hdog timer does not function unless this inh ibition input is canceled.

(12)When the inhibition input is canceled (INH terminal is Low lev el), the watchdog timer restarts.

(13)When the VCC voltage falls below VSL after power-off, a reset signal is output.

(14)When the power voltage (VCC) falls below about 0.8 V (VCCL) , a reset signal is released.

Similar operation is also performed for negative clock-pulse input (“■ TIMING DIAGRAM 2. Basic operation

(Negative clock pulse)” ).

Shor t-circuit the clo ck ter minals CK1 and CK2 to monit or a single clock. The basic operation is the same but

the clock pulses are monitored at every other pulse (■ TIMING Diagram 3. Single-clock input monitoring).

MB3793-42

■TYPICAL CHARACTERISTICS

(Continued)

MB3793-42

CTW CTP

VINH VCC

0.01 µF0.1 µF

0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10

(VINH = 0 V)

(VCC < VSH)

Ta = +25 °C

Ta = +85 °C

Ta = −40 °C

0012345678910

100

200

300

400

500 VRESET IRESET

Ta RON

98 mV

+5 mA

−40 °C19.6 Ω

135 mV

+25 °C27 Ω

167 mV

+85 °C33.4 Ω

4.0 −20−40 0 +20 +40 +60 +80+100

4.1

4.2

4.3

4.4

4.5

VSH

VSL

Ta = +25 °C

Ta = +85 °C

Ta = −40 °C

4.00−1−2−3−4−5−6−7−8−9−10

4.1

4.2

4.3

4.4

4.5

4.6

4.7

4.8

4.9

5.0

VRESET IRESET

Ta RON

4.800 V

−5 mA

−40 °C40 Ω

4.750 V

+25 °C50 Ω

4.707 V

+85 °C58.6 Ω

Power Current - Power Voltage

Power current

ICC (µA)

Power voltage VCC (V)

Watchdog timer monitoring

Watchdog timer stopping

(VINH = VCC)

Reset Inhibited

Detection voltage

VSH and VSL (V)

Operating am bient temperat ur e T a (°C)

Reset output current I RESET (mA)

Reset output voltage

V RESET (V)

Reset Output Voltage - Reset Output Current

(P-MOS side) Reset Output Voltage - Reset Output Current

(N-MOS side)

Reset output voltage

V RESET (mV)

Reset output current I RESET(mA)

f = 1 kHz

Duty = 10%

VL = 0 V

VH = VCC

Detection Volt age - Ope r at in g ambient Temperature

MB3793-42

(Continued)

001234567

Ta = +85 °C

Ta = +25 °C

Ta = −40 °C

−40 −20 0 +20 +40 +60 +80 +100

100

120

140

160

180

200

220

240

260

−40 −20 0 +20 +40 +60 +80 +100

Reset Output Voltage - Power Voltage

Power voltage VCC (V)

Reset output voltage

VRESET (V)

Pull-up resistance: 100 kΩ

Reset-on Reset Time - Operating

ambient temperature (when VCC rising)

Operating ambi ent temperature Ta (°C)

Power-on reset time

tPR (ms)

Watchdog Timer Monitoring Reset Time - Operating

ambient temperature (when monitoring) Watchdog Timer Monitoring Time -

Operating ambient temperature

Operating ambi ent temperature Ta (°C) Operating ambient temperature Ta (°C)

Watchdog timer monitoring reset time

tWR (ms)

Watchdog timer monitoring time

tWD (ms)

MB3793-42

(Continued)

104

103

102

101

10 −1

10−410−310−210−1110

1102

Ta = −40 °C

Ta = +25 °C

Ta = +85 °C

103

102

101

10−1

10−410−310−210−1110

1102

10−2

Ta = −40 °C

Ta = +25 °C

Ta = +85 °C

103

102

101

10−1

10−410−310−210−1110

10−5

Ta = −40 °C

Ta = +25 °C

Ta = +85 °C

104

103

102

101

10−1

10−410−310−210−1110

10−5

CTP = 0.01 µF

CTP = 0.1 µF

CTP = 1 µF

Power-on Reset Ho ld Time - CTP Capacitance Reset Time - CTP Capacitance

Power-on reset hold time

tPR (ms)

Power-on reset time setting capacitance

CTP (µF) Power-on reset time setting capacitance

CTP (µF)

Watchdog Timer Monitoring Time - CTW Capacitance

(under Ta condition) Watchdog Timer Monitoring Time -

CTW Capacitance

Watchdog timer monitoring time

tWD (ms)

Watchdog timer monitoring time setting capacitance

CTW (µF) Watchdog timer monitoring time setting capacita nce

CTW (µF)

Watchdog timer monitoring time

tWD (ms) Reset Time

tWR (ms)

MB3793-42

■STANDARD CONNECTION

Equation of time-setting capacitances (CTP and CTW) and set time

tPR (ms) ≈ A × CTP (µF)

tWD (ms) ≈ B × CTW (µF) + C × CTP (µF)

However, when CTP/CTW ≤ 10,

tWD (ms) ≈ B × CTW (µF)

tWR (ms) ≈ D × CTP (µF)

Value of A, B, C and D

(Example) When CTP = 0.1 µF and CTW = 0.01 µF,

tPR ≈ 130 [ms]

tWD ≈ 15 [ms]

tWR ≈ 10 [ms]

A B C D Remark

1300 1500 3100

VCC

CTW CTP

CTW

CTP CK1

CK2

INH GND

RESET

RESET VCC

GND

RESET VCC

GND

MB3793

6 4

Micro-

processor 1 Micro-

processor 2

MB3793-42

■APPLICATION EXAMPLE

1. Monitoring Single Clock

2. Watchdog Timer Stopping

VCC

CTW CTP

CTW

CTP CK1

CK2INH GND

RESET

RESET VCC

GND

MB3793

Micro-

processor

VCC

CTW CTP

CTW

CTP CK1

CK2GND

RESET

RESET VCC

GND

RESET VCC

GND

MB3793

INH

HALT HALT

Micro-

processor1 Micro-

processor2

MB3793-42

■NOTES ON USE

• Take account of common impedance when designing the earth line on a printed wiring board.

• Take measures against static electricity.

- For semiconductors, use antistatic or conductive containers.

- When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container.

- The work table, tools and measuring instruments must be grounded.

- The worker must put on a grounding device containi ng 250 kΩ to 1 MΩ resistors in series.

• Do not apply a negative v oltage

- Applying a negative voltage of −0.3 V or less to an LSI may generate a parasitic transistor, resulting in

malfunction.

■ORDERING INFORMATION

■RoHS Compliance Information of Lead (Pb) Free version

The LSI products of Fujitsu Microelectronics with “E1” are compliant with RoHS Directive , and has observed

the standard of lead, cadmium, mercury, Hexa v alent chromium, polybrominated biphenyls (PBB) , and polybro-

minated diphenyl ethers (PBDE) .

The product that conforms to this standar d is added “E1” at the end of th e part number.

Part number Package Remarks

MB3793-42PF-❏❏❏ 8-pin plastic SOP

(FPT-8P-M01) Conventional version

MB3793-42PNF-❏❏❏ 8-pin plastic SOP

(FPT-8P-M02) Conventional version

MB3793-42PF-❏❏❏E1 8-pin plastic SOP

(FPT-8P-M01) Lead Free version

MB3793-42PNF-❏❏❏E1 8-pin plastic SOP

(FPT-8P-M02) Lead Free version

MB3793-42

■MARKING FORMAT (Lead Free version)

INDEX

3793-A

E1XXXX

XXX

3793-A

XXXX

E1 XXX

Lead Free version

SOP-8

(FPT-8P-M02)

SOP-8

(FPT-8P-M01)

MB3793-42

■LABELING SAMPLE (Lead free version)

2006/03/01

ASSEMBLED IN JAPAN

QC PASS

(3N) 1MB123456P-789-GE1

1000

(3N)2 1561190005 107210

1,000

PCS

0605 - Z01A

1000

1/1

1561190005

MB123456P - 789 - GE1

Lead Free version

lead-free mark

JEITA logo JEDEC logo

MB3793-42

■MB3793-42PF-❏❏❏E1, MB3793-42PNF-❏❏❏E1

RECOMMENDED CONDITIONS OF MOISTURE SENSITIVITY LEVEL

[Temperature Profile for FJ Standard IR Reflow]

(1) IR (infrar ed reflow)

(2) Manu al soldering (partial heating method)

Conditions : Temperature 400 °C Max

Times : 5 s max/pin

Item Condition

Mounting Method IR (infrared reflow) , Manual soldering (partial heating method)

Mounting times 2 times

Storage period

Before opening Please use it within two years after

Manufacture.

From opening to the 2nd

reflow Less than 8 days

When the storage period after

opening was exceeded Please processes within 8 days

after baking (125 °C, 24H)

Storage conditions 5 °C to 30 °C, 70%RH or less (the lowest possible humidity)

260 °C

(e)

(d')

(d)

255 °C

170 °C

190 °C

RT (b)

(a)

(c)

Note : Temperature : the top of the package body

(a) Temperatu re Increase gradient : Average 1 °C/s to 4 °C/s

(b) Preliminary heating : Temperature 170 °C to 190 °C, 60s to 180s

(d) Actual heating : Temperature 260 °C Max; 255 °C or more, 10s or less

(d’) : Temperature 230 °C or more, 40s or less

Temperature 225 °C or more, 60s or less

Temperature 220 °C or more, 80s or less

(e) Cooling : Natural cooling or forced cooling

H rank : 260 °C Max

MB3793-42

■PACKAGE DIMENSIONS

(Continued)

8-pin plastic SOP Lead pitch 1.27 mm

Package width

package length

5.3× 6.35 mm

Lead shape Gullwing

Sealing method Plastic mold

Mounting height 2.25 mm MAX

Weight 0.10 g

Code

(Reference) P-SOP8-5.3×6.35-1.27

8-pin plastic SOP

(FPT-8P-M01)

2002 FUJITSU LIMITED F08002S-c-6-7

0.13(.005) M

Details of "A" part

7.80±0.405.30±0.30

(.209±.012) (.307±.016)

.250 –.008

+.010

–0.20

+0.25

6.35

INDEX

1.27(.050)

0.10(.004)

0.47±0.08

(.019±.003)

–0.04

+0.03

0.17

.007 +.001

–.002

"A" 0.25(.010)

(Stand off)

0~8˚

(Mounting height)

2.00 +0.25

–0.15

.079 +.010

–.006

0.50±0.20

(.020±.008)

0.60±0.15

(.024±.006)

0.10 +0.10

–0.05

–.002

+.004

.004

0.10(.004)

Dimensions in mm (inches).

Note: The values in parentheses are reference values.

Note 1) *1 : These dimensions include resin protrusion.

Note 2) *2 : These dimensions do not include resin protrusion.

Note 3)Pins width and pins thickness include plating thickness.

Note 4) Pins width do not include tie bar cutting remainder.

MB3793-42

(Continued)

8-pin plastic SOP Lead pitch 1.27 mm

Package width

package length

3.9 × 5.05 mm

Lead shape Gullwing

Sealing method Plastic mold

Mounting height 1.75 mm MAX

Weight 0.06 g

8-pin plastic SOP

(FPT-8P-M02)

2002 FUJITSU LIMITED F08004S-c-4-7

1.27(.050)

3.90±0.30 6.00±0.40

.199 –.008

+.010

–0.20

+0.25

5.05

0.13(.005) M

(.154±.012) (.236±.016)

0.10(.004)

0.44±0.08

(.017±.003)

–0.07

+0.03

0.22

.009 +.001

–.003

45˚

0.40(.016) "A" 0~8˚

0.25(.010)

(Mounting height)

Details of "A" part

1.55±0.20

(.061±.008)

0.50±0.20

(.020±.008)

0.60±0.15

(.024±.006)

0.15±0.10

(.006±.004)

(Stand off)

0.10(.004)

Dimensions in mm (inches).

Note: The values in parentheses are reference values.

Note 1) *1 : These dimensions include resin protrusion.

Note 2) *2 : These dimensions do not include resin protrusion.

Note 3)Pins width and pins thickness include plating thickness.

Note 4) Pins width do not include tie bar cutting remainder.

MB3793-42

MEMO

MB3793-42

MEMO

MB3793-42

MEMO

FUJITSU MICROELECTRONICS LIMITED

Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku,

Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387

http://jp.fujitsu.com/fml/en/

For further information please contact:

North and South America

FUJITSU MICROELECTRONICS AMERICA, INC.

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Sunnyvale, CA 94085-5401, U.S.A.

Tel: +1-408-737-5600 Fax: +1-408-737-5999

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Europe

FUJITSU MICROELECTRONICS EUROPE GmbH

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Germany

Tel: +49-6103-690-0 Fax: +49-6103-690-122

http://emea.fujitsu.com/microelectronics/

Korea

FUJITSU MICROELECTRONICS KOREA LTD.

206 KOSMO TOWER, 1002 Daechi-Dong,

Kangnam-Gu,Seoul 135-280

Korea

Tel: +82-2-3484-7100 Fax: +82-2-3484-7111

http://www.fmk.fujitsu.com/

Asia Pacific

FUJITSU MICROELECTRONICS ASIA PTE LTD.

151 Lorong Chuan, #05-08 New Tech Park,

Singapore 556741

Tel: +65-6281-0770 Fax: +65-6281-0220

http://www.fujitsu.com/sg/services/micro/semiconductor/

FUJITSU MICROELECTRONICS SHANGHAI CO., LTD.

Rm.3102, Bund Center, No.222 Yan An Road(E),

Shanghai 200002, China

Tel: +86-21-6335-1560 Fax: +86-21-6335-1605

http://cn.fujitsu.com/fmc/

FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.

10/F., World Commerce Centre, 11 Canton Road

Tsimshatsui, Kowloon

Hong Kong

Tel: +852-2377-0226 Fax: +852-2376-3269

http://cn.fujitsu.com/fmc/tw

The contents of this document are subject to change without notice.

Customers are advised to consult with sales representatives before ordering.

The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose

of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS

does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporat-

ing the device based on such information, you must assume any responsibility arising out of such use of the information.

FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.

Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use

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or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or

other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual

property rights or other rights of third parties which would result from the use of information contained herein.

The products described in this document are designed, developed and manufactured as contemplated for general use, including without

limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured

as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect

to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in

nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in

weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).

Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising

in connection with above-mentioned uses of the products.

Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by

incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current

levels and other abnormal operating conditions.

Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of

the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.

The company names and brand names herein are the trademarks or registered trademarks of their respective owners.

Edited Strategic Business Development Dept.