ee FAIRCHILD napeeqnanerpsrepanereatonnengreneeesasnneset SEMICONDUCTOR 100316 May 1991 Revised November 1999 Low Power Quad Differential Line Driver with Cut-Off General Description The 100316 is a quad differential line driver with output cut- off capability. The outputs are designed to drive a doubly terminated 50Q. transmission line (25Q equivalent imped- ance) in an ECL backplane. The 100316 is ideal for driving low noise, differential ECL backplanes. A LOW on the out- put enable (OE) will set both the true and complementary outputs into a high impedance or cut-off state, isolating them from the backplane. The cut-off state is designed to be more negative than a normal ECL LOW state. Unlike most 100K devices, the data inputs (D,, D,) do not have input pull-down resistors. An internal reference supply (Vpp) is available for single-ended operation. Features Bf Differential inputs and outputs @ Output cut-off capability Bf Drives 25 load Hf Vpp available for single-ended operation @ 2000V ESD protection lf Voltage compensated operating range = 4.2V to -5.7V Bf Available to industrial grade temperature range Ordering Code: Order Number | Package Number Package Description 100316QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 100316QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (-40C to +85C) Devices also available in Tape and Reel. Specify by appending the suffix letter Xx to the ordering code. Logic Symbol % F% % % % A Y% Pin Descriptions Pin Names Description Da Data Inputs Q, Data Outputs a, Complementary Data Outputs OE Output Enable Connection Diagram 28-Pin PLCC Dg Dy Dy Vers NC Q Oy Hee (tl eh tad lel ad Ds 9 Veeo a Vee Voca Vees U5] Yoo OE Yoo Yep Voca Dy a 7 22 23) Ba) 25] Dy DB, DyVeesQ &% Q% 1999 Fairchild Semiconductor Corporation DS010922 www. fairchildsemi.com HO-IND YUM JOAN UIT] [EHUSIIJJIG PENH J9MOd MO] 9LEOOL100316 Truth Table Inputs Outputs Dn Dn OE Q, a, L H H L H H L H H L Xx Xx L Cut-Off | Cut-Off H = HIGH Voltage Level L =LOW Voltage Level X = Dont Care Cut-Off = Lower-than-LOW State Logic Diagram OE www. fairchildsemi.comAbsolute Maximum Ratingsvnote 1) 65C to +150C Maximum Junction Temperature (Ty)+150C Storage Temperature (Tstq) Pin Potential to Ground Pin (Vee) 7.0V to 0.5V Input Voltage (DC) Veg to +0.5V Output Current (DC Output HIGH) 100 mA ESD (Note 2) 22000V Commercial Version DC Electrical Characteristics (ote 3) Vee =-4.2V to -5.7V, Voc = Veca = GND, Tg = 0C to +85C Recommended Operating Conditions Case Temperature (Tc) Commercial 0C to +85C Industrial 40C to +85C Supply Voltage (Veg) -5.7V to -4.2V Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The Recommended Operating Conditions table will define the conditions for actual device operation. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Symbol Parameter Min Typ Max Units Conditions Vou Output HIGH Voltage 1025 955 870 mv Vin = VIH (Max) Loading with VoL Output LOW Voltage 1830 1705 1620 mv or VIL (Min) 25Q. to -2.0V Vouc Output HIGH Voltage 1035 mv Vin = VIH (Min) Loading with Voice Output LOW Voltage 1610 mv or VIL (Max) 25Q. to -2.0V Voz Cut-Off LOW Voltage 1950 mV Vin = VIH (Min) OE = LOW or ViL (Max) VeB Output Reference Voltage 1380 1320 1260 mV lyBgB=1 mA VDIFF Input Voltage Differential 150 mv Required for Full Qutput Swing Vom Common Mode Voltage Voc - 2.0 Voc - 0.5 Vv Vin Single-Ended Guaranteed HIGH Signal for All Input HIGH Voltage 1110 870 mv Inputs (with one input tied to Vpp) Vee (Max) + VDIFF VIL Single-Ended Guaranteed LOW Signal for All Input LOW Voltage 1830 1530 mv Inputs (with one input tied to Vpp) Vp (Min) ~ VDIFF lit Input LOW Current 0.50 HA Vin = VIL (Min) lin Input HIGH Current Dy 250 HA Vin = VIH (Max) Di = Vee, D, = VIL (Min) luz Input HIGH Current OE 360 HA Vin = VIH (Max) Di = Vee, D, = VIL (Min) leo Input Leakage Current 10 HA Vin = Vee: 01 = Ves. D, = VIL (Min) lee Power Supply Current, Normal -85 -30 mA D,=Vpp, D, =ViL (Min) lEEZz Power Supply Current, Cut-Off 152 75 mA D,-D4 = Vpp, D}-Da = Vi (Min), OE = LOW Note 3: The specified limits represent the worst case value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho- sen to guarantee operation under worst case conditions. AC Electrical Characteristics Vee =4.2V to-5.7V, Veo = Voc, = GND Te = 0C Te = 425C Te = +85C Symbol Parameter Units Conditions Min Max Min Max Min Max t Propagation Dela PLH Pag 0.65 2.10 0.65 2.10 0.65 2.10 ns tPHL Data to Output tpzH Propagation Delay 1.8 4.00 1.8 4.00 1.8 4.00 . ns Figures 1, 2 tprz OE to Output 1.2 2.90 1.2 2.90 1.2 2.90 tH Transition Time, D, to Q, 0.45 1.50 0.45 1.50 0.45 1.50 ns trHe 20% to 80%, 80% to 20% www. fairchildsemi.com 9LE00L100316 Industrial Version DC Electrical Characteristics (Note 4) Vee =-4.2V to -5.7V, Veco = Veca =GND Te = 40C Te = 0C to +85C Symbol Parameter Units Conditions Min Max Min Max Vou Output HIGH Voltage 1085 870 1025 870 mv Vin = Vin (Max) Loading with Voi Output LOW Voltage 1830 1585 1830 1620 mv or VIL (Min) 25Q. to -2.0V Vouc Output HIGH Voltage 1095 1035 mV Vin = Vin (Min) Loading with Voice Output LOW Voltage 1575 1610 mv or VIL (Max) 25Q. to -2.0V Voz Cut-Off LOW Voltage 1900 1950 mV OE = LOW, Vin = Vi (Min) oF Vit (Max) Vep Output Reference Voltage 1395 1255 1380 1260 mV lyga=1 mA VDIFF Input Voltage Differential 150 150 mv Required for Full Qutput Swing Vom Common Mode Voltage Voo-2:.0 Vee-0.5]| Veg -2.0 Veg-0.5 v Vin Single-Ended Guaranteed HIGH Signal for All Input HIGH Voltage 1115 870 1110 870 mv Inputs (with one input tied to Vga) Vp (Max) + VDIEF VIL Single-Ended Guaranteed LOW Signal for All Input LOW Voltage 1830 1535 1830 1530 mv Inputs (with one input tied to Vga) Vee (Min) ~ VDIFF lit Input LOW Current 0.50 0.50 HA Vin = Vit (Min) lin Input HIGH Current, Dy 240 240 uA Vin = Vin (Max) Di = Vee, linz Input HIGH Current, OE 360 360 Dy = Vit (min) IcBo Input Leakage Current 10 10 HA Vin= Vee, Dy = Ves; Dy = Vi (min) lee Power Supply Current, 85 30 85 30 mA D, = Vep; Dy = VIL (Min) Normal leEz Power Supply Current, 152 75 152 75 mA D,-D4 = Vpp; D,-D4 = VIL (Min): Cut-Off OE = LOW Note 4: The specified limits represent the worst case value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho- sen to guarantee operation under worst case conditions. AC Electrical Characteristics Vee =-4.2V to -8.7V, Voo = Voca = GND Te =-40C Te = +25C Te = +85C Symbol Parameter Units Conditions Min Max Min Max Min Max t Propagation Dela PLH Pag 0.65 2.10 0.65 2.10 0.65 2.10 ns tPHL Data to Output tpzH Propagation Delay 1.80 4.00 1.80 4.00 1.80 4.00 Figures 1Figure ns 2 tpz OE to Output 1.20 2.90 1.20 2.90 1.20 2.90 ttLy Transition Time 0.45 1.50 0.45 1.50 0.45 1.50 ns tTHL 20% to 80%, 80% to 20% www. fairchildsemi.com 4Test Circuitry Li PULSE ni . Oi . SCOPE GENERATOR rw vi CHAN A I Voc LL R T ] LL tT" = n oe = 8 PULSE rv. D ft SCOPE GENERATOR rw j 2 Q CHAN B 500 ane 500. Ry 0.1 pF i|_- a Notes: Voc: Veca = +2V, Ver = -2.5V L1 and L2 = equal length 509 impedance lines Ry = 509 terminator internal to scope Decoupling 0.1 LF from GND to Veg and Veg All unused outputs are loaded with 250 to GND C, = Fixture and stray capacitance < 3 pF FIGURE 1. AC Test Circuit Switching Waveforms TRUE park OK X A COMPLEMENT ! a \ THE try OUTPUT ENABLE \ | ' 1 | 1 ' | ' TRUE OUTPUT ' xX Xx ' COMPLEMENT : ' Ln 'L ' 1 ' I ' ! FIGURE 2. Propagation Delay, Cut-Off and Transition Times www. fairchildsemi.com 9LE00L100316 Low Power Quad Differential Line Driver with Cut-Off Physical DimeNnsiONS inches (millimeters) unless otherwise noted +0.006 9.450 TO 9g 40.15 [11.43] 7905 PIN #1 IDENT 1 26 0.02940.003 [0.7440.08] 5 [] 25 ] a [| [ ] 1 L]i9 12 0.050 Iyp | 18 [1.27] 0.300 typ [7.62] 0.045 oO 45 Xtal 0.165-0.180 [4.19-4.57] 0.490+0.005 [12.4540.13] gs x 0045 [1.14] 0,017#0.004 yp my tf (0.4340. 10] 0.41040.020 [10.4140.51] Le SEATING PLANE 0.020 le [0.51] 0.10540.015 [2.670.38] MIN TYP TYP TYP 0.004 [9.10] V28A (REV K) 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Package Number V28A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems 2. which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. Accritical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www. fairchildsemi.com