Single and Quad 18 V
Operational Amplifiers
AD8614/AD8644
Rev. B
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FEATURES
Unity-gain bandwidth: 5.5 MHz
Low voltage offset: 1.0 mV
Slew rate: 7.5 V/μs
Single-supply operation: 5 V to 18 V
High output current: 70 mA
Low supply current: 800 μA/amplifier
Stable with large capacitive loads
Rail-to-rail inputs and outputs
APPLICATIONS
LCD gamma and VCOM drivers
Modems
Portable instrumentation
Direct access arrangement
GENERAL DESCRIPTION
The AD8614 (single) and AD8644 (quad) are single-supply,
5.5 MHz bandwidth, rail-to-rail amplifiers optimized for LCD
monitor applications.
They are processed using the Analog Devices, Inc. high voltage,
extra fast complementary bipolar (HV XFCB) process. This
proprietary process includes trench-isolated transistors that
lower internal parasitic capacitance, which improves gain
bandwidth, phase margin, and capacitive load drive. The low
supply current of 800 μA (typical) per amplifier is critical for
portable or densely packed designs. In addition, the rail-to-rail
output swing provides greater dynamic range and control than
standard video amplifiers provide.
These products operate from supplies of 5 V to as high as 18 V.
The unique combination of an output drive of 70 mA, high
slew rates, and high capacitive drive capability makes the
AD8614/AD8644 an ideal choice for LCD applications.
The AD8614 and AD8644 are specified over the temperature
range of –20°C to +85°C. They are available in 5-lead SOT-23,
14-lead TSSOP, and 14-lead SOIC surface-mount packages in
tape and reel.
PIN CONFIGURATIONS
OUT A
1
V–
2
+IN
3
–IN
4
V+
5
AD8614
TOP VIEW
(Not to Scale)
06485-001
Figure 1. 5-Lead SOT-23
(RJ-5)
AD8644
TOP VIEW
(Not to Scale)
1
2
3
4
5
6
7
–IN A
+IN A
V+
OUT B
–IN B
+IN B
OUT A
14
13
12
11
10
9
8
–IN D
+IN D
V–
OUT C
–IN C
+IN C
OUT D
0
6485-002
Figure 2. 14-Lead TSSOP
(RU-14)
OUT A
1
–IN A
2
+IN A
3
V+
4
OUT D
14
–IN D
13
+IN D
12
V–
11
+IN B
5
+IN C
10
–IN B
6
–IN C
9
OUT B
7
OUT C
8
AD8644
TOP VIEW
(Not to Scale)
06485-003
Figure 3. 14-Lead Narrow Body SOIC
(R-14)
AD8614/AD8644
Rev. B | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Typical Performance Characteristics ............................................. 5
Theory of Operation ........................................................................ 9
Output Short-Circuit Protection.................................................9
Input Overvoltage Protection ................................................... 10
Output Phase Reversal............................................................... 10
Power Dissipation....................................................................... 10
Unused Amplifiers ..................................................................... 10
Capacitive Load Drive ............................................................... 11
Direct Access Arrangement ...................................................... 11
A One-Chip Headphone/Microphone Preamplifier
Solution........................................................................................ 11
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 14
REVISION HISTORY
9/07—Rev. A to Rev B
Change to Current Noise Density in Table 1 ................................ 3
12/06—Rev. 0 to Rev. A
Updated Format..................................................................Universal
Deleted SPICE Model Availability Section.................................. 12
Updated Outline Dimensions....................................................... 13
Changes to Ordering Guide .......................................................... 14
10/99—Revision 0: Initial Version
AD8614/AD8644
Rev. B | Page 3 of 16
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
5 V ≤ VS ≤ 18 V, VCM = VS/2, TA = 25°C, unless otherwise noted.1
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS 1.0 2.5 mV
−20°C ≤ TA ≤ +85°C 3 mV
Input Bias Current IB 80 400 nA
−20°C ≤ TA ≤ +85°C 500 nA
Input Offset Current IOS 5 100 nA
−20°C ≤ TA ≤ +85°C 200 nA
Input Voltage Range 0 VS V
Common-Mode Rejection Ratio CMRR VCM = 0 V to VS 60 75 dB
Voltage Gain AVO V
OUT = 0.5 V to VS – 0.5 V, RL = 10 kΩ 10 150 V/mV
OUTPUT CHARACTERISTICS
Output Voltage High VOH I
LOAD = 10 mA VS − 0.15 V
Output Voltage Low VOL I
LOAD = 10 mA 65 150 mV
Output Short-Circuit Current ISC 35 70 mA
−20°C ≤ TA ≤ +85°C 30 mA
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = ±2.25 V to ±9.25 V 80 110 dB
Supply Current/Amplifier ISY 0.8 1.1 mA
−20°C ≤ TA ≤ +85°C 1.5 mA
DYNAMIC PERFORMANCE
Slew Rate SR CL = 200 pF 7.5 V/μs
Gain Bandwidth Product GBP 5.5 MHz
Phase Margin Φo 65 Degrees
Settling Time tS 0.01%, 10 V step 3 μs
NOISE PERFORMANCE
Voltage Noise Density en f = 1 kHz 12 nV/√Hz
e
n f = 10 kHz 11 nV/√Hz
Current Noise Density in f = 10 kHz 1 pA/√Hz
1 All typical values are for VS = 18 V.
AD8614/AD8644
Rev. B | Page 4 of 16
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage 20 V
Input Voltage GND to VS
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −20°C to +85°C
Junction Temperature Range −65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type θJA θ
JC Unit
5-Lead SOT-23 (RJ) 230 140 °C/W
14-Lead TSSOP (RU) 180 35 °C/W
14-Lead SOIC (R) 120 56 °C/W
ESD CAUTION
AD8614/AD8644
Rev. B | Page 5 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
CAPACITANCE (pF)
50
45
0
40
35
30
25
20
15
10
5
–OS
SMALL SIGNAL OVERSHOOT (%)
V
S
=18V
R
L
=2kΩ
T
A
=25°C
10 100 1k 10k
+OS
06485-004
Figure 4. Small Signal Overshoot vs. Load Capacitance
12
–12
8
4
0
–4
–8
0.1%
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
SETTLING TIME (µs)
OUTPUT SWING FROM 0 TO ±V
0.01%
0.01%
0.1%
06485-005
Figure 5. Output Swing vs. Settling Time
GAIN (dB)
FREQUENCY (Hz)
80
60
40
20
0
45
90
135
180
PHASE SHIFT (Degrees)
1k 10k 100k 1M 10M 100M
5V ≤V
S
≤18V
R
L
=1MΩ
C
L
=40pF
T
A
= 25°C
06485-006
Figure 6. Open-Loop Gain and Phase Shift vs. Frequency
VOLTAGE (1V/DIV)
7.5
6.5
5.5
4.5
3.5
2.5
1.5
0.5
–0.5
–1.5
–2.5
TIME (1µs/DIV)
V
S
=5V
R
L
=2kΩ
C
L
=200pF
A
V
=1
T
A
=25°C
06485-007
Figure 7. Large Signal Transient Response, VS = 5 V
VOLTAGE (4V/DIV)
29
25
21
17
13
9
5
1
–3
–7
–11
V
S
=18V
R
L
=2kΩ
C
L
=200pF
A
V
=1
T
A
= 25°C
TIME (1µs/DIV)
06485-008
Figure 8. Large Signal Transient Response, VS = 18 V
TIME (500ns/DIV)
V
S
2
VOLTAGE (50mV/DIV)
V
S
=5V≤V
S
≤18V
R
L
=2kΩ
C
L
= 200pF
A
V
=1
T
A
= 25°C
06485-009
Figure 9. Small Signal Transient Response
AD8614/AD8644
Rev. B | Page 6 of 16
LOAD CURRENT (mA)
10
1
100
1k
10k
ΔOUTPUT VOLTAGE (mV)
5V ≤V
S
≤18V
T
A
=25°C
SOURCE
SINK
0.001 0.01 0.1 1 10 100
06485-010
Figure 10. Output Voltage to Supply Rail vs. Load Current
1000
400
0
900
500
300
100
700
600
200
800
SUPPLY CURRENT/AMPLIFIER (µA)
012345678910
SUPPLY VOLTAGE (±V)
T
A
= 25°C
06485-011
Figure 11. Supply Current vs. Supply Voltage
400
0
–400
300
200
–200
–300
100
–100
INPUT BIAS CURRENT (nA)
COMMON-MODE VOLTAGE (V)
–2.5 –1.5 –0.5 0.5 1.5 2.5
V
S
= ±2.5V
06485-012
Figure 12. Input Bias Current vs. Common-Mode Voltage, VS = ±2.5 V
COMMON-MODE VOLTAGE (V)
400
0
–400
300
200
–200
–300
100
–100
INPUT BIAS CURRENT (nA)
V
S
=±9V
–9–7–5–3–1013579
06485-013
Figure 13. Input Bias Current vs. Common-Mode Voltage, VS = ±9 V
INPUT OFFSET VOLTAGE (mV)
QUANTITY (Amplifiers)
180
160
0
80
60
40
20
140
100
120
2.5V ≤V
S
≤9V
T
A
= 25°C
2.01.51.00.50–0.5–1.0–1.5–2.0
06485-014
Figure 14. Input Offset Voltage Distribution
SUPPLY CURRENT/AMPLIFIER (mA)
1.0
0.9
0.5
0.8
0.7
0.6
V
S
=18V
V
S
=5V
TEMPERATURE (°C)
–35 –15 5 25 45 65 85
06485-015
Figure 15. Supply Current vs. Temperature
AD8614/AD8644
Rev. B | Page 7 of 16
FREQUENCY (Hz)
OUTPUT SWING (V p-p)
6
5
0
4
3
2
1
100 1k 10k 100k 1M 10M
V
S
=5V
A
VCL
=1
R
L
=2kΩ
T
A
= 25°C
06485-016
Figure 16. Maximum Output Swing vs. Frequency, VS = 5 V
FREQUENCY (Hz)
OUTPUT SWING (V p-p)
20
18
0
10
6
2
4
8
16
14
12
100 1k 10k 100k 1M 10M
V
S
= 18V
A
VCL
=1
R
L
=2kΩ
T
A
= 25°C
06485-017
Figure 17. Maximum Output Swing vs. Frequency, VS = 18 V
FREQUENCY (Hz)
IMPEDANCE (Ω)
300
240
0
180
120
60
5V ≤V
S
≤18V
T
A
=25°C
A
V
=1
A
V
=10
A
V
=100
1k 10k 100k 1M 10M
06485-018
Figure 18. Closed-Loop Output Impedance vs. Frequency
FREQUENCY (Hz)
GAIN (dB)
40
20
0
1k 10k 100k 1M 10M 100M
5V ≤V
S
≤18V
T
A
=25°C
06485-019
Figure 19. Closed-Loop Gain vs. Frequency
FREQUENCY (Hz)
COMMON-MODE REJECTION (dB)
100
80
60
0
20
40
120
140
100 1k 10k 100k 1M 10M
5V ≤V
S
≤18V
T
A
=25°C
06485-020
Figure 20. Common-Mode Rejection vs. Frequency
FREQUENCY (Hz)
POWER SUPPLY REJECTION (dB)
100
0
80
60
40
20
10M1M100k10k1k100
PSRR+
PSRR–
V
S
= 18V
T
A
= 25°C
06485-021
Figure 21. Power Supply Rejection vs. Frequency
AD8614/AD8644
Rev. B | Page 8 of 16
SUPPLY VOLTAGE (V)
9
8
0
4
3
2
1
7
5
6SR–
SR+
A
V
=1
R
L
=2kΩ
C
L
= 200pF
T
A
= 25°C
02468101214161820
SLEW RATE (V/µs)
06485-022
Figure 22. Slew Rate vs. Supply Voltage
FREQUENCY (Hz)
100
10
1
VOLTAGE NOISE DENSITY (nV/ Hz)
10 100 1k 10k
V
S
=5V
T
A
=25°C
06485-023
Figure 23. Voltage Noise Density vs. Frequency, VS = 5 V
FREQUENCY (Hz)
100
10
1
VOLTAGE NOISE DENSITY (nV/ Hz)
10 100 1k 10k
V
S
= 18V
T
A
= 25°C
06485-024
Figure 24. Voltage Noise Density vs. Frequency, VS = 18 V
AD8614/AD8644
Rev. B | Page 9 of 16
THEORY OF OPERATION
The AD8614/AD8644 are processed using Analog Devices high
voltage, extra fast complementary bipolar (HV XFCB) process.
This process includes trench-isolated transistors that lower
parasitic capacitance.
Figure 26 shows a simplified schematic of the AD8614/AD8644.
The input stage is rail-to-rail, consisting of two complementary
differential pairs, one NPN pair and one PNP pair. The input
stage is protected against avalanche breakdown by two back-to-
back diodes. Each input has a 1.5 kΩ resistor that limits input
current during overvoltage events and furnishes phase reversal
protection if the inputs are exceeded. The two differential pairs
are connected to a double-folded cascode. This is the stage in
the amplifier with the most gain. The double-folded cascode
differentially feeds the output stage circuitry. Two complemen-
tary common emitter transistors are used as the output stage.
This allows the output to swing to within 125 mV from each rail
with a 10 mA load. The gain of the output stage, and thus the
open-loop gain of the op amp, depends on the load resistance.
The AD8614/AD8644 have no built-in short-circuit protection.
The short-circuit limit is a function of high current roll-off of
the output stage transistors and the voltage drop over the
resistor shown on the schematic at the output stage. The voltage
over this resistor is clamped to one diode during short-circuit
voltage events.
OUTPUT SHORT-CIRCUIT PROTECTION
To achieve a wide bandwidth and high slew rate, the output of
the AD8614/AD8644 is not short-circuit protected. Shorting
the output directly to ground or to a supply rail can destroy the
device. The typical maximum safe output current is 70 mA.
In applications where some output current protection is needed,
but not at the expense of reduced output voltage headroom, a
low value resistor in series with the output can be used. This is
shown in Figure 25. The resistor is connected within the
feedback loop of the amplifier so that if VOUT is shorted to
ground and VIN swings up to 18 V, the output current does not
exceed 70 mA.
For 18 V single-supply applications, resistors less than 261 Ω are
not recommended.
AD86x4
V
IN
261ΩV
OUT
18
V
06485-026
Figure 25. Output Short-Circuit Protection
V
CC
– +
1.5kΩ
V
EE
V
OUT
V
CC
V
CC
1.5kΩ
06485-025
Figure 26. Simplified Schematic
AD8614/AD8644
Rev. B | Page 10 of 16
INPUT OVERVOLTAGE PROTECTION
As with any semiconductor device, whenever the condition
exists for the input to exceed either supply voltage, attention
needs to be paid to the input overvoltage characteristic. As an
overvoltage occurs, the amplifier can be damaged, depending
on the voltage level and the magnitude of the fault current.
When the input voltage exceeds either supply by more than
0.6 V, internal pin junctions energize, allowing current to flow
from the input to the supplies. Observing Figure 26, the
AD8614/AD8644 have 1.5 kΩ resistors in series with each
input, which helps to limit the current. This input current is not
inherently damaging to the device as long as it is limited to
5 mA or less. If the voltage is large enough to cause more than
5 mA of current to flow, an external series resistor should be
added. The size of this resistor is calculated by dividing the
maximum overvoltage by 5 mA and subtracting the internal
1.5 kΩ resistor. For example, if the input voltage could reach 100 V,
the external resistor should be (100 V ÷ 5 mA) – 1.5 kΩ = 18.5 kΩ.
This resistance should be placed in series with either or both
inputs if they are subjected to the overvoltages.
OUTPUT PHASE REVERSAL
The AD8614/AD8644 are immune to phase reversal as long as
the input voltage is limited to within the supply rails. Although
the device’s output does not change phase, large currents due to
input overvoltage can result, damaging the device. In applica-
tions where the possibility of an input voltage exceeding the
supply voltage exists, overvoltage protection should be used, as
described in the previous section.
POWER DISSIPATION
The maximum power that can be safely dissipated by the
AD8614/AD8644 is limited by the associated rise in junction
temperature. The maximum safe junction temperature is 150°C,
and should not be exceeded or device performance could suffer.
If this maximum is momentarily exceeded, proper circuit
operation is restored as soon as the die temperature is reduced.
Leaving the device in an overheated condition for an extended
period can result in permanent damage to the device.
To calculate the internal junction temperature of the
AD8614/AD8644, the following formula can be used:
TJ = PDISS × θJA + TA
where:
TJ is the AD8614/AD8644 junction temperature.
PDISS is the AD8614/AD8644 power dissipation.
θJA is the AD8614/AD8644 junction-to-ambient package thermal
resistance.
TA is the ambient temperature of the circuit.
The power dissipated by the device can be calculated as:
PDISS = ILOAD × (VS – VOUT)
where:
ILOAD is the AD8614/AD8644 output load current.
VS is the AD8614/AD8644 supply voltage.
VOUT is the AD8614/AD8644 output voltage.
Figure 27 provides a convenient way to determine if the device
is being overheated. The maximum safe power dissipation can
be found graphically, based on the package type and the ambient
temperature around the package. By using the previous equation, it
is a simple matter to see if PDISS exceeds the device’s power derating
curve. To ensure proper operation, it is important to observe the
recommended derating curves shown in Figure 27.
1.5
0
1.0
0.5
MAXIMUM POWER DISSIPATION (W)
AMBIENT TEMPERATURE (°C)
–35–155 2545658
5
14-LEAD SOIC PACKAGE
θ
JA
= 120°C/W
14-LEAD TSSOP PACKAGE
θ
JA
= 180°C/W
5-LEAD SOT-23 PACKAGE
θ
JA
= 230°C/W
06485-027
Figure 27. Maximum Power Dissipation vs. Temperature
(5-Lead and 14-Lead Package Types)
UNUSED AMPLIFIERS
It is recommended that any unused amplifiers in the quad
package be configured as a unity-gain follower with a 1 kΩ
feedback resistor connected from the inverting input to the
output, and the noninverting input tied to the ground plane.
AD8614/AD8644
Rev. B | Page 11 of 16
CAPACITIVE LOAD DRIVE
The AD8614/AD8644 exhibit excellent capacitive load driving
capabilities. Although the device is stable with large capacitive
loads, there is a decrease in amplifier bandwidth as the
capacitive load increases.
When driving heavy capacitive loads directly from the
AD8614/AD8644 output, a snubber network can be used to
improve the transient response. This network consists of a
series R-C connected from the amplifier’s output to ground,
placing it in parallel with the capacitive load. The configuration
is shown in Figure 28. Although this network does not increase
the bandwidth of the amplifier, it does significantly reduce the
amount of overshoot.
AD86x4
V
OUT
5V
R
X
C
X
C
L
V
IN
06485-028
Figure 28. Snubber Network Compensation for Capacitive Loads
The optimum values for the snubber network should be
determined empirically based on the size of the capacitive load.
Table 4 shows a few sample snubber network values for a given
load capacitance.
Table 4. Snubber Networks for Large Capacitive Loads
Load Capacitance (CL) Snubber Network (RX, CX)
0.47 nF 300 Ω, 0.1 μF
4.7 nF 30 Ω, 1 μF
47 nF 5 Ω, 10 μF
DIRECT ACCESS ARRANGEMENT
Figure 29 shows a schematic for a 5 V single-supply transmit/
receive telephone line interface for 600 Ω transmission systems. It
allows full duplex transmission of signals on a transformer-
coupled 600 Ω line. Amplifier A1 provides gain that can be
adjusted to meet the modem’s output drive requirements. Both
A1 and A2 are configured to apply the largest possible differential
signal to the transformer. The largest signal available on a single
5 V supply is approximately 4.0 V p-p into a 600 Ω transmission
system. Amplifier A3 is configured as a difference amplifier to
extract the receive information from the transmission line for
amplification by A4. A3 also prevents the transmit signal from
interfering with the receive signal. The gain of A4 can be adjusted
in the same manner as A1 to meet the modem input signal
requirements. Standard resistor values permit the use of single
in-line package (SIP) format resistor arrays. Couple this with
the AD8644 14-lead SOIC or TSSOP package and this circuit
can offer a compact solution.
6.2V
6.2V
2kΩ
1:1
1
2
3
7
6
5
2
3
1
6
5
7
5V DC
A1, A2 = 1/2 AD8644
A3, A4 = 1/2 AD8644
R12
10kΩ
R11
10kΩ
R10
10kΩ
R13
10kΩ
R14
14.3kΩ
C2
0.1µF
RECEIVE
RxA
2kΩ
10µF
P2
Rx GAIN
ADJUST
R7
10kΩ
R8
10kΩ
R9
10kΩ
R6
10kΩ
R5
10kΩ
TRANSMIT
TxA
C1
0.1µF
R1
10kΩ
R2
9.09kΩ
P1
Tx GAIN
ADJUST
R3
360Ω
TO TELEPHONE
LINE
Z
O
600Ω
T1
MIDCOM
671-8005
06485-029
A1
A2
A3
A4
Figure 29. A Single-Supply Direct Access Arrangement for Modems
A ONE-CHIP HEADPHONE/MICROPHONE
PREAMPLIFIER SOLUTION
Because of its high output current performance, the AD8644
makes an excellent amplifier for driving an audio output jack in
a computer application. Figure 30 shows how the AD8644 can
be interfaced with an ac codec to drive headphones or speakers.
U1-A
4
5V
1
10
2
3
5
5
V
AV
DD1
VREFOUT
LINE_OUT_L
LINE_OUT_R
AV
SS1
7
8
6
9
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
U1-B
U1 = AD8644
28
35
36
26
25
+
AD1881A
(AC'97)
R3
20Ω
+
C1
100µF
R1
2kΩ
R4
20Ω
C2
100µF
R2
2kΩ
06485-030
Figure 30. A PC-99-Compliant Headphone/Line Out Amplifier
AD8614/AD8644
Rev. B | Page 12 of 16
If gain is required from the output amplifier, four additional
resistors should be added as shown in Figure 31.
U1-A
4
5V
5
V
1
10
2
3
5
AV
DD1
AV
DD2
LINE_OUT_L
AD1881A
(AC'97)
LINE_OUT_R
AV
SS1
7
8
6
9
U1-B
U1 = AD8644
VREF
38
35
27
36
26
25
+
+
A
V
= +6dB WITH VALUES SHOWN
R6
R5
=
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
R6
20kΩ
R5
10kΩ
C1
100µF R3
20Ω
R1
2kΩ
R4
20Ω
R2
2kΩ
C2
100µF
R5
10kΩ
R6
20kΩ
06485-031
Figure 31. A PC-99-Compliant Headphone/Speaker Amplifier with Gain
The gain of the AD8644 can be set as
5
6
R
R
AV=
Input coupling capacitors are not required for either circuit as
the reference voltage is supplied from the AD1881A.
The resistors R4 and R5 help protect the AD8644 output in case
the output jack or headphone wires are accidentally shorted to
ground. The output coupling capacitors C1 and C2 block dc
current from the headphones and create a high-pass filter with a
corner frequency of
()
L
RR4C1
f+π
=
−2
1
dB3
where RL is the resistance of the headphones.
The remaining two amplifiers can be used as low voltage
microphone preamplifiers. A single AD8614 can be used as a
standalone microphone preamplifier. Figure 32 shows this
implementation.
10kΩ
21
MIC1
1kΩ
2.2kΩ
5V
5V
MIC 1
MIC 2
22
MIC2
27
+
+
VREF
AD1881A
(AC'97)
A
V
= 20dB
A
V
= 20dB 2.2kΩ
10kΩ
1µF
1kΩ1µF
06485-032
Figure 32. Microphone Preamplifier
AD8614/AD8644
Rev. B | Page 13 of 16
OUTLINE DIMENSIONS
PIN 1
1.60 BSC 2.80 BSC
1.90
BSC
0.95 BSC
5
123
4
0.22
0.08
10°
5°
0°
0.50
0.30
0.15 MAX SEATING
PLANE
1.45 MAX
1.30
1.15
0.90
2.90 BSC
0.60
0.45
0.30
COMPLIANT TO JEDEC STANDARDS MO-178-AA
4.50
4.40
4.30
14 8
71
6.40
BSC
PIN 1
5.10
5.00
4.90
0.65
BSC
SEATING
PLANE
0.15
0.05 0.30
0.19
1.20
MAX
1.05
1.00
0.80 0.20
0.09
8°
0°
0.75
0.60
0.45
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 33. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
Figure 34. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AB
060606-A
14 8
7
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
8.75 (0.3445)
8.55 (0.3366)
1.27 (0.0500)
BSC
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
COPLANARITY
0.10
8°
0°
45°
Figure 35. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
AD8614/AD8644
Rev. B | Page 14 of 16
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
AD8614ART-R2 –20°C to +85°C 5-Lead SOT-23 RJ-5 A6A
AD8614ART-REEL –20°C to +85°C 5-Lead SOT-23 RJ-5 A6A
AD8614ART-REEL7 –20°C to +85°C 5-Lead SOT-23 RJ-5 A6A
AD8614ARTZ-REEL1–20°C to +85°C 5-Lead SOT-23 RJ-5 A0Z
AD8614ARTZ-REEL71–20°C to +85°C 5-Lead SOT-23 RJ-5 A0Z
AD8644AR –20°C to +85°C 14-Lead SOIC_N R-14
AD8644AR-REEL –20°C to +85°C 14-Lead SOIC_N R-14
AD8644AR-REEL7 –20°C to +85°C 14-Lead SOIC_N R-14
AD8644ARZ1–20°C to +85°C 14-Lead SOIC_N R-14
AD8644ARZ-REEL1–20°C to +85°C 14-Lead SOIC_N R-14
AD8644ARZ-REEL71–20°C to +85°C 14-Lead SOIC_N R-14
AD8644ARU –20°C to +85°C 14-Lead TSSOP RU-14
AD8644ARU-REEL –20°C to +85°C 14-Lead TSSOP RU-14
AD8644ARUZ1–20°C to +85°C 14-Lead TSSOP RU-14
AD8644ARUZ-REEL1–20°C to +85°C 14-Lead TSSOP RU-14
1 Z = RoHS Compliant Part.
AD8614/AD8644
Rev. B | Page 15 of 16
NOTES
AD8614/AD8644
Rev. B | Page 16 of 16
NOTES
©1999–2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06485-0-9/07(B)
