TQC9307 0.7 - 4.0 GHz Digital Variable Gain Amplifier (R) General Description The TQC9307 is a digitally controlled variable gain amplifier (DVGA) with a broadband frequency range of 0.7 to 4.0 GHz. The DVGA features high linearity and low noise while providing digital variable gain with a 31 dB of range in 1 dB steps through a serial mode control interface. At 3.5 GHz, the DVGA typically provides 13.3 dB gain, +40.5 dBm OIP3, +21 dBm P1dB and 3.5 dB noise figure. This combination of performance parameters makes the DVGA ideal for receiver applications requiring gain control with high IIP3 and low noise figure. In addition, the DVGA integrates a shut-down biasing capability to allow for easy operation for TDD applications. The TQC9307 integrates a high performance digital step attenuator followed by a high linearity, broadband gain block. Both stages are internally matched to 50 Ohms and do not require any external matching components. The TQC9307 is packaged in a RoHS-compliant, compact 5x5 mm surface-mount leadless package. 32 Pin 5X5 mm leadless SMT Package Product Features * Integrates DSA + Amp Functionality * 0.7 - 4.0 GHz Broadband Performance * 5-bit control, 31 dB range * 13.3 dB Gain * +20.6 dBm P1dB * +27.7 dBm IIP3, +40.5 dBm OIP3 * Integrated on-chip matching, 50 ohm in/out * Integrated shutdown control for TDD compatibility * +5V Supply Voltage, 3.3V TTL logic compatible Functional Block Diagram N/C N/C N/C N/C N/C N/C N/C N/C N/C Pin 1 Marking Package Topside Applications 32 31 30 29 28 27 26 25 1 24 N/C 23 GND 22 RF Out/VAMP TQC9307 GND 2 RF In 3 GND 4 21 GND N/C 5 20 N/C N/C 6 19 N/C N/C 7 18 GND SID 8 17 VPD 11 12 13 14 GND VDD VDD GND 15 16 N/C 10 GND 9 LE SPI CLK Exposed Backside Pad RF/DC Gnd Amp DSA * Wireless Infrastructure * LTE / WCDMA / CDMA / GSM * TDD or FDD systems * General Purpose Wireless Ordering Information Top View Data Sheet February 26, 2018 | Subject to change without notice 1 of 9 Part No. Description TQC9307-PCB TQC9307TR13 Evaluation Board 2500pcs on a 13" reel www.qorvo.com TQC9307 0.7 - 4.0 GHz Digital Variable Gain Amplifier (R) Absolute Maximum Ratings Parameter Recommended Operating Conditions Rating Storage Temperature RF Input Power, CW, 50, 24 hr, 25C VDD, Power Supply Voltage Digital Input Voltage -65 to 150 C +22 dBm -0.3 to +5.5 V -0.3 to VDD+0.5 V Parameter Min Typ VAMP VDD Tch (for >106 hours MTTF) Case Temperature +4.75 +3 +5 -40 Max Units +5.25 +5 +190 +105 V V C C Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions. Operation of this device outside the parameter ranges given above may cause permanent damage. Electrical Specifications Test conditions unless otherwise noted: VDD = +5 V, Temp.=+25C. Parameter Operational Frequency Range Test Frequency Gain Gain Control Range Gain Control Step Size Gain Accuracy Input Return Loss Output Return Loss Output P1dB Output IP3 Input IP3 Noise Figure Amplifier Shutdown Control, VPD Conditions Min Max gain setting 3.3 - 3.8 GHz (major states) Pout/tone = 0 dBm, f = 1 MHz Pin/tone = -13 dBm, f = 1 MHz Max gain setting On state Off state (Power down) Shutdown pin current, IPD Off state Amplifier Current, IAMP (pin 22) On state Off state (Power down) 1. 2. Max Units 4.0 GHz GHz dB dB dB dB dB dB dBm dBm dBm dB V V 3.5 11.5 13 14.5 31 1 (0.3 + 10% of Atten. Setting) 25 13.5 +20.6 +40.5 +22 +27.7 3.5 0 0.8 2.1 VDD 140 75 DSA Current, IDD (pins 12, 13) Thermal Resistance (Rth) Typ 0.7 Channel to case 120 3 A 160 8 mA mA 180 A 60 C /W Minimum specification listed is guaranteed by design. Not tested in production. Input trace loss de-embedded from noise figure data. Data Sheet February 26, 2018 | Subject to change without notice 2 of 9 www.qorvo.com TQC9307 0.7 - 4.0 GHz Digital Variable Gain Amplifier (R) Serial Control Interface The TQC9307 has a CMOS SPITM input compatible serial interface. This serial control interface converts the serial data input stream to parallel output word. The input is 3-wire (CLK, LE and SID) SPITM input compatible. At power up, the serial control interface resets the DVGA to the minimum gain state (maximum attenuation setting). The 8-bit Serial Input Data (SID) word is loaded into the register on rising edge of the CLK, LSB first. When LE is high, CLK is internally disabled in the DVGA. Serial Control Timing Characteristics (Test conditions: V Parameter Condition Clock Frequency 50% Duty Cycle LE Setup Time, tLESUP after last CLK rising edge DD = +5 V, Temp.=25C) Min LE Pulse Width, tLEPW Max Units 20 MHz 5 ns 10 ns SID set-up time, tSDSUP before CLK rising edge 5 ns SID hold-time, tSDHLD after CLK rising edge 5 ns Propagation Delay, tPLO LE to Parallel output valid 30 ns Serial Control DC Logic Characteristics (Test conditions: V Parameter Condition Low State Input Voltage, VIL High State Input Voltage, VIH Input Current, IIH / IIL On SID, LE and CLK DD = +5 V, Temp.=25C) Min Max Units 0 2.1 -10 0.8 VDD +10 V V A Parallel data valid LE CLK SERIN D7 D6 D5 tSDSUP Data Sheet February 26, 2018 | Subject to change without notice D4 D3 D2 D1 D0 tLESUP tSDHLD 3 of 9 tLEPW www.qorvo.com TQC9307 0.7 - 4.0 GHz Digital Variable Gain Amplifier (R) Serial Control Interface Serial In Control Logic Truth Table, LSB in first 8-Bit Control Word Attenuation D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 Insertion loss 0 0 0 0 0 1 0 0 1 dB 0 0 0 0 1 0 0 0 2 dB 0 0 0 1 0 0 0 0 4 dB 0 0 1 0 0 0 0 0 8 dB 0 1 0 0 0 0 0 0 16 dB 0 1 1 1 1 1 0 0 31 dB 0 1 0 1 1 0 0 0 22 dB (example) Note: 1) Bit D1 needs to be kept logic `0' to maintain the 1dB step for the DSA control. 2) Bits D0, D1 and D7 are `don't care'. Performance Summary Test conditions: TLEAD=+25C, VAMP = VDD =+5V Frequency Gain Input Return Loss Output Return Loss Output P1dB Output IP3 (Pout/tone=0dBm, f=1MHz) Input IP3 (Pin/tone=-13dBm, f=1MHz) 900 1900 2600 3300 3500 3800 MHz 16.5 21 13 +16.7 11.7 9 9 +22.6 11.8 12 11.5 +21 13 20 13 +21.4 13.3 30 13.6 +20.6 13.1 13.6 12.4 +20.1 dB dB dB dBm +34.3 +38.5 +39 +40.5 +41.2 +40.8 dBm +17.8 +27 +27.2 +27.5 +27.9 +27.7 dBm 2.7 3.0 3.3 3.5 3.7 dB mA Noise Figure Amplifier Current, IAMP Data Sheet February 26, 2018 | Subject to change without notice 126 4 of 9 www.qorvo.com TQC9307 0.7 - 4.0 GHz Digital Variable Gain Amplifier (R) TQC9307-PCB Evaluation Board VDD J6 Pin 19 C11 26 25 27 29 24 23 DSA RF Output 5 20 4 21 3 C2 J2 Amp J1 RF Input L1 0805 22 1 U1 TQC9307 2 C1 28 30 31 32 C10 19 18 17 16 15 14 13 12 R3 15K 0 R2 C4 R1 J6 Pin 3 25K SID J6 Pin 11 11 10 7 9 8 6 SPI Vpd J3 CLK LE J6 Pins 12 13 GND J4 C3 VDD J6 Pin 1 Bill of Material: TQC9307-PCB Reference Desg. U1 C1 C2 C4, C10 C3, C11 L1 R1 R2 R3 Value n/a 33 pF 100 pF 1000pF 1.0uF 22nH 15K 25K 0 Description DVGA Cap, chip, 0402 Cap, chip, 0402 Cap, chip, 0402, 10%, 50V Cap, chip, 0603, 10%, 10V Ind, coil, 5%, 0603 Res, chip, 0603, 5%, 1/16W Res, chip, 0603, 5%, 1/16W Res, chip, 0603, 5%, 1/16W Data Sheet February 26, 2018 | Subject to change without notice 5 of 9 Manufacturer Qorvo Various Various Various Various Coilcraft Various Various Various Part Number TQC9307 0603CS-22NXJL www.qorvo.com TQC9307 0.7 - 4.0 GHz Digital Variable Gain Amplifier (R) Performance Plots Test conditions: VAMP = VDD =+5V Gain vs. Frequency 20 Gain over attenuation states Gain vs. Frequency 15 Temperature = 25C Input Return Loss vs. Frequency 0 Max Gain State Max Gain State 15 Gain (dB) Gain (dB) 5 0 -5 Input Return Loss (dB) 14 10 13 12 -10 11 -5 -10 -15 -20 -40degC 25degC 105degC -40degC -15 25degC 105degC -20 -25 3300 10 3300 3400 3500 3600 3700 3400 3500 3600 3700 -25 3300 3800 3400 3500 Frequency (MHz) 3800 3600 3700 3800 Frequency (MHz) Frequency (MHz) Gain vs. Frequency 20 Input Return Loss vs. Frequency 0 +105C -5 +105C +25C +25C 14 |S11| (dB) Gain (dB) -40C 11 -5 -40C -10 +105C |S22| (dB) 17 Output Return Loss vs. Frequency 0 -15 -20 +25C -40C -10 -25 -15 8 -30 5 -35 -20 700 1000 1300 1600 1900 2200 2500 2800 3100 3400 3700 4000 700 1000 1300 1600 1900 2200 2500 2800 3100 3400 3700 4000 700 1000 1300 1600 1900 2200 2500 2800 3100 3400 3700 4000 Frequency (MHz) Frequency (MHz) Frequency (MHz) Output Return Loss vs. Frequency 0 IIP3 vs Frequency 35 -5 P1dB vs Frequency 25 Max Gain State 32 23 -15 26 21 +105C 19 +25C -40C +105C -20 -25 3300 29 P1dB (dBm) -10 IIP3 (dBm) Output Return Loss (dB) Max Gain State +25C -40degC 25degC 105degC 3400 3500 3600 3700 23 3800 -40C 20 1800 Frequency (MHz) 2200 2600 17 3000 3400 15 1800 3800 2200 2600 Frequency (MHz) 6 Noise Figure vs Frequency Attenuation accuracy vs Attenuation States 4 Frequency = 3500 MHz 2 2 Attenuation Accuracy Noise Figure (dB) Attenuation Accuracy +105C 3800 3 5 3 3400 Attenuation accuracy vs Attenuation States 4 Temp.=+25C 3 4 3000 Frequency (MHz) 1 0 -1 -2 2 +105C +25C 1 -40C 0 -1 -2 3.3GHz +25C -3 -40C -3 3.5GHz 3.8GHz 1 1800 -4 2200 2600 3000 3400 3800 -4 0 2 4 6 Frequency (MHz) 8 10 12 14 16 18 20 22 24 26 28 30 Attenuation States 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 Attenuation States OIP3 vs Frequency 45 Max Gain State OIP3 (dBm) 42 39 36 +105C +25C 33 30 1800 -40C 2200 2600 3000 3400 3800 Frequency (MHz) Data Sheet February 26, 2018 | Subject to change without notice 6 of 9 www.qorvo.com TQC9307 0.7 - 4.0 GHz Digital Variable Gain Amplifier (R) N/C N/C N/C N/C N/C N/C N/C N/C Pin 1 Marking Package Topside N/C Pin Configuration and Description 32 31 30 29 28 27 26 25 1 24 N/C 23 GND 22 RF Out/VAMP TQC9307 GND 2 RF In 3 GND 4 21 GND N/C 5 20 N/C Amp DSA SPI Exposed Backside Pad RF/DC Gnd 10 11 12 13 14 15 16 GND VPD 9 N/C 17 GND 8 VDD GND SID VDD N/C 18 GND 19 7 LE 6 N/C CLK N/C Pin No. Label Description 1, 5, 6, 7, 15, 19, 20, 24-32 N/C No internal connection but can be grounded 2, 4, 11, 14, 16, 18, 21, 23 GND DC/RF ground connection 3 RF In RF input. Does not need a DC block capacitor if the input signal is DC free. 8 SID Serial data input 9 CLK Clock signal in 10 LE Latch Enable pin 12, 13 VDD DC Supply Voltage for SPI and DSA. Pins are internally tied together 17 VPD Amplifier power down control pin. A 20K shunt resistor needs to be placed at this pin. 22 RF Out / VAMP RF output and DC bias for amplifier. Needs to be capacitively coupled Backside Pad RF/DC Ground Ground connection for proper thermal dissipation Evaluation Board Material Information Qorvo PCB 1110304 Material and Stack-up 0.014" 0.062" 0.006" Finished Board Thickness Nelco N-4000-13 r=3.7 typ. 1 oz. Cu top layer 1 oz. Cu inner layer Core 1 oz. Cu inner layer 0.014" Nelco N-4000-13 1 oz. Cu bottom layer 50 ohm line dimensions: width = .026", spacing = .032". Data Sheet February 26, 2018 | Subject to change without notice 7 of 9 www.qorvo.com TQC9307 0.7 - 4.0 GHz Digital Variable Gain Amplifier (R) Package Marking and Dimensions .10 C 2X A 5.00.1 TERMINAL #1 4 B 32X 0.10 TERMINAL #1 IDENTIFIER 32X 0.50 Pitch 0.25 (32X) 0.35x X 0.250y 0.10 Qorvo C A B 1.75 TQC9307 5.00.1 1.75 Trace Code 0.25 (1X) shape 0.10 1.55 C A B .10 C 2X 1.75 0.225 TOP VIEW 1.75 5 BOTTOM VIEW .10 C 0.820.08 .08 C 32X GND/THERMAL PAD SEATING PLANE 5 SIDE VIEW C Notes: 1. All dimensions are in millimeters. Angles are in degrees. 2. Dimension and tolerance formats conform to ASME Y14.4M-1994. 3. The terminal #1 identifier and terminal numbering conform to JESD 95-1 SPP-012. 4. Co-planarity applies to the exposed ground/thermal pad as well as the contact pins. PCB Mounting Pattern All dimensions are in millimeters (inches). Angles are in degrees. 23X 3 PACKAGE OUTLINE 32X 0.31 0.50 PITCH 0.15 1 32X 0.70 3.70 0.76 0.38 0.66 3.70 COMPONENT SIDE Notes: 1. All dimensions are in millimeters. Angles are in degrees. 2. Use 1 oz. copper minimum for top and bottom layer metal. 3. Vias are required under the backside paddle of this device for proper RF/DC grounding and thermal dissipation. We recommend a 0.35mm (#80/.0135") diameter bit for drilling via holes and a final plated thru diameter of 0.25mm (0.10"). 4. Ensure good package backside paddle solder attach for reliable operation and best electrical performance. Data Sheet February 26, 2018 | Subject to change without notice 8 of 9 www.qorvo.com TQC9307 0.7 - 4.0 GHz Digital Variable Gain Amplifier (R) Handling Precautions Parameter Rating Standard ESD-Human Body Model (HBM) Class 1C ESDA/JEDEC JS-001-2014 ESD-Charged Device Model (CDM) Class C3 ESDA / JEDEC JS-002-2014 MSL-Moisture Sensitivity Level Level 3 IPC/JEDEC J-STD-020 Caution! ESD-Sensitive Device Solderability Compatible with lead-free (260C max. reflow temp.) soldering process. Solder profiles available upon request. Contact plating: Electrolytic plated Au over Ni. RoHS Compliance This part is compliant with 2011/65/EU RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and Electronic Equipment) as amended by Directive 2015/863/EU. This product also has the following attributes: * Lead Free * Halogen Free (Chlorine, Bromine) * Antimony Free * TBBP-A (C15H12Br402) Free * PFOS Free * SVHC Free Pb Contact Information For the latest specifications, additional product information, worldwide sales and distribution locations: Web: www.qorvo.com Tel: 1-844-890-8163 Email: customer.support@qorvo.com For technical questions and application information: Email: appsupport@qorvo.com Important Notice The information contained herein is believed to be reliable; however, Qorvo makes no warranties regarding the information contained herein and assumes no responsibility or liability whatsoever for the use of the information contained herein. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. THIS INFORMATION DOES NOT CONSTITUTE A WARRANTY WITH RESPECT TO THE PRODUCTS DESCRIBED HEREIN, AND QORVO HEREBY DISCLAIMS ANY AND ALL WARRANTIES WITH RESPECT TO SUCH PRODUCTS WHETHER EXPRESS OR IMPLIED BY LAW, COURSE OF DEALING, COURSE OF PERFORMANCE, USAGE OF TRADE OR OTHERWISE, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Without limiting the generality of the foregoing, Qorvo products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death. Copyright 2018 (c) Qorvo, Inc. | Qorvo is a registered trademark of Qorvo, Inc. Data Sheet February 26, 2018 | Subject to change without notice 9 of 9 www.qorvo.com